riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

update documentation on the through channel

This commit is contained in:
tangxifan 2020-03-27 11:34:39 -06:00
parent e47a0a4422
commit 78964ce71c
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
docs/source/arch_lang/addon_vpr_syntax.rst
View File

@ -37,6 +37,8 @@ Each ``<pb_type>`` should contain a ``<mode>`` that describe the physical implem
.. warning:: Do NOT enable if you are not using the tileable routing resource graph generator!
.. warning:: Current through channel supports only a fixed routing channel!
``<switch_block>`` may include addition syntax to enable different connectivity for pass tracks
.. option:: sub_type="<string>"