tangxifan
|
93cbbf2045
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[core] code format
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2023-10-06 18:20:55 -07:00 |
tangxifan
|
b07111497c
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[core] enable options in xml writers
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2023-10-06 18:20:17 -07:00 |
tangxifan
|
76f446caec
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[core] fixed a bug
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2023-09-25 21:13:11 -07:00 |
tangxifan
|
3adf81046a
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[core] code format
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2023-09-25 17:22:26 -07:00 |
tangxifan
|
5e269e8bc4
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[core] support port merging at grid modules
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2023-09-25 17:21:58 -07:00 |
tangxifan
|
fd99dafad7
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[core] code format
|
2023-09-25 16:51:01 -07:00 |
tangxifan
|
96f36a96dd
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[core] syntax
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2023-09-25 16:50:30 -07:00 |
tangxifan
|
ca715f4c82
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[core] developing parser to support subtile port merge
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2023-09-25 16:46:34 -07:00 |
tangxifan
|
0a94763422
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[lib] add module rename assistant
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2023-09-22 18:16:01 -07:00 |
tangxifan
|
278b8e2409
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[lib] fixed a typo which causes outputted module name XMLs carry syntax errors
|
2023-09-22 17:37:27 -07:00 |
tangxifan
|
c6175aa514
|
[core] code format
|
2023-09-17 22:37:48 -07:00 |
tangxifan
|
ef97127c63
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[core] fixed some bugs in testbenches when renaming top modules
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2023-09-17 22:34:00 -07:00 |
tangxifan
|
72a3c05747
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[core] code format
|
2023-09-17 13:29:30 -07:00 |
tangxifan
|
ccd4c1861b
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[core] developing new command to write module naming rules
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2023-09-16 19:37:06 -07:00 |
tangxifan
|
37573abc22
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[core] code format
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2023-09-15 23:32:40 -07:00 |
tangxifan
|
bc407e5d69
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[core] code complete for rename modules
|
2023-09-15 23:22:31 -07:00 |
tangxifan
|
7913e6cc6a
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[lib] update tests and fixed some bugs
|
2023-09-15 17:38:51 -07:00 |
tangxifan
|
b5cf08a3c5
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[lib] add testing
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2023-09-15 17:15:05 -07:00 |
tangxifan
|
74b9f673ec
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[lib] syntax and add missing api
|
2023-09-15 17:00:02 -07:00 |
tangxifan
|
636647902e
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[lib] developing io for module name map
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2023-09-15 16:53:24 -07:00 |
tangxifan
|
e5bc936144
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[lib] developing io
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2023-09-15 16:19:10 -07:00 |
tangxifan
|
b65dda90c4
|
[lib] developing naming manager
|
2023-09-15 16:02:13 -07:00 |
tangxifan
|
af67b02cca
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[lib] rename lib to namemanager as a unified library to provide naming support on FPGA modules
|
2023-09-15 13:51:14 -07:00 |
tangxifan
|
3273728bc3
|
[lib] code format
|
2023-08-26 18:15:30 -07:00 |
tangxifan
|
ac5873bac2
|
[lib] fixed some bugs in message show
|
2023-08-26 18:12:25 -07:00 |
tangxifan
|
97619fc545
|
[lib] add verbose output option to fabric key assistant
|
2023-08-26 18:07:08 -07:00 |
tangxifan
|
cfaae55bda
|
[lib] debugged fabric key assistant
|
2023-08-26 13:19:18 -07:00 |
tangxifan
|
adae7392e5
|
[lib] developing fabric key assistant
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2023-08-26 12:54:12 -07:00 |
tangxifan
|
d3895c3dc0
|
[core] code format
|
2023-08-03 17:34:25 -07:00 |
tangxifan
|
53050b94ab
|
[core] developing memory group modules in grid modules
|
2023-08-01 17:50:03 -07:00 |
tangxifan
|
23643f3fb1
|
[core] developing the physical memory block builder
|
2023-07-31 22:57:26 -07:00 |
tangxifan
|
95a32628ab
|
[core] fixed the bug in arch bitgen due to the tile modules
|
2023-07-25 14:15:15 -07:00 |
tangxifan
|
7783229d90
|
Merge branch 'master' of github.com:lnis-uofu/OpenFPGA into xt_fabric_tile
|
2023-07-23 20:44:50 -07:00 |
tangxifan
|
6607bb7e48
|
[core] now fpga verilog supports tile modules
|
2023-07-18 22:35:22 -07:00 |
Chung Shien Chai
|
b2f5b493c2
|
Fix the cpp-format
|
2023-07-16 13:08:40 -07:00 |
Chung Shien Chai
|
924622f5e5
|
Issue 1248 - fix bug bintoi_charvec()
|
2023-07-15 17:46:43 -07:00 |
tangxifan
|
091ac88c7e
|
[lib] code format
|
2023-07-14 12:16:40 -07:00 |
tangxifan
|
3bc959dcec
|
[lib] create tile config lib and start integration to core
|
2023-07-14 12:13:31 -07:00 |
tangxifan
|
d0831507c0
|
[lib] format fabric key writer
|
2023-07-06 19:21:45 -07:00 |
tangxifan
|
85f9899588
|
[lib] fixed some bugs and now fabric key io is working
|
2023-07-06 16:30:36 -07:00 |
tangxifan
|
74e776f3b0
|
[lib] syntax errors and now fabric key is under the namespace of openfpga
|
2023-07-06 11:57:22 -07:00 |
tangxifan
|
6c623d60f9
|
[lib] code format
|
2023-07-06 11:16:36 -07:00 |
tangxifan
|
82a60d64e3
|
[lib] add api to fabric key
|
2023-07-05 23:53:16 -07:00 |
tangxifan
|
ed25cf0dc4
|
[lib] developing sub key io and APIs
|
2023-07-05 21:18:33 -07:00 |
tangxifan
|
c2020d6cef
|
[lib] now use constants in xml io for fabric key
|
2023-07-04 21:04:21 -07:00 |
tangxifan
|
93158bdc62
|
[lib] adding subkey feature
|
2023-07-03 15:53:22 -07:00 |
tangxifan
|
1b9aeab2a7
|
[lib] reorganize the source files of libfabrickey
|
2023-07-03 15:02:23 -07:00 |
tangxifan
|
83fa6a421e
|
[core] code format
|
2023-06-26 10:06:17 -07:00 |
tangxifan
|
70f40cd21a
|
[core] fixing bugs in the preconfig module when supporting dut module of fpga_core
|
2023-06-26 10:03:19 -07:00 |
tangxifan
|
987a562e0f
|
[core] fixed the bug when checking mapping status of fpga core ports
|
2023-06-23 17:21:52 -07:00 |