tangxifan
|
a9df922412
|
finish the identification on mirror switch and connection blocks
Verilog generator to be updated
|
2019-05-09 21:31:39 -06:00 |
|
tangxifan
|
a3c3f2b892
|
developing compact routing hierarchy
|
2019-05-08 20:49:21 -06:00 |
|
tangxifan
|
4c6639218e
|
Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
|
2019-05-08 14:30:33 -06:00 |
|
tangxifan
|
e305e60ee4
|
minor fix on the shell interface of VPR
|
2019-05-08 14:29:58 -06:00 |
Baudouin Chauviere
|
4f386de2ef
|
gen_xxx functions create mem-leaks because the mem is dynamically allocated inside and not freed. TBD later everywhere
|
2019-05-06 17:25:29 -06:00 |
|
Baudouin Chauviere
|
7ddfe60721
|
Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
|
2019-05-06 16:12:52 -06:00 |
|
Baudouin Chauviere
|
3b62f8e024
|
Conversion from s to ns for the loop breaking delays
|
2019-05-06 16:12:30 -06:00 |
BaudouinChauviere
|
cd4dc8b2e8
|
Delete read_xml_arch_file.c
Already present in SRC
|
2019-05-06 12:55:18 -06:00 |
|
Baudouin Chauviere
|
a5a1a376ab
|
Modified code for cleaner delay naming convention
|
2019-05-06 12:52:49 -06:00 |
|
Baudouin Chauviere
|
e7b1d89985
|
Change syntax name for loop_breaker_delay_before/after which is more explicit
|
2019-05-06 12:25:26 -06:00 |
|
Baudouin Chauviere
|
7c257ebda7
|
Fix on the makefile which was not targetting the right folder
|
2019-05-06 12:21:53 -06:00 |
|
tangxifan
|
43af38d150
|
Fixing travis for MacOS
|
2019-05-03 23:43:46 -06:00 |
|
tangxifan
|
324056e3e6
|
keep fixing travis
|
2019-05-03 23:32:39 -06:00 |
|
tangxifan
|
b04c6b8c31
|
bug fix on Makefile and travis
|
2019-05-03 23:24:08 -06:00 |
|
tangxifan
|
c5ef99f6d4
|
update travis
|
2019-05-03 23:18:31 -06:00 |
|
tangxifan
|
6e6ae1cc3d
|
fixed bugs in CMakeLists.txt and Makefile
|
2019-05-03 23:03:04 -06:00 |
|
tangxifan
|
ab32773464
|
Update CMakelist for yosys to support -j
|
2019-05-03 21:13:00 -06:00 |
|
tangxifan
|
e5a18b7cca
|
Add CMakeSupport, TODO: create CMAKE support for yosys
|
2019-05-03 19:04:02 -06:00 |
|
tangxifan
|
4e3487b691
|
Add latest abc and update ace dependence
|
2019-05-03 18:56:03 -06:00 |
|
tangxifan
|
70b66e0799
|
Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
|
2019-05-03 14:22:20 -06:00 |
|
Baudouin Chauviere
|
7860042276
|
added before after loop breaker constraining
|
2019-05-03 14:00:06 -06:00 |
|
tangxifan
|
11cf30b239
|
Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
|
2019-05-03 11:54:35 -06:00 |
|
tangxifan
|
5a97e3e602
|
update Makefile t
|
2019-05-03 11:48:41 -06:00 |
|
Baudouin Chauviere
|
4e330ee463
|
Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
|
2019-05-03 10:43:22 -06:00 |
|
Baudouin Chauviere
|
921b694400
|
Bug fix sdc breaking loop of edges outside current interconnect
|
2019-05-03 10:42:35 -06:00 |
AurelienUoU
|
42f20eda60
|
Add the user matching for internal register in formal verification script generation
|
2019-05-03 10:24:02 -06:00 |
|
tangxifan
|
974af5a2ae
|
Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
|
2019-04-30 14:30:38 -06:00 |
|
tangxifan
|
42daadee2f
|
critical bug fixing
|
2019-04-30 14:30:17 -06:00 |
|
Baudouin Chauviere
|
1ab4688339
|
Create no segment constraint in loop_breaker if none is given by user
|
2019-04-30 12:30:07 -06:00 |
|
tangxifan
|
c46c0fc97d
|
bug fixing for SDC generator
|
2019-04-26 14:07:44 -06:00 |
|
tangxifan
|
46d44fa42a
|
Update VPR7 X2P with new engine
|
2019-04-26 12:23:47 -06:00 |
|
tangxifan
|
e2e4a9287d
|
keep bug fixing in Makefiles and remove parallism in Make
|
2019-04-10 16:10:19 +08:00 |
|
tangxifan
|
7c42119481
|
Keep bug fixing for travis
|
2019-04-10 16:00:03 +08:00 |
|
tangxifan
|
d10c329c8a
|
Correct .travis.yml typos
|
2019-04-10 15:34:39 +08:00 |
|
tangxifan
|
f1290ff7b9
|
correct travis errors
|
2019-04-10 15:29:39 +08:00 |
|
tangxifan
|
5c46e4aabf
|
add missing files for Travis
|
2019-04-10 15:24:37 +08:00 |
|
tangxifan
|
8eeb144f32
|
Streamline Makefile and Travis for Mac OS
|
2019-04-10 15:22:20 +08:00 |
|
tangxifan
|
b330fb4bb7
|
Add Travis support for Mac OS Mojave
|
2019-04-10 11:51:12 +08:00 |
|
BaudouinChauviere
|
cb34ac0243
|
Update sc_flow.rst
|
2019-04-01 16:30:31 -06:00 |
|
BaudouinChauviere
|
361bbc13e3
|
Update func_verify.rst
|
2019-04-01 16:29:42 -06:00 |
|
BaudouinChauviere
|
a176bf3a19
|
Update file_organization.rst
|
2019-04-01 16:28:48 -06:00 |
|
BaudouinChauviere
|
01371ce54d
|
Update customize_subckt.rst
|
2019-04-01 16:27:06 -06:00 |
|
BaudouinChauviere
|
1ea7ec3265
|
Update spice_simulation.rst
|
2019-04-01 16:26:02 -06:00 |
|
BaudouinChauviere
|
cfdc072164
|
Update file_organization.rst
|
2019-04-01 16:25:09 -06:00 |
|
BaudouinChauviere
|
fcc3bf0967
|
Update command_line_usage.rst
|
2019-04-01 16:23:24 -06:00 |
|
BaudouinChauviere
|
f4b72bd4e1
|
Update link_circuit_modules.rst
|
2019-04-01 16:21:59 -06:00 |
|
BaudouinChauviere
|
ce300c196c
|
Update circuit_modules.rst
|
2019-04-01 16:13:23 -06:00 |
|
BaudouinChauviere
|
6e065ef3b3
|
Update tech_lib.rst
|
2019-04-01 16:09:31 -06:00 |
|
BaudouinChauviere
|
aed779ca3d
|
Update spice_sim_setting.rst
|
2019-04-01 16:08:00 -06:00 |
|
BaudouinChauviere
|
4900caaed9
|
Update generality.rst
|
2019-04-01 16:04:17 -06:00 |