Commit Graph

7115 Commits

Author SHA1 Message Date
cgsfv c3a744149c Use LOG_DEBUG for debug messages: Discard unexpected char 2018-09-17 13:53:35 -07:00
cgsfv 10a2823191 Read memory words individually if burst read fails 2018-09-17 13:53:35 -07:00
Megan Wachs d6a1e27c89
Update mpsse.c
Include necessary header file
2018-09-17 09:39:31 -07:00
Kai Geissdoerfer 08a79c71f2 flash/nrf5: support for nRF52840 Q1AAC0
Change-Id: Id3280dadece84e1d68544936e44d506c7930a55d
Signed-off-by: Kai Geissdoerfer <kai.geissdoerfer@tu-dresden.de>
Reviewed-on: http://openocd.zylin.com/4649
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-17 17:15:20 +01:00
Kai Geissdoerfer ad41246cf6 flash/nrf5: time-based timeout waiting for flash controller
Change-Id: Id214df154dc359ca130c8d8fe1554d106621b9cd
Signed-off-by: Kai Geissdoerfer <kai.geissdoerfer@tu-dresden.de>
Reviewed-on: http://openocd.zylin.com/4648
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-17 17:15:03 +01:00
Antonio Borneo 8c67115c7b arm_adi_v5: remove useless cast to int
The field ap_num in struct adiv5_private_config is already of type int.
Casting it to type int has no sense.

Change-Id: Ida642e808c02591bb58609425eccd096d404e2c4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4666
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-13 16:22:58 +01:00
Tim Newsome af501f4905 Add wall clock timeout to mpsse_flush()
I think that libusb_handle_events_timeout_completed is supposed to make
progress or time out, but sometimes we hit a case where it makes no
progress, and mpsse_flush() loops forever. This wall clock timeout kicks
it out of that loop. OpenOCD appears to die afterwards, but that's still
an improvement.

Change-Id: Id9220557625834fb5b7dccf65251651a11a887f0
2018-09-12 09:08:19 -07:00
Antonio Borneo 56cdc3f3d5 target/cortex_a: poll all targets in SMP node after halt
The periodic poll scans all the targets in the same order they
have been declared in the configuration file.
When one target in a SMP node halts, the transition is detected
in the following poll and this triggers a halt request to all the
other cores of the SMP node.
The targets that will be polled afterwards will be identified as
"halted", but the targets already scanned will remain as
"running" until the next periodic poll.
This creates a race condition with GDB; GDB sets the breakpoints
when runs the target and removes them as soon as the target is
halted. When it receives the halt event, it starts removing the
breakpoints and fails on the targets that are still reported as
"running".

Fixed by polling all the targets in the SMP node before informing
GDB about the halt event.
This implementation is almost copy/paste from the one in aarch64.

Change-Id: Id2bd99f1e56b014e48e9e34ccb891b4219c518f8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4622
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-12 15:14:42 +01:00
Oleksij Rempel 2253a31fb1 ftdi: extend ftdi_location format
To existing <bus>:<port>,<port> format add <bus>-<port>.<port> support.
The last format is used by kernel and other drivers.

Change-Id: I6528970d3af4f6a8bf7b27a0f7a763b5957fdf2b
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4631
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-10 11:55:43 +01:00
Matthias Welwarsky 5d458cf727 target/mem_ap: generic mem-ap target
This pseudo target allows attaching to any access point on the DAP at the
MEM-AP level and read and write addresses on the connected bus. For
example, one can create a mem_ap target on the APB-AP and read and write
registers of debug components directly. This allows many diagnostic
and other features be programmed entirely using TCL, without necessity
of adding drivers to OpenOCD.

Change-Id: I53229ffd68fb0f96fb68be15b0f3a76cc8843c8e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4002
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Leonard Crestez <cdleonard@gmail.com>
2018-09-10 09:37:03 +01:00
Cody Schafer 23cd59cdf2 flash/stm32f2x: add stm32f7 revision Z identification
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Change-Id: Ia0169514d494bae2a98d92ebc97c8eccc10bc6c4
Reviewed-on: http://openocd.zylin.com/4657
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-09 21:10:05 +01:00
Oleksij Rempel d1b7437633 libusb: return oocd error values
keep same return style where possible

Change-Id: I2f9b85dbc307a483609f76a84de77e3c74d346c7
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4588
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-07 08:18:53 +01:00
Antonio Borneo ab858febb6 gdb_server: add per target option "-gdb-port"
The argument passed to global config command "gdb_port" is usually,
but not always, a TCP port number. In case of multiple targets, this
numeric value is used as the first port of a set of consecutive TCP
ports assigned one per target.
If the argument is not a numeric value (e.g. "pipe", "disabled", ...)
then incrementing it for the next target has no sense.

Add the option "-gdb-port number" to the commands "target create" and
"$target_name configure" to override, for the specific target, the
general global configuration.

This permits to use a per target "-gdb-port disabled", when no gdb
port is required for that specific target.

It also makes possible to choose a custom TCP port number for each
target, overriding the usual sequence of consecutive port numbers.

Change-Id: I3b9a1910b28ab4bc757e839d0e5d08ffc29f7ab4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4530
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-07 08:18:22 +01:00
Antonio Borneo 11019a824d adi_v5: enforce check on AP number value
The AP number value is restricted in 8 bits unsigned by ADI-v5
specification. Nevertheless, an "invalid" value is used by
target cortex-m to force an automatic detection of the AP.

Replace magic numbers by using new macros for AP max number and
for the value of AP invalid.
Check the value passed through -ap-num flag during configuration.

Change-Id: Ic19a367db0ab11c0ebd070750eca0647d25279a5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4668
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-07 08:17:42 +01:00
Tim Newsome 933cb875a8
Don't report exact watchpoint to gdb. (#300)
We should have a fix for #295 first.

Change-Id: Ic72a7a3fa866fbb5aaed22689adfebf9ce913b50
2018-09-06 15:39:25 -07:00
Ryan Macdonald 631f6cd55b More style fixes
Signed-off-by: Ryan Macdonald <rmac@sifive.com>
2018-08-31 14:30:17 -07:00
Ryan Macdonald 3516fd5019 Style fixes
Signed-off-by: Ryan Macdonald <rmac@sifive.com>
2018-08-31 14:29:09 -07:00
Ryan Macdonald 583c90e87c Add pass message for SBA and compliance tests
Signed-off-by: Ryan Macdonald <rmac@sifive.com>
2018-08-31 14:26:32 -07:00
Megan Wachs 4b29af433d Merge remote-tracking branch 'origin/riscv' into sba_tests 2018-08-31 09:02:55 -07:00
Andrew Waterman 167f0071d1
Merge pull request #298 from riscv/jimtcl-mirror
Don't use unreliably hosted submodules (git2cl, jimtcl, libjaylink)
2018-08-30 19:22:12 -07:00
Megan Wachs 24513fe51f riscv-compliance: fix comment typo 2018-08-30 15:37:15 -07:00
Megan Wachs 7448f8780a riscv-compliance: fix whitespace 2018-08-30 11:30:14 -07:00
Megan Wachs 934440b80e riscv-compliance: incorporate review feedback 2018-08-30 11:26:05 -07:00
Andrew Waterman 53cb54d69a Flatten libjaylink submodule 2018-08-29 16:17:43 -07:00
Tim Newsome a0afcba66d
Fix typo. 2018-08-29 16:05:54 -07:00
Tim Newsome 2608b8e25d
Fix strange merge. 2018-08-29 16:00:51 -07:00
Tim Newsome 164415cfbe
Merge branch 'riscv' into sba_tests 2018-08-29 15:55:30 -07:00
Megan Wachs 34ee883aef Merge remote-tracking branch 'origin/riscv' into riscv-compliance-rebase 2018-08-29 15:47:54 -07:00
Tim Newsome b4b2ec7d2d
Add command to expose custom registers (#293)
* Added `riscv expose_custom` command.

Seems to work for reading. I need to do some more testing for writes, as
well as minor cleanup.

Change-Id: I85d5d00897d5da4add4a6643b538be37d31a016f

* Conform to OpenOCD style.

Change-Id: I40a316f06f418d2b63d9e11aea03ef51da8d8faf

* Free all the memory allocated by register init.

Change-Id: I04e35ab54613f99708cee85e41fef989079adefc

* Properly document `riscv expose_custom`.

Change-Id: Id78a02b7a00c161df80f11b521a306e0cf3d7478
2018-08-29 14:22:50 -07:00
Tim Newsome 074b4fabed
Fix gdb_signal_reply() allocating too small buffer (#296)
In my test-case (64-bit OpenOCD, 64-bit target), OpenOCD ended up
sending gdb '$T05rwatch:1212340a00;thread:0000000000000002#89'
That's missing the final semi-colon after the thread id.

This fix increases the buffer size, and also removes the 0 padding on
the thread id.

This bug showed up when running MulticoreRtosSwitchActiveHartTest
against dual-hart, 64-bit spike.

Change-Id: I8c7d88e2d37b00cf3099f226a1a32671219802d5
2018-08-28 14:46:58 -07:00
Tim Newsome 58824330da
Match on qC, but not qCRC. (#294)
Now we pass MulticoreRtosSwitchActiveHartTest again.
It was broken by #292.

Change-Id: I61f0ae41efda09fd48f732b2122fed2400a43d29
2018-08-27 15:07:49 -07:00
craigblackmore 7897d40099 Handle hardware watchpoints hit by RV32 loads and stores (#291)
* Add riscv_hit_watchpoint function for RV32I loads and stores

For GDB to fully support hardware watchpoints, OpenOCD needs to tell GDB
which data address has been hit. OpenOCD relies on a target-specific
hit_watchpoint function to do this. If GDB is not given the address, it
will not print the hit variable name or its old and new value.

There does not seem to be a way for the hardware to tell us which trigger
was hit (0.13 introduced the 'hit bit' but this is optional). Alternatively,
we can decode the instruction at dpc and find out which memory address
it accesses.

This commit adds support for RV32I load and store instructions
and could be extended for additional instructions in the future.

* 0.11: change debug reason for hw triggers to DBG_REASON_WATCHPOINT

This is to make sure riscv_hit_watchpoint is called to check for a data
address hit.

* Fix style issues

* Change %lx to PRIx64 to clear -m32 build errors

* Add clarifying comments/todos

* Fix types in format strings
2018-08-27 12:42:34 -07:00
craigblackmore 8ede238449 Handle the qC packet (#292)
* Handle the qC packet

GDB sends the qC packet to find out which thread OpenOCD is on

* Correct format string for qC packet
2018-08-27 12:42:21 -07:00
Dmitry Ryzhov f54eaf0b8e Switch active rtos thread on any hart halt. (#290) 2018-08-23 16:52:12 -07:00
Guido Günther 2a3b709aa5 target: armv8: Ensure target is halted for virt2phys
Othewise the error reported as

    Timeout waiting for dpm prepare

Change-Id: Ieed2fdcd94ae4e877a749df3eec07a01dbf80b10
Closes: https://sourceforge.net/p/openocd/tickets/201/
Found-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-on: http://openocd.zylin.com/4647
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-22 08:23:08 +01:00
Tomas Vanek 704d7ac2d0 rtos/linux.c: fix clang static analyzer warning
Remove sizeof(int64_t) from string size computation.

Change-Id: I029b394df5d62a2594a723c4c0e13608b3423b9b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4640
Tested-by: jenkins
2018-08-21 19:26:26 +01:00
Tomas Vanek 6ec5fe8269 flash/at91sam4: fix clang static analyzer warning
Change-Id: I5e5319d855c868adfa012f68086f7f809ec5a069
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4639
Tested-by: jenkins
2018-08-21 19:26:14 +01:00
Tomas Vanek d78cf6f312 flash/at91sam4: set wait states only once per write
Read-modify-write setting of FMR register requires an USB turnaround.
Setting FMR before each page write is not necessary and decreases the
write speed.

Change-Id: I67844c898aaf117f155c762c979840b603c767ed
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4611
Tested-by: jenkins
Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21 19:26:00 +01:00
Tomas Vanek 20922f47c7 flash/at91sam4: emit flash bank info
Change related LOG_INFO to LOG_DEBUG

Change-Id: I0c09b1ec83da631b26980dc8632b9031fe2921a3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4610
Tested-by: jenkins
Reviewed-by: Erwin Oegema <blablaechthema@hotmail.com>
Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21 19:25:53 +01:00
Tomas Vanek e537e807f6 flash/at91sam4: run probe just once
Reread registers in sam4_GetInfo()

Change-Id: I3b023b3e642a9c052b5c41673d196317f7e7f2e3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4609
Tested-by: jenkins
Reviewed-by: Erwin Oegema <blablaechthema@hotmail.com>
Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
2018-08-21 19:25:45 +01:00
Kevin Gillespie 6060545458 max32xxx: Support for MAX32XXX devices.
Adding flash programming support for Maxim Integrated MAX32XXX
devices.

Change-Id: I5b0f57a885f9d813240e4bc2d9f765b743e1cfc3
Signed-off-by: Kevin Gillespie <kgills@gmail.com>
Reviewed-on: http://openocd.zylin.com/3543
Tested-by: jenkins
Reviewed-by: Ismail H. KOSE <ihkose@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-08-21 19:24:58 +01:00
Tim Newsome 2a69f1bd2f
From upstream (#286)
* flash/nor: Add support for TI CC26xx/CC13xx flash

Added cc26xx flash driver to support the TI CC26xx and CC13xx
microcontrollers. Driver is capable of determining which MCU
is connected and configures itself accordingly. Added config
files for four specific variants: CC26x0, CC13x0, CC26x2, and
CC13x2.

Note that the flash loader code is based on the sources used
to support flash in Code Composer Studio and Uniflash from TI.

Removed cc26xx.cfg file made obsolete by this patch.

Change-Id: Ie2b0f74f8af7517a9184704b839677d1c9787862
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4358
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>

* flash/nor/nrf5: remove is_erased setting and autoerase before write

Cached flash erase state in sectors[].is_erased is not reliable as running
target can change the flash.

Autoerase was issued before flash write on condition is_erased != 1
Remove autoerase completely as it is a quite non-standard feature.

Change-Id: I19bef459e6afdc4c5fcaa2ccd194cf05be8a42b6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4400
Tested-by: jenkins

* src/flash/tms470: remove testing of sectors[].is_erased state

The erase check routine checked sectors only if is_erased != 1

Check sector unconditionally.

While on it fix clang static analyzer warnings.

Change-Id: I9988615fd8530c55a9b0c54b1900f89b550345e9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4401
Tested-by: jenkins

* tcl/target/stm32f7x: configure faster system clock in reset-init

STM32F7xx devices need faster clock for flash programming
over JTAG transport. Using reset default 16 MHz clock
resulted in lot of DAP WAITs and substantial decrease
of flashing performance.

Adapted to the restructured dap support
(see 2231da8ec4).

Change-Id: Ida6915331dd924c9c0d08822fd94c04ad408cdc5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4464
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>

* flash/nor/psoc5lp: fix compile issue on GCC 8.1.0

Issue already identified by Alex https://sourceforge.net/u/alexbour/
in ticket #191 https://sourceforge.net/p/openocd/tickets/191/

	src/flash/nor/psoc5lp.c:237:2: error: ‘strncpy’ output
	truncated before terminating nul copying 2 bytes from a
	string of the same length [-Werror=stringop-truncation]

Fix it by assigning the value to the array elements.

Change-Id: I22468e5700efa64ea48ae8cdec930c48b4a7d8fb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4563
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/arm: Add PLD command to ARM disassembler.

Updates the ARM disassembler to handle PLD (PreLoad Data) commands.
Previously handled by printing a TODO message. There are three forms of
the command: literal, register, and immediate. Simply decode based off
of the A1 encoding for the instructions in the ARM ARM. Also fixes mask
to handle PLDW commands.

Change-Id: I63bf97f16af254e838462c7cfac80f6c4681c556
Signed-off-by: James Marshall <jcmarsh@gwmail.gwu.edu>
Reviewed-on: http://openocd.zylin.com/4348
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

* mips_m4k.c: Fix build with --disable-target64

Replace PRIx64 with TARGET_PRIxADDR to avoid build problems
when --disable-target64 is used during configure.

Change-Id: I054a27a491e86c42c9386a0488194320b808ba96
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4566
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tim Newsome <tim@sifive.com>

* target/arm_adi_v5: sync CSW and TAR cache on apreg write

When using apreg to change AP registers CSW or TAR we get internal
cached value not valid anymore.

Reuse the setup functions for CSW and TAR to write them.
Invalidate the cached value before the call to force the write, thus
keeping original apreg behaviour.

Change-Id: Ib14fafd5e584345de94f2e983de55406c588ac1c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4565
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/arm_adi_v5: keep CSW and TAR cache updated

The call to dap_queue_ap_write() can fail and the value in CSW and
TAR becomes unknown.

Invalidate the OpenOCD cache if dap_queue_ap_write() fails.

Change-Id: Id6ec370b4c5ad07e454464780c1a1c8ae34ac870
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4564
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* tcl/target: Add Renesas R-Car R8A7794 E2 target

Add configuration for the Renesas R-Car R8A7794 E2 target.
This is an SoC with two Cortex A7 ARMv7a cores, both A7
cores are supported.

Change-Id: Ic1c81840e3bfcef8ee1de5acedffae5c83612a5e
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4531
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* tcl/board: Add Renesas R-Car R8A7790 H2 Stout board

Add configuration for the Renesas R-Car R8A7790 H2
based Stout ADAS board.

Change-Id: Ib880b5d2e1fab5c8c0bc0dbcedcdce8055463fe2
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4497
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* tcl/board: Add Renesas R-Car R8A7791 M2W Porter board

Add configuration for the Renesas R-Car R8A7791 M2W
based Porter evaluation board.

Change-Id: Iaadb18f29748f890ebb68519ea9ddbd18e7649af
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4498
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* tcl/board: Add Renesas R-Car R8A7794 E2 Silk board

Add configuration for the Renesas R-Car R8A7794 E2
based Silk evaluation board.

Change-Id: I504b5630b1a2791ed6967c6c2af8851ceef9723f
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
---
NOTE: This requires SW7[1] in position 1 (default is 0)
Reviewed-on: http://openocd.zylin.com/4532
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* tcl/board: Factor out common R-Car Gen2 code

Factor out the code shared by all R-Car Gen2 boards into a single
file to get rid of the duplication.

Change-Id: I70b302c2e71f4e6fdccb2817dd65a5493bb393d8
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4533
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* jtag/drivers/cmsis-dap: fix connect in cmsis_dap_swd_switch_seq()

The proc cmsis_dap_swd_switch_seq() is part of the SWD API for
this interface driver. It is valid only when the interface is
used in SWD mode.
In this proc there is the need to call, in sequence, first
cmsis_dap_cmd_DAP_Disconnect() then cmsis_dap_cmd_DAP_Connect().
The latter call requires the connection mode as parameter, that
inside cmsis_dap_swd_switch_seq() can only be CONNECT_SWD.

The current implementation is not correct and in some cases can
pass mode CONNECT_JTAG. Moreover, JTAG is optional in CMSIS-DAP
and passing mode CONNECT_JTAG triggers an error with SWD-only
interfaces.

Use mode CONNECT_SWD in SWD specific cmsis_dap_swd_switch_seq().

Change-Id: Ib455bf5b69cb2a2d146a6c8875387b00c27a5690
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4571
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/cortex_m: return error if breakpoint address is out of range

If the "Flash Patch and Breakpoint" unit is rev.1 then it can only
accept breakpoint addresses below 0x1FFFFFFF.
Detailed info in "ARM v7-M Architecture Reference Manual", DDI0403E
at chapter "C1.11 Flash Patch and Breakpoint unit".

Print a message and return error if the address of hardware
breakpoint cannot be handled by the breakpoint unit.

Change-Id: I95c92b1f058f0dfc568bf03015f99e439b27c59b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4535
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>

* flash/nor/stm32: Report errors in wait_status_busy

Flash operation errors that occur during algorithm programming are
reported via the algorithm return value. However, Flash operation
errors that occur during non-algorithm work (erasing, programming
without a work area, programming the last non-multiple-of-32-bytes on
an H7, etc.) generally end with a call to stm32x_wait_status_busy,
which reads the status register and clears the error flags but fails
to actually report that something went wrong should an error flag
(other than WRPERR) be set. Return an error status from
stm32x_wait_status_busy in those cases. Correct a log message
accordingly.

Change-Id: I09369ea5f924fe58833aec1f45e52320ab4aaf43
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4519
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* flash/nor/stm32: Eliminate working area leak

On a specific early-return path, an allocated working area was not
freed. Free it.

Change-Id: I7c8fe51ff475f191624086996be1c77251780b77
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4520
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* flash/nor/stm32h7: Fix incorrect comment

The name of the bit according to the reference manual is inconsistency
error, not increment error.

Change-Id: Ie3b73c0312db586e35519e03fd1a5cb225673d97
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4521
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

* target: fix 'bp' command help message

"asid" and "length" are separate arguments of the command.
Put space between them.

Change-Id: I36cfc1e3a01caafef4fc3b26972a0cc192b0b963
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4511
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* Add ARM v8 AArch64 semihosting support

This patch implements semihosting support for AArch64. This picks
code from previously submitted AArch64 semihosting support patch
and rebases on top of reworked semihosting code. Tested in AArch64
mode on a Lemaker Hikey Board with NewLib and GDB.

Change-Id: I228a38f1de24f79e49ba99d8514d822a28c2950b
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4537
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* GDB fileIO stdout support

This patch fixes gdb fileio support to allow gdb console to be used as stdout.

Now we can do something like
gdb <inferior file>

(gdb) tar ext :3333
(gdb) load
(gdb) monitor arm semihosting enable
(gdb) monitor arm semihosting_fileio enable
(gdb) continue

Here: Output from inferior using puts, printf etc will be routed to gdb console.

Change-Id: I9cb0dddda1de58038c84f5b035c38229828cd744
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4538
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* target: armv8: Avoid semihosting segfault on halt

Avoid a NULL pointer dereference when halting an aarch64 core.

Change-Id: I333d40475ab26e2f0dca5c27302a5fa4d817a12f
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4593
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* tcl: target: Add NXP LS1012A config

As seen on the FRDM-LS1012A board.

Change-Id: Ifc9074b3f7535167b9ded5f544501ec2879f5db7
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4594
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* tcl: board: Add NXP Freedom FRDM-LS1012A config

An update for the K20 CMSIS-DAP firmware can be found here:
https://community.nxp.com/thread/387080?commentID=840141#comment-840141

Change-Id: I149d7f8610aa56daf1aeb95f14ee1bf88f7cb647
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4595
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* gdb_server: only trigger once the event gdb-detach at gdb quit

When GDB quits (e.g. with "quit" command) we first execute
gdb_detach() to reply "OK" then, at GDB disconnect (either TCP
or pipe connection type), we execute gdb_connection_closed().
In case GDB is killed or it crashes, OpenOCD only executes the
latter when detects the disconnection.
Both gdb_detach() and gdb_connection_closed() trigger the event
TARGET_EVENT_GDB_DETACH thus getting it triggered twice on clean
GDB quit.

Do not trigger the event TARGET_EVENT_GDB_DETACH in gdb_detach()
and let only gdb_connection_closed() to handle it.

Change-Id: Iacf035c855b8b3e2239c1c0e259c279688b418ee
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4585
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* gdb_server: set current_target from connection's one

In a multi-target environment we are supposed to have a single
gdb server for each target (or for each group of targets within
a SMP node).
By default, the gdb attached to a server sends its command to
the target (or to the SMP node targets) linked to that server.

This is working fine for the normal gdb commands, but it is
broken for the native OpenOCD commands executed through gdb
"monitor" command. In the latter case, gdb "monitor" commands
will be executed on the current target of OpenOCD configuration
script (that is either the last target created or the target
specified in a "targets" command).

Fixed in gdb_new_connection() by replacing the current target
in the connection's copy of command context.

Change-Id: If7c8f2dce4a3138f0907d3000dd0b15e670cfa80
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4586
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>

* target/image: make i/j unsigned to avoid ubsan runtime error

	src/target/image.c:1055:15: runtime error: left shift of 128 by 24 places cannot be represented in type 'int'

Change-Id: I322fd391cf3f242beffc8a274824763c8c5e69a4
Signed-off-by: Cody Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4584
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>

* target/stm32f7x: Clear stuck HSE clock with CSS

Change-Id: Ica0025ea465910dd664ab546b66f4f25b271f1f5
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4570
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

* psoc5lp: fix erase check, add free_driver_priv

psoc5lp_erase_check() was not properly adapted to the new
armv7m_blank_check_memory() in the hot fix 53376dbbed
This change fixes handling of num_sectors in dependecy of ecc_enabled.
Also add comments how ecc_enabled influences num_sectors.

Add pointer to default_flash_free_driver_priv() to all psoc5lp flash
drivers to keep valgrind happy.

Change-Id: Ie1806538becd364fe0efb7a414f0fe6a84b2055b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4569
Tested-by: jenkins

* target: atmel samd10 xplained mini

cortex m0+ on a tiny board, with an mEDBG (CMSIS-DAP) debug interface.

Change-Id: Iaedfab578b4eb4aa2d923bd80f220f59b34e6ef9
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* tcl/board: add SAMD11 Xplained Pro evaluation board

Change-Id: Id996c4de6dc9f25f71424017bf07689fea7bd3af
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/4507
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* Adds SAMD11D14AU flash support.

Corrects names of SAMD11D14AM and SAMD11D14ASS per datasheet.

Change-Id: I8beb15d5376966a4f8d7de76bfb2cbda2db440dc
Signed-off-by: Christopher Hoover <ch@murgatroid.com>
Reviewed-on: http://openocd.zylin.com/4597
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* nds32: Avoid detected JTAG clock

AICE2 doesn't support scan for the maximum clock frequency of
JTAG chain. It will cause USB command timeout.

Change-Id: I41d1e3be387b6ed5a4dd0be663385a5f053fbcf9
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/4292
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* flash/nor/tcl: Distinguish between sectors and blocks in status messages

Use the right word in flash protect command status messages based on
whether the target bank defines num_prot_blocks. Minor message style
tidy-up.

Change-Id: I5f40fb5627422536ce737f242fbf80feafe7a1fc
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Reviewed-on: http://openocd.zylin.com/4573
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>

* drivers: cmsis-dap: pull up common connect code

Just a minor deduplication

Change-Id: Idd256883e5f6d4bd4dcc18462dd5468991f507b3
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3403
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* drivers: cmsis-dap: Print version info when available

No need to wait until after connecting, might help diagnose part information by
printing earlier.

Change-Id: I51eb0d584be306baa811fbeb1ad6a604773e602c
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3404
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* flash/nor: add support for TI MSP432 devices

Added msp432 flash driver to support the TI MSP432P4x and
MSP432E4x microcontrollers. Implemented the flash algo
helper as used in the TI debug and flash tools. This
implemention supports the MSP432E4, Falcon, and Falcon 2M
variants. The flash driver automatically detects the
connected variant and configures itself appropriately.
Added command to mass erase device for consistency with
TI tools and added command to unlock the protected BSL
region.

Tested using MSP432E401Y, MSP432P401R, and MSP432P4111
LaunchPads.
Tested with embedded XDS110 debug probe in CMSIS-DAP
mode and with external SEGGER J-Link probe.

Removed ti_msp432p4xx.cfg file made obsolete by this
patch.
Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4153
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* flash/nor/at91sam4: fix sam4sa16c flash banks and its gpnvms count

There was already a github fork that had this fixed, but as we try
to use the latest, non-modified version of all software we use,
I would like to have this fix in the next releases of OpenOCD so
that if people uses $packagemanager, they will not have issues flashing
the last part of the flash of sam4sa16c chips.

Additionally, I've added some more logging related to the flash
bank that was used, and the chip ID that was detected.

Change-Id: I7ea5970105906e4560b727e46222ae9a91e41559
Signed-off-by: Erwin Oegema <blablaechthema@hotmail.com>
Reviewed-on: http://openocd.zylin.com/4599
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins

* flash/nor/stm32lx: Add revision 'V' for STM32L1xx Cat.3 devices

Change-Id: Ic92b0fb5b738af3bec79ae335876aa9e26f5f4cd
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4600
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* Avoid null target->semihosting references.

The new common semihosting code introduced a bug,
in certain conditions target->semihosting was
used without semihosting being initialised.

The solution was to explicitly test for
target->semihosting before dereferencing it.

Change-Id: I4c83e596140c68fe4ab32e586e51f7e981a40798
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4603
Tested-by: jenkins
Reviewed-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* nrf5: Add HWID 0x139 (52832 rev E0)

Change-Id: I71b7471ccfcb8fcc6de30da57ce4165c7fb1f73f
Signed-off-by: James Jacobsson <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4604
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target: Fix segfault for 'mem2array'

Call 'mem2array' without arguments to reproduce the segmentation
fault.

Change-Id: I02bf46cc8bd317abbb721a8c75d7cbfac99eb34e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4534
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>

* target/armv7m_trace: Fix typo in enum

Change-Id: I6364ee5011ef2d55c59674e3b97504a285de0cb2
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3904
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* target/armv7m_trace: Use prefix for enums

Change-Id: I3f199e6053146a1094d96b98ea174b41bb021599
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3905
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* target/aarch64: Call aarch64_init_debug_access() earlier in aarch64_deassert_reset()

On Renesas R-Car, calling 'reset halt' and 'reset init' always made DAP inaccessible. Calling 'reset' and 'halt' seperatly worked fine.
The only differences seems to be the point in time when aarch64_init_debug_access() is called. This patch aligns the behaviour.

Change-Id: I2296c65e48414a7d9846f12a395e5eca315b49ca
Signed-off-by: Dennis Ostermann <dennis.ostermann@renesas.com>
Reviewed-on: http://openocd.zylin.com/4607
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* server: Improve signal handling under Linux

Commit 5087a955 added custom signal handlers for the openocd
server process.

Before this commit, when openocd is run as a background process
having the same controlling terminal as gdb, Control-C would be
handled by gdb to stop target execution and return to the gdb prompt.

However, after commit 5087a955, the SIGINT caused by pressing
Control-C also terminates openocd, effectively crashing the
debugging session.  The only way to avoid this is run openocd in
a different controling terminal or to detach openocd from its
controlling terminal,
thus losing all job control for the openocd process.

This patch improves the server's handling of POSIX signals:
1) Keyboard generated signals (INT and QUIT) are ignored
   when server process has is no controlling terminal.
2) SIGHUP and SIGPIPE are handled to ensure that .quit functions
   for each interface are called if user's logs out of X
   session or there is a network failure.

SIG_INT & SIG_QUIT still stop openocd
when it is running in the foreground.

Change-Id: I03ad645e62408fdaf4edc49a3550b89b287eda10
Signed-off-by: Brent Roman <genosensor@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3963
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

* armv7a: read ttbcr and ttb0/1 at every entry in debug state

Commit bfc5c764df avoids reading
ttbcr and ttb0/1 at every virt2phys translation by caching them,
and it updates the cached values in armv7a_arch_state().
But the purpose of any (*arch_state)() method, thus including
armv7a_arch_state(), is to only print out and inform the user
about some architecture specific status.
Moreover, to reduce the verbosity during a GDB session, the
method (*arch_state)() is not executed anymore at debug state
entry (check use of target->verbose_halt_msg in src/openocd.c),
thus the state of translation table gets out-of-sync triggering
	Error: Address translation failure
or even using a wrong address in the memory R/W operation.

In addition, the commit above breaks the case of armv7r by
calling armv7a_read_ttbcr() unconditionally.

Fixed by moving in cortex_a_post_debug_entry() the call to
armv7a_read_ttbcr() on armv7a case only.
Remove the call to armv7a_read_ttbcr() in armv7a_identify_cache()
since it is (conditionally) called only in the same procedure
cortex_a_post_debug_entry().

Fixes: bfc5c764df ("armv7a: cache ttbcr and ttb0/1 on debug
state entry")
Change-Id: Ifc20eca190111832e339a01b7f85d28c1547c8ba
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4601
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* Avoid dereferencing NULL pointer.

If a NULL pointer is passed, don't attempt to increment it.  This avoids
passing the now not-NULL pointer on and eventually segfaulting.  Also
remove some unnecessary temporary variables.

Change-Id: I268e225121aa283d59179bfae407ebf6959d3a4e
Signed-off-by: Darius Rad <darius@bluespec.com>
Reviewed-on: http://openocd.zylin.com/4550
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

* Remove FSF mailing address.

Checkpatch complains about this (FSF_MAILING_ADDRESS).

Change-Id: Ib46a7704f9aed4ed16ce7733d43c58254a094149
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4559
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

* drivers: cmsis_dap_usb: implement cmd JTAG_TMS

Simply add a wrapper around cmsis_dap_cmd_DAP_SWJ_Sequence()

Change-Id: Icf86f84b24e9fec56e2f9e155396aac34b0e06d2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4517
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

* arm_adi_v5: put SWJ-DP back to JTAG mode at exit

When SWD mode is used, current OpenOCD code left the SWJ-DP in
SWD mode at exit. Also, current code is unable to switch back the
SWJ-DP in JTAG at next run, thus a power cycle of both target and
interface is required in order to run OpenOCD in JTAG mode again.

Put the SWJ-DP back to JTAG mode before exit from OpenOCD.

Use switch_seq(SWD_TO_JTAG) instead of dap_to_jtag(), because the
latter is not implemented on some interfaces. This is aligned
with the use of switch_seq(JTAG_TO_SWD) in swd_connect().

Change-Id: I55d3faebe60d6402037ec39dd9700dc5f17c53b0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4493
Tested-by: jenkins
Reviewed-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* Add RISC-V support.

This supports both 0.11 and 0.13 versions of the debug spec.

Support for `-rtos riscv` will come in a separate commit since it was
easy to separate out, and is likely to be more controversial.

Flash support for the SiFive boards will also come in a later commit.

Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4578
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* usb_blaster: Don't unnecessarily go through DR-/IR-Pause

There is no need to pass through DR-/IR-Pause after a scan if we want to
go to DR-/IR-Update. We just have to skip the first step of the path to
the end state because we already did that step when shifting the last
bit.

v2:
 - Fix comments as remarked in review of v1

Change-Id: I3c10f02794b2233f63d2150934e2768430873caa
Signed-off-by: Daniel Glöckner <daniel-gl@gmx.net>
Reviewed-on: http://openocd.zylin.com/4245
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* cortex_a: fix virt2phys when mmu is disabled

When the MMU is not enabled on debug state entry, virt2phys cannot
perform a translation since it is unknown whether a valid MMU
configuration existed before. In this case, return the virtual
address as physical address.

Change-Id: I6f85a7a5dbc200be1a4b5badf10a1a717f1c79c0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4480
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* drivers: cmsis-dap: print serial if available

Helpful for sanity checking connections

Change-Id: Ife0d8b4e12d4c03685aac8115c9739a4c1e994fe
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3405
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/cortex_m: make a variable local

The vec_ids variable is not referenced anywhere other than the vector
catch command handler. Make it local to that function.

Change-Id: Ie5865e8f78698c19a09f0b9d58269ced1c9db440
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4606
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/cortex_a: fix compile error for uninitialized variable

Commit ad6c71e151 introduced the
variable "mmu_enabled" whose pointer is passed to cortex_a_mmu()
that initialises it.
This initialization is not visible to the compiler that issue
a compile error.
The same situation is common across the same file and the usual
workaround is to initialize it to zero; thus the same fix i
applied here.

Ticket: https://sourceforge.net/p/openocd/tickets/197/
Fixes: commit ad6c71e151 ("cortex_a: fix virt2phys when mmu is disabled")
Change-Id: I77dec41acdf4c715b45ae37b72e36719d96d9283
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4619
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* mips_m4k: add optional reset handler

In some cases by using SRST we can't halt CPU early enough. And
option PrRst is not available too. In this case the only way is
to set BOOT flag over EJTAG and reset CPU or SoC from CPU itself.
For example by writing to some reset register.

This patch is providing possibility to use user defined reset-assert
handler which will be enabled only in case SRST is disabled. It is
needed to be able switch between two different reset variants on run
time.

Change-Id: I6ef98f1871ea657115877190f7cc7a5e8f3233e4
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4404
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* tcl/target: add config for Qualcomm QCA4531

The QCA4531 is a two stream (2x2) 802.11b/g/n single-band programmable
Wi-Fi System-on-Chip (SoC) for the Internet of Things (IoT).
https://www.qualcomm.com/products/qca4531

Change-Id: I58398c00943b005cfaf0ac1eaad92d1fa4e2cba7
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4405
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* tcl/board: add config for 8devices LIMA board

More information about this board can be found here:
https://www.8devices.com/products/lima

Change-Id: Id35a35d3e986630d58d37b47828870afd107cc6a
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4406
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* tcl/target|board: move common AR9331 code to atheros_ar9331.cfg

The ar9331_25mhz_pll_init and ar9331_ddr1_init routines
can be used not only for TP-Link MR3020 board,
so move them to the common atheros_ar9331.cfg file.

Change-Id: I04090856b08151d6bb0f5ef9cc654efae1c81835
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2999
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* tcl/target/atheros_ar9331: add DDR2 helper

this helper works on many different boards, so it is
good to have it in target config

Change-Id: I068deac36fdd73dbbcedffc87865cc5b9d992c1d
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4422
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* tcl/target/atheros_ar9331: add documentation and extra helpers

Sync it with experience gathered on Qualcomm QCA4531 SoC. This
chips are in many ways similar.

Change-Id: I06b9c85e5985a09a9be3cb6cc0ce3b37695d2e54
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4423
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* tcl/board: add DPTechnics DPT-Board-v1

it is Atheros AR9331 based IoT dev board.

Change-Id: I6fc3cdea1bef49c53045018ff5acfec4d5610ba6
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4424
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* fpga/altera-10m50: add all device id

add all currently know Intel (Alter) MAX 10 device ids

Change-Id: I6a88fef222c8e206812499d41be863c3d89fa944
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4598
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* target|board: Add Intel (Altera) Arria 10 target and related board

Target information about this SoC can be found here:
https://www.altera.com/products/fpga/arria-series/arria-10/overview.html

Achilles Instant-Development Kit Arria 10 SoC SoM:
https://www.reflexces.com/products-solutions/development-kits/arria-10/achilles-instant-development-kit-arria-10-soc-som

Change-Id: Id78c741be6a8b7d3a70f37d41088e47ee61b437a
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4583
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* target/riscv: fix compile error with gcc 8.1.1

Fix compile error:
src/target/riscv/riscv-011.c: In function ‘slot_offset’:
src/target/riscv/riscv-011.c:238:4: error: this statement may fall through
 [-Werror=implicit-fallthrough=]
    switch (slot) {
    ^~~~~~
src/target/riscv/riscv-011.c:243:3: note: here
   case 64:
   ^~~~

Fixes: a51ab8ddf6 ("Add RISC-V support.")
Change-Id: I7fa86b305bd90cc590fd4359c3698632d44712e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4618
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* server: explicitly call "shutdown" when catch CTRL-C or a signal

Every TCL command can be renamed (or deleted) and then replaced by
a TCL proc that has the same name of the original TCL command.
This can be used either to completely replace an existing command
or to wrap the original command to extend its functionality.
This applies also to the OpenOCD command "shutdown" and can be
useful, for example, to set back some default value to the target
before quitting OpenOCD.
E.g. (TCL code):
	rename shutdown original_shutdown
	proc shutdown {} {
		puts "This is my implementation of shutdown"
		# my own stuff before exit OpenOCD
		original_shutdown
	}

Unfortunately, sending a signal (or pressing CTRL-C) to terminate
OpenOCD doesn't trigger calling the original "shutdown" command
nor its (eventual) replacement.

Detect if the main loop is terminated by an external signal and
in such case execute explicitly the command "shutdown".
Replace with enum the magic numbers assumed by "shutdown_openocd".

Please notice that it's possible to write a custom "shutdown" TCL
proc that does not call the original "shutdown" command. This is
useful, for example, to prevent the user to quit OpenOCD by typing
"shutdown" in the telnet session.
Such case will not prevent OpenOCD to terminate when receiving a
signal; OpenOCD will quit after executing the custom "shutdown"
command.

Change-Id: I86b8f9eab8dbd7a28dad58b8cafd97caa7a82f43
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4551
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* zy1000: fix compile error with gcc 8.1.1

The fall-through comment is not taken in consideration by gcc 8.1.1
because it is inside the braces of a C-code block.

Move the comment outside the C block.

Change-Id: I22d87b2dee109fb8bcf2071ac55fdf7171ffcf4b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4614
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* flash/nor/tcl.c: fix flash bank bounds check in 'flash fill' command handler

Steps to reproduce ( STM32F103 'Blue Pill', 128KiB of flash ):
> flash fillh 0x0801FFFE 00 1
wrote 2 bytes to 0x0801fffe in 0.019088s (0.102 KiB/s)
> flash fillw 0x0801FFFE 00 1
Error: stm32f1x.cpu -- clearing lockup after double fault
Error: error waiting for target flash write algorithm
Error: error writing to flash at address 0x08000000 at offset 0x0001fffe

Change-Id: I145092ec5e45bc586b3df48bf37c38c9226915c1
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4516
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/arm_adi_v5: add command "dpreg"

For very low level debug or development around DAP, it is useful
to have direct access to DP registers.

Add command "dpreg" by mimic the syntax of the existing "apreg"
command:
	$dap_name dpreg reg [value]

Change-Id: Ic4ab451eb5e74453133adee61050b4c6f656ffa3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4612
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* nrf5: add free_driver_priv

Change-Id: I429a9868deb0c4b51f47a4bbad844bdc348e8d21
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/4608
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* rtos: add support for NuttX

This patch introduces RTOS support for NuttX. Currently,
only ARM Cortex-M (both FPU and FPU-less) targets are supported.

To use, add the following lines to ~/.gdbinit.

define hookpost-file
  eval "monitor nuttx.pid_offset %d", &((struct tcb_s *)(0))->pid
  eval "monitor nuttx.xcpreg_offset %d", &((struct tcb_s *)(0))->xcp.regs
  eval "monitor nuttx.state_offset %d", &((struct tcb_s *)(0))->task_state
  eval "monitor nuttx.name_offset %d", &((struct tcb_s *)(0))->name
  eval "monitor nuttx.name_size %d", sizeof(((struct tcb_s *)(0))->name)
end

And please make sure the above values are the same as in
src/rtos/nuttx_header.h

Change-Id: I2aaf8644d24dfb84b500516a9685382d5d8fe48f
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
Signed-off-by: Nobuto Kobayashi <Nobuto.Kobayashi@sony.com>
Reviewed-on: http://openocd.zylin.com/4103
Tested-by: jenkins
Reviewed-by: Alan Carvalho de Assis <acassis@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* server/server: Add ability to remove services

Add the ability to remove services while OpenOCD is running.

Change-Id: I4067916fda6d03485463fa40901b40484d94e24e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4054
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/cortex_m: fix incorrect comment

The code sets C_MASKINTS if that bit is not already set (correctly). Fix
the comment to agree.

Change-Id: If4543e2660a9fa2cdabb2d2698427a6c8d9a274c
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4620
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* tcl/target/stm32f0x: Allow overriding the Flash bank size

Copy & paste from another stm32 target.

Change-Id: I0f6cbcec974ce70c23c1850526354106caee1172
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Reviewed-on: http://openocd.zylin.com/4575
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* tcl/target: add Allwinner V3s SoC support

Change-Id: I2459d2b137050985b7301047f9651951d72d9e9e
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4427
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

* target/arm_adi_v5: allow commands apsel and apcsw during init phase

The current implementation of apsel cannot be executed during the
initialization phase because it queries the DAP AP to retrieve and
print the content of IDR register, and the query is only possible
later on during the exec phase.
But IDR information is already printed by the dedicated command
apid, making redundant printing it by apsel too.
Being unable to run apsel during initialization, makes also apcsw
command (that depends on apsel) not usable in such phase.

Modify the command apsel to only set the current AP, without making
any transfer to the (possibly not initialized yet) DAP. When run
without parameters, just print the current AP number.
Change mode to COMMAND_ANY to apsel and to apcsw.

Change-Id: Ibea6d531e435d1d49d782de1ed8ee6846e91bfdf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4624
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/cortex_a: allow command dacrfixup during init phase

There is no reason to restrict the command "cortex_a dacrfixup"
to the EXEC phase only.
Change the command mode to ANY so the command can be used in
the initialization phase too.

Change-Id: I498cc6b2dbdc48b3b2dd5f0445519a51857b295f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4623
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* target/armv7a_cache: add gdb keep-alive and fix a missing dpm finish

Depending on range size, the loop on cache operations can take quite
some time, causing gdb to timeout.

Add keep-alive to prevent gdb to timeout.
Add also a missing dpm->finish() to balance dpm->prepare().

Change-Id: Ia87934b1ec19a0332bb50e3010b582381e5f3685
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4627
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

* Add detail to `wrong register size` error.

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: Id31499c94b539969970251145e42c89c943fd87c
Reviewed-on: http://openocd.zylin.com/4577
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* doc: fix typo in cortex_m maskisr command

Change-Id: I37795c320ff7cbf6f2c7434e03b26dbaf6fc6db4
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4621
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/cortex_m: restore C_MASKINTS after reset

The cortex_m maskisr user-facing setting is not changed across a target
reset. However, the in-core C_MASKINTS bit was always cleared as part of
reset processing, meaning that a cortex_m maskisr on setting would not
be respected after a reset. Set C_MASKINTS based on the user-facing
setting value rather than always clearing it after reset.

Change-Id: I5aa5b9dfde04a0fb9c6816fa55b5ef1faf39f8de
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4605
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* tcl/board: update all uses of interface/stlink-v2-1 to interface/stlink

Change-Id: I5e27e84d022f73101376e8b4a1bdc65f58fd348a
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4456
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

* target/riscv/riscv-011: fix compile warning about uninitialized variable

In MSYS2 MinGW 64-bit
git clone git://git.code.sf.net/p/openocd/code openocd
$ gcc --version
gcc.exe (Rev1, Built by MSYS2 project) 8.2.0
./bootstrap
./configure --prefix=
$ cat config.status | grep CFLAGS
CFLAGS='-g -O2'
make bindir = "bin-x64"

depbase=`echo src/target/riscv/riscv-011.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\
/bin/sh ./libtool  --tag=CC   --mode=compile gcc -DHAVE_CONFIG_H -I.  -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl  -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF $depbase.Tpo -c -o src/target/riscv/riscv-011.lo src/target/riscv/riscv-011.c &&\
mv -f $depbase.Tpo $depbase.Plo
libtool: compile:  gcc -DHAVE_CONFIG_H -I. -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF src/target/riscv/.deps/riscv-011.Tpo -c src/target/riscv/riscv-011.c -o src/target/riscv/riscv-011.o
src/target/riscv/riscv-011.c: In function 'poll_target':
src/target/riscv/riscv-011.c:1799:6: error: 'reg' may be used uninitialized in this function [-Werror=maybe-uninitialized]
      reg_cache_set(target, reg, ((data & 0xffffffff) << 32) | value);
      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
src/target/riscv/riscv-011.c:1686:17: note: 'reg' was declared here
    unsigned int reg;
                 ^~~
cc1.exe: all warnings being treated as errors
make[2]: *** [Makefile:3250: src/target/riscv/riscv-011.lo] Error 1

Change-Id: I6996dcb866fbace26817636f4bedba09510a087f
Signed-off-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
Reviewed-on: http://openocd.zylin.com/4635
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-20 14:55:30 -07:00
Tim Newsome 684d7d6764
Remove unused variable. (#284)
Change-Id: Iedebce86b5d914ff612a4747ffdc6f776edca783
2018-08-20 12:42:30 -07:00
Svetoslav Enchev 404495b191 target/riscv/riscv-011: fix compile warning about uninitialized variable
In MSYS2 MinGW 64-bit
git clone git://git.code.sf.net/p/openocd/code openocd
$ gcc --version
gcc.exe (Rev1, Built by MSYS2 project) 8.2.0
./bootstrap
./configure --prefix=
$ cat config.status | grep CFLAGS
CFLAGS='-g -O2'
make bindir = "bin-x64"

depbase=`echo src/target/riscv/riscv-011.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\
/bin/sh ./libtool  --tag=CC   --mode=compile gcc -DHAVE_CONFIG_H -I.  -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl  -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF $depbase.Tpo -c -o src/target/riscv/riscv-011.lo src/target/riscv/riscv-011.c &&\
mv -f $depbase.Tpo $depbase.Plo
libtool: compile:  gcc -DHAVE_CONFIG_H -I. -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF src/target/riscv/.deps/riscv-011.Tpo -c src/target/riscv/riscv-011.c -o src/target/riscv/riscv-011.o
src/target/riscv/riscv-011.c: In function 'poll_target':
src/target/riscv/riscv-011.c:1799:6: error: 'reg' may be used uninitialized in this function [-Werror=maybe-uninitialized]
      reg_cache_set(target, reg, ((data & 0xffffffff) << 32) | value);
      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
src/target/riscv/riscv-011.c:1686:17: note: 'reg' was declared here
    unsigned int reg;
                 ^~~
cc1.exe: all warnings being treated as errors
make[2]: *** [Makefile:3250: src/target/riscv/riscv-011.lo] Error 1

Change-Id: I6996dcb866fbace26817636f4bedba09510a087f
Signed-off-by: Svetoslav Enchev <svetoslav.enchev@gmail.com>
Reviewed-on: http://openocd.zylin.com/4635
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-14 04:32:46 +01:00
Christopher Head c6cc60e0e1 target/cortex_m: restore C_MASKINTS after reset
The cortex_m maskisr user-facing setting is not changed across a target
reset. However, the in-core C_MASKINTS bit was always cleared as part of
reset processing, meaning that a cortex_m maskisr on setting would not
be respected after a reset. Set C_MASKINTS based on the user-facing
setting value rather than always clearing it after reset.

Change-Id: I5aa5b9dfde04a0fb9c6816fa55b5ef1faf39f8de
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4605
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-14 04:31:38 +01:00
Ken Zhang 37d0dd0844 Update s25fl256 flash device id, cypress now. (#285)
* Updated s25fl256 flash device id, cypress now.

* Put the old entry back to support older board.
2018-08-08 13:01:11 -07:00
Tim Newsome fd0446002f Add detail to `wrong register size` error.
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: Id31499c94b539969970251145e42c89c943fd87c
Reviewed-on: http://openocd.zylin.com/4577
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-08 20:30:09 +01:00
Antonio Borneo 527113ad2b target/armv7a_cache: add gdb keep-alive and fix a missing dpm finish
Depending on range size, the loop on cache operations can take quite
some time, causing gdb to timeout.

Add keep-alive to prevent gdb to timeout.
Add also a missing dpm->finish() to balance dpm->prepare().

Change-Id: Ia87934b1ec19a0332bb50e3010b582381e5f3685
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4627
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-08 10:36:28 +01:00
craigblackmore e4d98b83da Fix target not halting when GDB jumps to a hardware breakpoint (#283)
* Fix target not halting when GDB jumps to a hardware breakpoint

This issue affects riscv-0.11. It is caused by OpenOCD manually
stepping over hardware breakpoints to resume or step after a halt.
This is not necessary as GDB should remove and add breakpoints as
required.

At the moment OpenOCD still steps over hardware watchpoints manually
as GDB needs to know which address triggered the watchpoint and
OpenOCD does not currently provide this information.

Tested on the freedom-e310-arty using the GDB regression suite.
There is one regression which is a corner case caused by a GDB bug.
If a breakpoint is set in GDB and then the executable file is
discarded, GDB reverts to its default information about address
sizes e.g. on the freedom-e310-arty, 0x20400000 becomes
0xffff20400000. As a result, GDB is unable to step over breakpoints
set before the executable was discarded.

* Fix style issues

* Revert "Fix style issues"

This reverts commit 43e7e4b60a.

* Revert "Fix target not halting when GDB jumps to a hardware breakpoint"

This reverts commit e2717e4cfa.

* Don't step over breakpoints
2018-08-06 12:41:42 -07:00
Antonio Borneo 766d6114fe target/cortex_a: allow command dacrfixup during init phase
There is no reason to restrict the command "cortex_a dacrfixup"
to the EXEC phase only.
Change the command mode to ANY so the command can be used in
the initialization phase too.

Change-Id: I498cc6b2dbdc48b3b2dd5f0445519a51857b295f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4623
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-08-06 11:19:20 +01:00
Antonio Borneo e48690cb26 target/arm_adi_v5: allow commands apsel and apcsw during init phase
The current implementation of apsel cannot be executed during the
initialization phase because it queries the DAP AP to retrieve and
print the content of IDR register, and the query is only possible
later on during the exec phase.
But IDR information is already printed by the dedicated command
apid, making redundant printing it by apsel too.
Being unable to run apsel during initialization, makes also apcsw
command (that depends on apsel) not usable in such phase.

Modify the command apsel to only set the current AP, without making
any transfer to the (possibly not initialized yet) DAP. When run
without parameters, just print the current AP number.
Change mode to COMMAND_ANY to apsel and to apcsw.

Change-Id: Ibea6d531e435d1d49d782de1ed8ee6846e91bfdf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4624
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-06 11:19:11 +01:00
Christopher Head c04a59286e target/cortex_m: fix incorrect comment
The code sets C_MASKINTS if that bit is not already set (correctly). Fix
the comment to agree.

Change-Id: If4543e2660a9fa2cdabb2d2698427a6c8d9a274c
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4620
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:37:20 +01:00
Marc Schink 9bcd2b2fa3 server/server: Add ability to remove services
Add the ability to remove services while OpenOCD is running.

Change-Id: I4067916fda6d03485463fa40901b40484d94e24e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4054
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:34:13 +01:00
Masatoshi Tateishi 9ec306e95a rtos: add support for NuttX
This patch introduces RTOS support for NuttX. Currently,
only ARM Cortex-M (both FPU and FPU-less) targets are supported.

To use, add the following lines to ~/.gdbinit.

define hookpost-file
  eval "monitor nuttx.pid_offset %d", &((struct tcb_s *)(0))->pid
  eval "monitor nuttx.xcpreg_offset %d", &((struct tcb_s *)(0))->xcp.regs
  eval "monitor nuttx.state_offset %d", &((struct tcb_s *)(0))->task_state
  eval "monitor nuttx.name_offset %d", &((struct tcb_s *)(0))->name
  eval "monitor nuttx.name_size %d", sizeof(((struct tcb_s *)(0))->name)
end

And please make sure the above values are the same as in
src/rtos/nuttx_header.h

Change-Id: I2aaf8644d24dfb84b500516a9685382d5d8fe48f
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
Signed-off-by: Nobuto Kobayashi <Nobuto.Kobayashi@sony.com>
Reviewed-on: http://openocd.zylin.com/4103
Tested-by: jenkins
Reviewed-by: Alan Carvalho de Assis <acassis@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:33:50 +01:00
Jim Paris 7ce8624dbf nrf5: add free_driver_priv
Change-Id: I429a9868deb0c4b51f47a4bbad844bdc348e8d21
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/4608
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:33:12 +01:00
Antonio Borneo 6738e447c5 target/arm_adi_v5: add command "dpreg"
For very low level debug or development around DAP, it is useful
to have direct access to DP registers.

Add command "dpreg" by mimic the syntax of the existing "apreg"
command:
	$dap_name dpreg reg [value]

Change-Id: Ic4ab451eb5e74453133adee61050b4c6f656ffa3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4612
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:32:53 +01:00
Bohdan Tymkiv d92773b205 flash/nor/tcl.c: fix flash bank bounds check in 'flash fill' command handler
Steps to reproduce ( STM32F103 'Blue Pill', 128KiB of flash ):
> flash fillh 0x0801FFFE 00 1
wrote 2 bytes to 0x0801fffe in 0.019088s (0.102 KiB/s)
> flash fillw 0x0801FFFE 00 1
Error: stm32f1x.cpu -- clearing lockup after double fault
Error: error waiting for target flash write algorithm
Error: error writing to flash at address 0x08000000 at offset 0x0001fffe

Change-Id: I145092ec5e45bc586b3df48bf37c38c9226915c1
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4516
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:32:26 +01:00
Antonio Borneo 64bb624479 zy1000: fix compile error with gcc 8.1.1
The fall-through comment is not taken in consideration by gcc 8.1.1
because it is inside the braces of a C-code block.

Move the comment outside the C block.

Change-Id: I22d87b2dee109fb8bcf2071ac55fdf7171ffcf4b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4614
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:32:03 +01:00
Antonio Borneo 5e13e01141 server: explicitly call "shutdown" when catch CTRL-C or a signal
Every TCL command can be renamed (or deleted) and then replaced by
a TCL proc that has the same name of the original TCL command.
This can be used either to completely replace an existing command
or to wrap the original command to extend its functionality.
This applies also to the OpenOCD command "shutdown" and can be
useful, for example, to set back some default value to the target
before quitting OpenOCD.
E.g. (TCL code):
	rename shutdown original_shutdown
	proc shutdown {} {
		puts "This is my implementation of shutdown"
		# my own stuff before exit OpenOCD
		original_shutdown
	}

Unfortunately, sending a signal (or pressing CTRL-C) to terminate
OpenOCD doesn't trigger calling the original "shutdown" command
nor its (eventual) replacement.

Detect if the main loop is terminated by an external signal and
in such case execute explicitly the command "shutdown".
Replace with enum the magic numbers assumed by "shutdown_openocd".

Please notice that it's possible to write a custom "shutdown" TCL
proc that does not call the original "shutdown" command. This is
useful, for example, to prevent the user to quit OpenOCD by typing
"shutdown" in the telnet session.
Such case will not prevent OpenOCD to terminate when receiving a
signal; OpenOCD will quit after executing the custom "shutdown"
command.

Change-Id: I86b8f9eab8dbd7a28dad58b8cafd97caa7a82f43
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4551
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:31:37 +01:00
Antonio Borneo d537cce7ef target/riscv: fix compile error with gcc 8.1.1
Fix compile error:
src/target/riscv/riscv-011.c: In function ‘slot_offset’:
src/target/riscv/riscv-011.c:238:4: error: this statement may fall through
 [-Werror=implicit-fallthrough=]
    switch (slot) {
    ^~~~~~
src/target/riscv/riscv-011.c:243:3: note: here
   case 64:
   ^~~~

Fixes: a51ab8ddf6 ("Add RISC-V support.")
Change-Id: I7fa86b305bd90cc590fd4359c3698632d44712e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4618
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-08-01 08:26:44 +01:00
Oleksij Rempel 16e95146be mips_m4k: add optional reset handler
In some cases by using SRST we can't halt CPU early enough. And
option PrRst is not available too. In this case the only way is
to set BOOT flag over EJTAG and reset CPU or SoC from CPU itself.
For example by writing to some reset register.

This patch is providing possibility to use user defined reset-assert
handler which will be enabled only in case SRST is disabled. It is
needed to be able switch between two different reset variants on run
time.

Change-Id: I6ef98f1871ea657115877190f7cc7a5e8f3233e4
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4404
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 15:54:28 +01:00
Paul Bartholomew 4896c83ce8 target/cortex_a: fix compile error for uninitialized variable
Commit ad6c71e151 introduced the
variable "mmu_enabled" whose pointer is passed to cortex_a_mmu()
that initialises it.
This initialization is not visible to the compiler that issue
a compile error.
The same situation is common across the same file and the usual
workaround is to initialize it to zero; thus the same fix i
applied here.

Ticket: https://sourceforge.net/p/openocd/tickets/197/
Fixes: commit ad6c71e151 ("cortex_a: fix virt2phys when mmu is disabled")
Change-Id: I77dec41acdf4c715b45ae37b72e36719d96d9283
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4619
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-27 14:12:08 +01:00
Christopher Head 11e3b6fb09 target/cortex_m: make a variable local
The vec_ids variable is not referenced anywhere other than the vector
catch command handler. Make it local to that function.

Change-Id: Ie5865e8f78698c19a09f0b9d58269ced1c9db440
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4606
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-25 14:18:44 +01:00
Karl Palsson 1e374d508b drivers: cmsis-dap: print serial if available
Helpful for sanity checking connections

Change-Id: Ife0d8b4e12d4c03685aac8115c9739a4c1e994fe
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3405
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-25 14:17:00 +01:00
Matthias Welwarsky ad6c71e151 cortex_a: fix virt2phys when mmu is disabled
When the MMU is not enabled on debug state entry, virt2phys cannot
perform a translation since it is unknown whether a valid MMU
configuration existed before. In this case, return the virtual
address as physical address.

Change-Id: I6f85a7a5dbc200be1a4b5badf10a1a717f1c79c0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4480
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:08:12 +01:00
Daniel Glöckner e57f8e12da usb_blaster: Don't unnecessarily go through DR-/IR-Pause
There is no need to pass through DR-/IR-Pause after a scan if we want to
go to DR-/IR-Update. We just have to skip the first step of the path to
the end state because we already did that step when shifting the last
bit.

v2:
 - Fix comments as remarked in review of v1

Change-Id: I3c10f02794b2233f63d2150934e2768430873caa
Signed-off-by: Daniel Glöckner <daniel-gl@gmx.net>
Reviewed-on: http://openocd.zylin.com/4245
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:07:44 +01:00
Tim Newsome a51ab8ddf6 Add RISC-V support.
This supports both 0.11 and 0.13 versions of the debug spec.

Support for `-rtos riscv` will come in a separate commit since it was
easy to separate out, and is likely to be more controversial.

Flash support for the SiFive boards will also come in a later commit.

Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4578
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:07:26 +01:00
Antonio Borneo 9363705820 arm_adi_v5: put SWJ-DP back to JTAG mode at exit
When SWD mode is used, current OpenOCD code left the SWJ-DP in
SWD mode at exit. Also, current code is unable to switch back the
SWJ-DP in JTAG at next run, thus a power cycle of both target and
interface is required in order to run OpenOCD in JTAG mode again.

Put the SWJ-DP back to JTAG mode before exit from OpenOCD.

Use switch_seq(SWD_TO_JTAG) instead of dap_to_jtag(), because the
latter is not implemented on some interfaces. This is aligned
with the use of switch_seq(JTAG_TO_SWD) in swd_connect().

Change-Id: I55d3faebe60d6402037ec39dd9700dc5f17c53b0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4493
Tested-by: jenkins
Reviewed-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:06:59 +01:00
Antonio Borneo c5658364b2 drivers: cmsis_dap_usb: implement cmd JTAG_TMS
Simply add a wrapper around cmsis_dap_cmd_DAP_SWJ_Sequence()

Change-Id: Icf86f84b24e9fec56e2f9e155396aac34b0e06d2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4517
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-07-23 14:12:10 +01:00
Darius Rad fe38562dbe Avoid dereferencing NULL pointer.
If a NULL pointer is passed, don't attempt to increment it.  This avoids
passing the now not-NULL pointer on and eventually segfaulting.  Also
remove some unnecessary temporary variables.

Change-Id: I268e225121aa283d59179bfae407ebf6959d3a4e
Signed-off-by: Darius Rad <darius@bluespec.com>
Reviewed-on: http://openocd.zylin.com/4550
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-07-23 14:04:42 +01:00
Antonio Borneo 42097baf19 armv7a: read ttbcr and ttb0/1 at every entry in debug state
Commit bfc5c764df avoids reading
ttbcr and ttb0/1 at every virt2phys translation by caching them,
and it updates the cached values in armv7a_arch_state().
But the purpose of any (*arch_state)() method, thus including
armv7a_arch_state(), is to only print out and inform the user
about some architecture specific status.
Moreover, to reduce the verbosity during a GDB session, the
method (*arch_state)() is not executed anymore at debug state
entry (check use of target->verbose_halt_msg in src/openocd.c),
thus the state of translation table gets out-of-sync triggering
	Error: Address translation failure
or even using a wrong address in the memory R/W operation.

In addition, the commit above breaks the case of armv7r by
calling armv7a_read_ttbcr() unconditionally.

Fixed by moving in cortex_a_post_debug_entry() the call to
armv7a_read_ttbcr() on armv7a case only.
Remove the call to armv7a_read_ttbcr() in armv7a_identify_cache()
since it is (conditionally) called only in the same procedure
cortex_a_post_debug_entry().

Fixes: bfc5c764df ("armv7a: cache ttbcr and ttb0/1 on debug
state entry")
Change-Id: Ifc20eca190111832e339a01b7f85d28c1547c8ba
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4601
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-22 09:09:06 +01:00
Brent Roman c584686fd1 server: Improve signal handling under Linux
Commit 5087a955 added custom signal handlers for the openocd
server process.

Before this commit, when openocd is run as a background process
having the same controlling terminal as gdb, Control-C would be
handled by gdb to stop target execution and return to the gdb prompt.

However, after commit 5087a955, the SIGINT caused by pressing
Control-C also terminates openocd, effectively crashing the
debugging session.  The only way to avoid this is run openocd in
a different controling terminal or to detach openocd from its
controlling terminal,
thus losing all job control for the openocd process.

This patch improves the server's handling of POSIX signals:
1) Keyboard generated signals (INT and QUIT) are ignored
   when server process has is no controlling terminal.
2) SIGHUP and SIGPIPE are handled to ensure that .quit functions
   for each interface are called if user's logs out of X
   session or there is a network failure.

SIG_INT & SIG_QUIT still stop openocd
when it is running in the foreground.

Change-Id: I03ad645e62408fdaf4edc49a3550b89b287eda10
Signed-off-by: Brent Roman <genosensor@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3963
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-07-21 07:43:23 +01:00
Dennis Ostermann e59bb6c285 target/aarch64: Call aarch64_init_debug_access() earlier in aarch64_deassert_reset()
On Renesas R-Car, calling 'reset halt' and 'reset init' always made DAP inaccessible. Calling 'reset' and 'halt' seperatly worked fine.
The only differences seems to be the point in time when aarch64_init_debug_access() is called. This patch aligns the behaviour.

Change-Id: I2296c65e48414a7d9846f12a395e5eca315b49ca
Signed-off-by: Dennis Ostermann <dennis.ostermann@renesas.com>
Reviewed-on: http://openocd.zylin.com/4607
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-20 15:14:46 +01:00
Tim Newsome 2d9904ada7
Merge pull request #277 from riscv/fespi_free
Define free_driver_priv for fespi flash driver
2018-07-19 15:21:58 -07:00
Marc Schink 9f93cca427 target/armv7m_trace: Use prefix for enums
Change-Id: I3f199e6053146a1094d96b98ea174b41bb021599
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3905
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-19 10:49:24 +01:00
Marc Schink 55abb63752 target/armv7m_trace: Fix typo in enum
Change-Id: I6364ee5011ef2d55c59674e3b97504a285de0cb2
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3904
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-19 10:48:58 +01:00
Tim Newsome f0a9976eaa Mimic openrisc Makefile structure
That's better than inventing our own. Also this fixes a build issue in
the official OpenOCD regression build.

Change-Id: I042faa5b93b26e6f6b2d62bee62f21474ec74131
2018-07-18 13:42:30 -07:00
Marc Schink abc270c883 target: Fix segfault for 'mem2array'
Call 'mem2array' without arguments to reproduce the segmentation
fault.

Change-Id: I02bf46cc8bd317abbb721a8c75d7cbfac99eb34e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4534
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-18 21:27:12 +01:00
James Jacobsson d293583e03 nrf5: Add HWID 0x139 (52832 rev E0)
Change-Id: I71b7471ccfcb8fcc6de30da57ce4165c7fb1f73f
Signed-off-by: James Jacobsson <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4604
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:11:12 +01:00
Liviu Ionescu 6fa18a455f Avoid null target->semihosting references.
The new common semihosting code introduced a bug,
in certain conditions target->semihosting was
used without semihosting being initialised.

The solution was to explicitly test for
target->semihosting before dereferencing it.

Change-Id: I4c83e596140c68fe4ab32e586e51f7e981a40798
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4603
Tested-by: jenkins
Reviewed-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:10:53 +01:00
Marc Schink e270127288 flash/nor/stm32lx: Add revision 'V' for STM32L1xx Cat.3 devices
Change-Id: Ic92b0fb5b738af3bec79ae335876aa9e26f5f4cd
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4600
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-07-18 21:10:33 +01:00
Erwin Oegema c4c14d614b flash/nor/at91sam4: fix sam4sa16c flash banks and its gpnvms count
There was already a github fork that had this fixed, but as we try
to use the latest, non-modified version of all software we use,
I would like to have this fix in the next releases of OpenOCD so
that if people uses $packagemanager, they will not have issues flashing
the last part of the flash of sam4sa16c chips.

Additionally, I've added some more logging related to the flash
bank that was used, and the chip ID that was detected.

Change-Id: I7ea5970105906e4560b727e46222ae9a91e41559
Signed-off-by: Erwin Oegema <blablaechthema@hotmail.com>
Reviewed-on: http://openocd.zylin.com/4599
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-07-18 21:10:07 +01:00
Edward Fewell 3e84da55a6 flash/nor: add support for TI MSP432 devices
Added msp432 flash driver to support the TI MSP432P4x and
MSP432E4x microcontrollers. Implemented the flash algo
helper as used in the TI debug and flash tools. This
implemention supports the MSP432E4, Falcon, and Falcon 2M
variants. The flash driver automatically detects the
connected variant and configures itself appropriately.
Added command to mass erase device for consistency with
TI tools and added command to unlock the protected BSL
region.

Tested using MSP432E401Y, MSP432P401R, and MSP432P4111
LaunchPads.
Tested with embedded XDS110 debug probe in CMSIS-DAP
mode and with external SEGGER J-Link probe.

Removed ti_msp432p4xx.cfg file made obsolete by this
patch.
Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4153
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:09:23 +01:00
Karl Palsson b24301a01a drivers: cmsis-dap: Print version info when available
No need to wait until after connecting, might help diagnose part information by
printing earlier.

Change-Id: I51eb0d584be306baa811fbeb1ad6a604773e602c
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3404
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:08:20 +01:00
Karl Palsson 5aceec2412 drivers: cmsis-dap: pull up common connect code
Just a minor deduplication

Change-Id: Idd256883e5f6d4bd4dcc18462dd5468991f507b3
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3403
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:07:43 +01:00
Dominik Peklo 3a5b2b66db flash/nor/tcl: Distinguish between sectors and blocks in status messages
Use the right word in flash protect command status messages based on
whether the target bank defines num_prot_blocks. Minor message style
tidy-up.

Change-Id: I5f40fb5627422536ce737f242fbf80feafe7a1fc
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Reviewed-on: http://openocd.zylin.com/4573
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-18 21:07:15 +01:00
Hellosun Wu e36c2f2da4 nds32: Avoid detected JTAG clock
AICE2 doesn't support scan for the maximum clock frequency of
JTAG chain. It will cause USB command timeout.

Change-Id: I41d1e3be387b6ed5a4dd0be663385a5f053fbcf9
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/4292
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:06:51 +01:00
Christopher Hoover 84b571f667 Adds SAMD11D14AU flash support.
Corrects names of SAMD11D14AM and SAMD11D14ASS per datasheet.

Change-Id: I8beb15d5376966a4f8d7de76bfb2cbda2db440dc
Signed-off-by: Christopher Hoover <ch@murgatroid.com>
Reviewed-on: http://openocd.zylin.com/4597
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:06:20 +01:00
Tomas Vanek 493d2f5a34 psoc5lp: fix erase check, add free_driver_priv
psoc5lp_erase_check() was not properly adapted to the new
armv7m_blank_check_memory() in the hot fix 53376dbbed
This change fixes handling of num_sectors in dependecy of ecc_enabled.
Also add comments how ecc_enabled influences num_sectors.

Add pointer to default_flash_free_driver_priv() to all psoc5lp flash
drivers to keep valgrind happy.

Change-Id: Ie1806538becd364fe0efb7a414f0fe6a84b2055b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4569
Tested-by: jenkins
2018-07-18 21:04:52 +01:00
Tim Newsome c7bcdab242
Merge pull request #275 from riscv/cleanup
Revert unnecessary change.
2018-07-17 12:06:24 -07:00
Tim Newsome 8b25d2f2ee
Merge pull request #279 from riscv/work_area
Use work area instead of riscv-specific config
2018-07-17 12:06:09 -07:00
Tim Newsome ead2a595b8 Use work area instead of riscv-specific config
Per review requested at http://openocd.zylin.com/#/c/4578/3

Change-Id: I1a8117665d38844dc1479f33b4f9b7c8f9f101c8
2018-07-16 14:43:15 -07:00
Cody Schafer 4a9a07b1c5 target/image: make i/j unsigned to avoid ubsan runtime error
src/target/image.c:1055:15: runtime error: left shift of 128 by 24 places cannot be represented in type 'int'

Change-Id: I322fd391cf3f242beffc8a274824763c8c5e69a4
Signed-off-by: Cody Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4584
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-13 17:15:57 +01:00
Antonio Borneo 73de828988 gdb_server: set current_target from connection's one
In a multi-target environment we are supposed to have a single
gdb server for each target (or for each group of targets within
a SMP node).
By default, the gdb attached to a server sends its command to
the target (or to the SMP node targets) linked to that server.

This is working fine for the normal gdb commands, but it is
broken for the native OpenOCD commands executed through gdb
"monitor" command. In the latter case, gdb "monitor" commands
will be executed on the current target of OpenOCD configuration
script (that is either the last target created or the target
specified in a "targets" command).

Fixed in gdb_new_connection() by replacing the current target
in the connection's copy of command context.

Change-Id: If7c8f2dce4a3138f0907d3000dd0b15e670cfa80
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4586
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-13 17:15:35 +01:00
Antonio Borneo 421e75722d gdb_server: only trigger once the event gdb-detach at gdb quit
When GDB quits (e.g. with "quit" command) we first execute
gdb_detach() to reply "OK" then, at GDB disconnect (either TCP
or pipe connection type), we execute gdb_connection_closed().
In case GDB is killed or it crashes, OpenOCD only executes the
latter when detects the disconnection.
Both gdb_detach() and gdb_connection_closed() trigger the event
TARGET_EVENT_GDB_DETACH thus getting it triggered twice on clean
GDB quit.

Do not trigger the event TARGET_EVENT_GDB_DETACH in gdb_detach()
and let only gdb_connection_closed() to handle it.

Change-Id: Iacf035c855b8b3e2239c1c0e259c279688b418ee
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4585
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-13 17:15:13 +01:00
Andreas Färber b82ee0799f target: armv8: Avoid semihosting segfault on halt
Avoid a NULL pointer dereference when halting an aarch64 core.

Change-Id: I333d40475ab26e2f0dca5c27302a5fa4d817a12f
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4593
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-13 09:19:09 +01:00
Omair Javaid 0aa8e8cfc3 GDB fileIO stdout support
This patch fixes gdb fileio support to allow gdb console to be used as stdout.

Now we can do something like
gdb <inferior file>

(gdb) tar ext :3333
(gdb) load
(gdb) monitor arm semihosting enable
(gdb) monitor arm semihosting_fileio enable
(gdb) continue

Here: Output from inferior using puts, printf etc will be routed to gdb console.

Change-Id: I9cb0dddda1de58038c84f5b035c38229828cd744
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4538
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-13 09:18:21 +01:00
Omair Javaid a7da117ad6 Add ARM v8 AArch64 semihosting support
This patch implements semihosting support for AArch64. This picks
code from previously submitted AArch64 semihosting support patch
and rebases on top of reworked semihosting code. Tested in AArch64
mode on a Lemaker Hikey Board with NewLib and GDB.

Change-Id: I228a38f1de24f79e49ba99d8514d822a28c2950b
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4537
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-13 09:18:14 +01:00
Tim Newsome 29eaa1fac1 Define free_driver_priv for fespi flash driver
Fixes #276.

Change-Id: I42baabfef3e29d7d92de4f1c9211f9c567bcbd34
2018-07-12 16:59:01 -07:00
Antonio Borneo d04254196e target: fix 'bp' command help message
"asid" and "length" are separate arguments of the command.
Put space between them.

Change-Id: I36cfc1e3a01caafef4fc3b26972a0cc192b0b963
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4511
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-09 20:12:48 +01:00
Christopher Head 4999c9d980 flash/nor/stm32h7: Fix incorrect comment
The name of the bit according to the reference manual is inconsistency
error, not increment error.

Change-Id: Ie3b73c0312db586e35519e03fd1a5cb225673d97
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4521
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-07-03 07:48:40 +01:00
Christopher Head f9d7554ee4 flash/nor/stm32: Eliminate working area leak
On a specific early-return path, an allocated working area was not
freed. Free it.

Change-Id: I7c8fe51ff475f191624086996be1c77251780b77
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4520
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-03 07:48:04 +01:00
Christopher Head 47d0930410 flash/nor/stm32: Report errors in wait_status_busy
Flash operation errors that occur during algorithm programming are
reported via the algorithm return value. However, Flash operation
errors that occur during non-algorithm work (erasing, programming
without a work area, programming the last non-multiple-of-32-bytes on
an H7, etc.) generally end with a call to stm32x_wait_status_busy,
which reads the status register and clears the error flags but fails
to actually report that something went wrong should an error flag
(other than WRPERR) be set. Return an error status from
stm32x_wait_status_busy in those cases. Correct a log message
accordingly.

Change-Id: I09369ea5f924fe58833aec1f45e52320ab4aaf43
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4519
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-03 07:47:14 +01:00
Antonio Borneo 541dcc2487 target/cortex_m: return error if breakpoint address is out of range
If the "Flash Patch and Breakpoint" unit is rev.1 then it can only
accept breakpoint addresses below 0x1FFFFFFF.
Detailed info in "ARM v7-M Architecture Reference Manual", DDI0403E
at chapter "C1.11 Flash Patch and Breakpoint unit".

Print a message and return error if the address of hardware
breakpoint cannot be handled by the breakpoint unit.

Change-Id: I95c92b1f058f0dfc568bf03015f99e439b27c59b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4535
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2018-07-03 07:28:02 +01:00
Antonio Borneo 91c125a906 jtag/drivers/cmsis-dap: fix connect in cmsis_dap_swd_switch_seq()
The proc cmsis_dap_swd_switch_seq() is part of the SWD API for
this interface driver. It is valid only when the interface is
used in SWD mode.
In this proc there is the need to call, in sequence, first
cmsis_dap_cmd_DAP_Disconnect() then cmsis_dap_cmd_DAP_Connect().
The latter call requires the connection mode as parameter, that
inside cmsis_dap_swd_switch_seq() can only be CONNECT_SWD.

The current implementation is not correct and in some cases can
pass mode CONNECT_JTAG. Moreover, JTAG is optional in CMSIS-DAP
and passing mode CONNECT_JTAG triggers an error with SWD-only
interfaces.

Use mode CONNECT_SWD in SWD specific cmsis_dap_swd_switch_seq().

Change-Id: Ib455bf5b69cb2a2d146a6c8875387b00c27a5690
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4571
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-03 07:27:14 +01:00
Tim Newsome d8c31bfd2c Revert unnecessary change.
This reduces the diff with upstream.

Change-Id: I83eaa6317b4ec183f76ca5f7eb69eefe84aaa17a
2018-06-25 14:09:47 -07:00
Antonio Borneo 1dc466f515 target/arm_adi_v5: keep CSW and TAR cache updated
The call to dap_queue_ap_write() can fail and the value in CSW and
TAR becomes unknown.

Invalidate the OpenOCD cache if dap_queue_ap_write() fails.

Change-Id: Id6ec370b4c5ad07e454464780c1a1c8ae34ac870
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4564
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-22 09:24:59 +01:00
Antonio Borneo 0057c71ab6 target/arm_adi_v5: sync CSW and TAR cache on apreg write
When using apreg to change AP registers CSW or TAR we get internal
cached value not valid anymore.

Reuse the setup functions for CSW and TAR to write them.
Invalidate the cached value before the call to force the write, thus
keeping original apreg behaviour.

Change-Id: Ib14fafd5e584345de94f2e983de55406c588ac1c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4565
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-22 09:24:37 +01:00
Liviu Ionescu 4301ad83db mips_m4k.c: Fix build with --disable-target64
Replace PRIx64 with TARGET_PRIxADDR to avoid build problems
when --disable-target64 is used during configure.

Change-Id: I054a27a491e86c42c9386a0488194320b808ba96
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4566
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tim Newsome <tim@sifive.com>
2018-06-22 09:24:17 +01:00
James Marshall a0356398e5 target/arm: Add PLD command to ARM disassembler.
Updates the ARM disassembler to handle PLD (PreLoad Data) commands.
Previously handled by printing a TODO message. There are three forms of
the command: literal, register, and immediate. Simply decode based off
of the A1 encoding for the instructions in the ARM ARM. Also fixes mask
to handle PLDW commands.

Change-Id: I63bf97f16af254e838462c7cfac80f6c4681c556
Signed-off-by: James Marshall <jcmarsh@gwmail.gwu.edu>
Reviewed-on: http://openocd.zylin.com/4348
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-06-22 07:42:27 +01:00
Tim Newsome 6c59fb8df4 Explain why reg_cache_values isn't per-hart.
Change-Id: Ie67e43bf89fdc68b4b2c12f37fa8a3ec3e6088ef
2018-06-20 14:52:38 -07:00
Antonio Borneo 548bcee30d flash/nor/psoc5lp: fix compile issue on GCC 8.1.0
Issue already identified by Alex https://sourceforge.net/u/alexbour/
in ticket #191 https://sourceforge.net/p/openocd/tickets/191/

	src/flash/nor/psoc5lp.c:237:2: error: ‘strncpy’ output
	truncated before terminating nul copying 2 bytes from a
	string of the same length [-Werror=stringop-truncation]

Fix it by assigning the value to the array elements.

Change-Id: I22468e5700efa64ea48ae8cdec930c48b4a7d8fb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4563
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-15 20:11:36 +01:00
Tomas Vanek 62b088df4e src/flash/tms470: remove testing of sectors[].is_erased state
The erase check routine checked sectors only if is_erased != 1

Check sector unconditionally.

While on it fix clang static analyzer warnings.

Change-Id: I9988615fd8530c55a9b0c54b1900f89b550345e9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4401
Tested-by: jenkins
2018-06-15 20:07:22 +01:00
Tomas Vanek f05bcdebbb flash/nor/nrf5: remove is_erased setting and autoerase before write
Cached flash erase state in sectors[].is_erased is not reliable as running
target can change the flash.

Autoerase was issued before flash write on condition is_erased != 1
Remove autoerase completely as it is a quite non-standard feature.

Change-Id: I19bef459e6afdc4c5fcaa2ccd194cf05be8a42b6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4400
Tested-by: jenkins
2018-06-15 20:07:09 +01:00
Edward Fewell 7b03129916 flash/nor: Add support for TI CC26xx/CC13xx flash
Added cc26xx flash driver to support the TI CC26xx and CC13xx
microcontrollers. Driver is capable of determining which MCU
is connected and configures itself accordingly. Added config
files for four specific variants: CC26x0, CC13x0, CC26x2, and
CC13x2.

Note that the flash loader code is based on the sources used
to support flash in Code Composer Studio and Uniflash from TI.

Removed cc26xx.cfg file made obsolete by this patch.

Change-Id: Ie2b0f74f8af7517a9184704b839677d1c9787862
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4358
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
2018-06-15 20:06:25 +01:00
Tim Newsome 5d9f486404
Merge pull request #266 from gnu-mcu-eclipse/semihosting
target/riscv: add semihosting support
2018-06-12 14:09:59 -07:00
Liviu Ionescu 45921eecd8 target/riscv: fix trailing spaces 2018-06-12 23:58:56 +03:00
Liviu Ionescu 8022a315a6 target/riscv: explain why `arm` commands are used 2018-06-12 23:54:41 +03:00
Tim Newsome ca93d610f0 Revert 7927e90a42
We don't use VPI anymore, and aren't certain that this must be
upstreamed.

Change-Id: I055bd565f71df3538dd7e186b0fd0a035dd9e988
2018-06-12 12:18:35 -07:00
Liviu Ionescu 08a814686d target/riscv: add semihosting support
- use the semihosting_common code
- to enable it, use the same commands as for arm

Signed-off-by: Liviu Ionescu <ilg@livius.net>
2018-06-12 18:21:01 +03:00
Tim Newsome 32f6d6a857
Merge pull request #265 from riscv/cleanup
Remove dead code.
2018-06-11 14:39:59 -07:00
Tim Newsome 68336052f8 Remove dead code.
Change-Id: I1c9325c0f416a79992ee09b26766a2a18a8a061c
2018-06-11 13:04:44 -07:00
Tim Newsome 17a0523736 Merge branch 'master' into from_upstream 2018-06-11 12:08:08 -07:00
Tim Newsome 2a6332f620 Update debug defines to match spec
The main difference is we need to deal with hartsello/hartselhi. (Note
that there's a compile-time limit to 16 harts, but that can be changed.)
My largest target has 4 harts, so I can't tell how well this really
works. But it doesn't break anything.

Fixes #240.

Change-Id: Ie1a2a789b5e00f55174994568749da1cf3a33b92
2018-06-06 13:43:35 -07:00
Andreas Färber 06123153f3 psoc5lp: Add NV Latch flash driver
Erasing is not supported by the hardware, it can be written directly.

Tested on CY8CKIT-059, except modifying-write.

Change-Id: I6e920ed930dcd5c7f0b10c5b1b4791a828d9080a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3434
Tested-by: jenkins
2018-06-06 18:12:21 +01:00
Tomas Vanek 53376dbbed flash/nor/psoc5lp: fix bad commit 2d5f2ede55
Change #3432 was merged into git master without adapting it
to #4297 "prepare infrastructure for multi-block blank check".
This is a fast fix of PSoC5LP specific blank check.
Not tested on real PSoC5LP device.

Change-Id: I7dc13ee7bd1f07b2bfe5a93a5030c0c482d30f00
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4557
Tested-by: jenkins
2018-06-06 17:42:24 +01:00
Edward Fewell fb287ec5f5 drivers: xds110: Remove unnecessary and deprecated libusb function.
libusb-1.0.22 has deprecated the libusb_set_debug function. This
function was present in the XDS110 driver as an artifact left over
from early debugging. It isn't required because logging is disabled
by default. Removing it to simplify the code and no longer need to
have libusb version specific #if's in the code.

Change-Id: I9c3f16c039da3f3fad9c4a1169978b0d85a1b45c
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4553
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-06-06 15:50:39 +01:00
Andreas Färber f1427cca3c psoc5lp: Add EEPROM flash driver
Tested on CY8CKIT-059.

Change-Id: Ib02262e8eebf0df3d29492b8a7daa65b262da580
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3433
Tested-by: jenkins
2018-06-06 15:49:14 +01:00
Andreas Färber 2d5f2ede55 flash/nor: Add PSoC 5LP flash driver
Always probe for ECC mode and display ECC sectors if disabled.
Non-ECC write is implemented as zeroing the ECC/config bytes.
Erasing ECC sectors is ignored, erase-checking takes them into account.

Tested with CY8CKIT-059 (CY8C5888), except ECC mode.

Change-Id: If63b9ffca7ad8de038be3c086c49712b629ec554
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/3432
Tested-by: jenkins
2018-06-06 15:48:33 +01:00
Edward Fewell d02de3a8a9 flash/nor: Add support for TI CC3220SF internal flash
Added cc3220sf flash driver to support the TI CC3220SF
microcontrollers. Implemented flash driver to support the
internal flash of the CC3220SF. The implementation does not
support the serial flash of the CC32xx family that requires
connection over UART, and not via JTAG/SWD debug. Added config
files for both CC32xx devices (no flash) and CC3220SF (with
flash).

Updated to implement comments from code review.
Additional updates to handle remaining comments from review.
Additional updates per review.

Added code to only request aligned writes and full 32-bit
words down to flash helper algorithm. Updated for recent
changes in OpenOCD flash code.

Removed cc32xx.cfg file made obsolete by this patch.
Change-Id: I58fc1478d07238d39c7ef02339f1097a91668c47
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4319
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-06 15:38:25 +01:00
Omair Javaid a077715b71 Fix Semihosting FileIO for targets using vcont packet
This patch fixes a bug where target fails to resume after completing GDB FileIO.
We need to update target last run control information to decide resumption. This
was not being done for vcont packets.

Change-Id: I44bea31720f8b877dba97d77a202303d546ea5bd
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4539
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-06 15:23:04 +01:00
Liviu Ionescu 7028f53877 target/target.c: free semihosting member
When destroying the target, if the semihosting
pointer is set, free it.

Change-Id: I07d34918bb3fddab1eee11219dd66f4842708ec1
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4552
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-06 15:22:51 +01:00
Khem Raj ebf2d73340 Fix libusb-1.0.22 deprecated libusb_set_debug with libusb_set_option
libusb_set_debug is deprecated in libusb >= 1.0.22 therefore replace
with equivalent libusb_set_option()  API

Change-Id: Ic0287a1bc0ccc90afe8e4c688085f0b25a7fb004
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-on: http://openocd.zylin.com/4540
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-05 12:36:53 +01:00
Christopher Head 95a0024ef2 target/cortex_m: constify some variables
Change-Id: I1f3fddd89597333fc1bb9535c0cd76ca3e008324
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4503
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-05 11:30:19 +01:00
Bohdan Tymkiv 69b0021846 flash/nor/virtual: copy missing fields from master flash_bank structure
Change-Id: I4ac71ad4b46ed613192310d85eb385b727649a11
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4505
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-06-05 11:29:57 +01:00
Bohdan Tymkiv 456f982868 flash/nor/core: fix double-free crash with 'virtual' flash banks
flash_bank structure of 'virtual' flash driver is a full copy of
the master flash_bank structure including bank->sectors and
bank->prot_blocks pointers. These pointers point to memory
locations allocated by the master driver and thus master driver
is responsible for deallocating them.
Do not free bank->sectors and bank->prot_blocks of 'virtual'
driver since they were already released by master flash driver.

Change-Id: I01f373d4adb3fc79e2724964926b9276442c5c52
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4504
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-05 11:29:33 +01:00
Antonio Borneo 5952f5e50a breakpoints: simplify the test to find a breakpoint
The test is overly complicated and unreadable.
Simplify it while keeping the exact same behaviour.

Change-Id: I6b22291ca454e1eddeeab4024d3983dc4c603d3a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4512
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:17:14 +01:00
Antonio Borneo 74831e74c8 target: fix syntax in help message
The name of the command is already printed before the string
in ->usage, thus it appears twice.
E.g.
	> help examine
	  stm32f4x.cpu arp_examine arp_examine ['allow-defer']
	        used internally for reset processing
	  stm32f4x.cpu examine_deferred examine_deferred
	        used internally for reset processing
	  stm32f4x.cpu was_examined was_examined
	        used internally for reset processing

Remove the command name from the string in ->usage.

Change-Id: If3b1368ffff8a94eb629ae3679e2e5f2f11ae92e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4536
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:17:03 +01:00
Kamal Dasu cad39b7390 target: aarch64: Adding mcr, mrc 32-bit coprocesor read/write support
Adding mrc and mcr support for 32-bit boot mode on aarch64 target.

Change-Id: I3879908253ccdf79509dcad752871f422526ec64
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/4483
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:16:47 +01:00
Liviu Ionescu 2517bae6c1 Rework/update ARM semihosting
In 2016, ARM released the second edition of the semihosting specs
("Semihosting for AArch32 and AArch64"), adding support for 64-bits.

To ease the reuse of the semihosting logic for other platforms
(like RISC-V), the semihosting code was isolated from the ARM
target and updated to the latest specs.

The new code is already in use since January (in GNU MCU Eclipse
OpenOCD) and no problems were reported, neither for ARM nor for
RISC-V targets, after more than 7K downloads.

The 2 new files were formatted with uncrustify.

Change-Id: Ie84dbd86a547323bb8a5d24eab68fc7dad013d96
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4518
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:16:08 +01:00
Paul Fertser cdf1e826eb jtag: drivers: sysfsgpio: lift upper gpio number limit
Recent Linux maps GPIOs from 1023 downwards so do not limit the number
to 1000.

This should fix #183.

Change-Id: I6d4f493b670be9ed9b82759f0fb686a9faddbbf5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4502
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-31 13:25:30 +01:00
Edward Fewell 2ba27e2f3e jtag/drivers: Add support for TI XDS110 debug probe
Add support for the XDS110 debug probe using the APIs in the
probe's firmware. Includes support for older versions of the
firmware (with reduced performance) and support for a newer
version that includes OpenOCD specific APIs. Tested on various
TI LauchPads including MSP432P4, MSP432E4, CC2650, CC2652, and
CC3220SF.

Updated to add better support for swd switch. Removed issues found with
clang static analysis.

Updated to add rules entry for the XDS110 probe and Tiva DFU mode (which
affects both XDS110 and ICDI probes).

Change-Id: Ib274143111a68e67e80003797c6a68e3e80976b2
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4322
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-31 13:25:16 +01:00
Tim Newsome b39b05ff77 Merge branch 'master' into from_upstream 2018-05-30 16:06:08 -07:00
Paul Fertser b50fa9a19d Fix warnings exposed by GCC8
gcc (GCC) 8.1.0 generates new warnings and thus fails the build.

The ARM disassembler warnings actually exposed a bug in SMALW, SMULW and
SMUL instructions decoding.

Reported by Eimers on IRC.

Change-Id: I200c70f75a9e07a1f13a592addc1c5fb37714440
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4526
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-30 09:36:46 +01:00
Tim Newsome ab7ab8a867
Merge pull request #261 from riscv/trigger_enum
Delay trigger enumeration until it's required.
2018-05-25 11:52:10 -07:00
Megan Wachs bdc4355493 Merge remote-tracking branch 'origin/trigger_enum' into riscv-compliance 2018-05-22 16:27:52 -07:00
Megan Wachs a0e811580a Merge remote-tracking branch 'origin/riscv' into riscv-compliance 2018-05-22 16:27:29 -07:00
Tim Newsome c3ffbc66e6
Merge pull request #257 from riscv/comment
Comment riscv_set_register, register_write_direct
2018-05-22 14:39:28 -07:00
Tim Newsome b629bbeade Delay trigger enumeration until it's required.
This improves startup time, which is important when connecting to
simulators. One problem is that triggers that are set when the debugger
connects are not cleared until enumeration happens. Execution may halt
due to a trigger set by a previous debug session, which could confuse
the user. If this happens, triggers will be instantly enumerated, so it
will only happen once per session.

Change-Id: I3396f713f16980a8b74745a1672fe8b8a2d4abae
2018-05-22 13:07:25 -07:00
Dan Robertson 0493ff81a1
Fix posible null deref in get_target_type
A null deref occurs if riscv_deinit_target is called and the
target has not been initialized.

Change-Id: Ic34057508ed6686eb48e9fe8220110c42ba2fc5e
2018-05-22 02:57:16 +00:00
Tim Newsome 0ad060d97a Review feedback.
Change-Id: If58c011fc8d89d329d65a6c624ffb631f111cef2
2018-05-17 18:08:08 -07:00
Tim Newsome 41c42bf2df Comment riscv_set_register, register_write_direct
Fixes #241

Change-Id: Ia199f15106a0bda465d3918d052ddd4d03655031
2018-05-17 18:01:00 -07:00
Tim Newsome bb86173f37
Merge pull request #251 from riscv/from_upstream
From upstream
2018-05-17 16:47:48 -07:00
Megan Wachs 9a5a5c2dc9 Merge remote-tracking branch 'origin/reset-unexpected-check' into riscv-compliance 2018-05-16 22:29:45 -07:00
Megan Wachs 802c3b4003
riscv: remove unexpected check during reset
I'm not sure what this check is adding, and it causes problems for implementations that take some time to report that they are halted out of reset (e.g. by executing Debug ROM).
2018-05-16 22:25:38 -07:00
Megan Wachs efd7260972 Merge remote-tracking branch 'origin/riscv' into riscv-compliance 2018-05-14 07:31:25 -07:00
Tim Newsome dabaf170ba blank_check_memory prototype has changed.
Just remove our nop implementation. The default behavior when this is
left NULL does the same thing.

Change-Id: I865976c694d24661941584cb0efc92fc26612316
2018-05-08 15:21:49 -07:00
Philipp Tomsich da7113e02d arm_dpm: flush both scratch registers (R0 and R1)
Neither the initial loop to clear dirty registers (which visits all
registers starting at R2 and counting upwards) nor the final explicit
flushes ensure a write-back in arm_dpm_write_dirty_registers.

This change makes sure that both our scratch registers (i.e. R0 and
R1) are written back to the target.

Change-Id: If65be4f371cd40af9a0cfa97f3730b070b92e981
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-on: http://openocd.zylin.com/4506
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:49 -07:00
Faisal Shah 227f729925 ChibiOS thread states: Update thread state to label mapping
Fixed style issue.
Removed #define with list of strings, and just put the
strings in the array initialization directly.
Removed empty space at the start of line.

Change-Id: I76580be203d7d69b8c5b5440f820156543e0d5cc
Signed-off-by: Faisal Shah <faisal.shah@gmail.com>
Reviewed-on: http://openocd.zylin.com/4488
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:49 -07:00
Bohdan Tymkiv c100832971 psoc6: Run flash algorithm asynchronously to improve performance
Existing psoc6 driver starts flash algorithm for each Flash row. This is
suboptimal from performance point of view, starting/stopping flash
algorithm for each row adds significant overhead. This change starts
flash algorithm and leaves it running asynchronously while driver
performs flash operations.

Performance gain is 170...250% depending on probe:

flash write_image img_256k.bin    | w/o this change | with this change |
----------------------------------|-----------------|------------------|
KitProg2/CMSIS-DAP, SWD @ 1 MHz   |     4 KiB/s     |     10 KiB/s     |
J-Link Ultra, SWD @ 1 MHz         |    17 KiB/s     |     31 KiB/s     |
J-Link Ultra, SWD @ 4 MHz         |    33 KiB/s     |     57 KiB/s     |

Change-Id: I5bd582584b35af67600c4d197829eb7aeeec7e3f
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4472
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:49 -07:00
Tomas Vanek 0861923cdc flash/nor, contrib/loaders: add stm32 loaders Makefile and generated .inc
Flash loaders refactored to the new style - use generated .inc
instead of hexadecimal machine code in the flash driver source.

Change-Id: If65a2099589e210f9450819b467d67819fd841fc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4439
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:49 -07:00
Antonio Borneo ac9dbc7584 jtag: adapter: fix indentation in handle_interface_command
Minor fix, no code change, just align it to the block it belongs to.

Change-Id: I4c3b0d0bd00a55d5109d3723e5c4bfb2fc72e366
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4492
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:49 -07:00
Tomas Vanek e3e31fc15f target/cortex_m: allow setting the type of a breakpoint
Cortex-M target used 'auto_bp_type' mode. The requested type
of breakpoint was ignored and hard (FPB) breakpoints were set in
'code memory area' 0x00000000-0x1fffffff, soft breakpoints were set above
0x20000000.

The code memory area of Cortex-M does not mean the memory is flash and
vice versa. External flash (parallel or QSPI) is usually mapped above
code memory area. Cortex-M7 ITCM RAM is mapped at 0. Kinetis
has a RAM block under 0x20000000 boundary.

Remove 'auto_bp_type' mode, set breakpoints to requested type.

Change 'cortex_m maskisr auto' handling to use a hard temporary
breakpoint everywhere: it can also workaround not working soft breakpoints
on Cortex-M7 with ICache enabled.

Change-Id: I7a9f9464c5e10bfd7f17cba1037ed07a064fa2e8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4429
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:49 -07:00
Matthias Welwarsky e2fe63f1fb armv8: valgrind memleak fixes
Various fixes for memory leaks, adds a target cleanup for aarch64
and ARM CTI objects.

Change-Id: I2267f0894df655fdf73d70c11ed03df0b8f8d07d
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4478
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:49 -07:00
Tomas Vanek 8437c94c01 flash/nor/at91sam: implement flash bank deallocation for SAM series
Microchip (former Atmel) SAM drivers allocate a struct per chip.

at91sam3, at91sam34:
Deallocate all chip structs from the list at once, on the first bank
deallocation.

at91samd and at91sam4l drivers do not handle more than one bank.
Convert them to simple driver_priv allocation and use
default_flash_free_driver_priv().

Change-Id: I49d7200f38a4568c7e12f306c27d1b1b72646736
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4416
Tested-by: jenkins
2018-05-08 15:21:49 -07:00
Tomas Vanek 4460fc3e3c flash/nor/kinetis: implement flash bank deallocation
Change-Id: I8ef80eae646d3b3eb7f6dd42067f8516adc5abef
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4415
Tested-by: jenkins
2018-05-08 15:21:49 -07:00
Tomas Vanek cd8c3ebf10 flash/nor: handle flash write alignment/padding in the infrastructure
Most of flash drivers have to ensure proper flash write block alignment
and padding. As there was no support for it in the flash infrastructure,
each driver does it its own way. Sometimes this part of code is not properly
tested and contains bugs.

flash_write(_unlock) joins all image sections targeted to one flash bank
using padded areas as a glue. This solves alignment problems on section
boundaries but imposes other problems.

Introduce new flash bank parameters write_start_alignment,
write_end_alignment and minimal_write_gap.
New flash drivers can just properly set these values instead of handling
alignment by its own.

Adapt infrastructure (namely flash_write_unlock(), handle_flash_fill_command()
and handle_flash_write_bank_command()) to prepare write data padded
to an alignment required by the flash bank.

Rework flash_write_unlock() to discontinue write block when the gap
between sections is bigger than minimum specified in minimal_write_gap.
minimal_write_gap is set to one sector by default.

Change-Id: I4368dd402dfaf51c193bcbf1332cffff092b239b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4399
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-05-08 15:21:49 -07:00
Tomas Vanek 56090a4d4a target armv7m: multi-block erase check
Tested on PSoC6 (Cortex-M0+ core), onboard KitProg2 in CMSIS-DAP mode,
adapter_khz=1000.
Plain read:
	flash read_bank 0 /dev/null
takes 48 seconds.

erase_check without this change:
	flash erase_check 0
takes horrible 149 seconds!!

And the same command with the change applied takes 1.8 seconds.
Quite a difference.

Remove the erase-value=0 version of algorithm as the new one can check
for any value.

If the target is an insane slow clocked CPU (under 1MHz) algo
timeouts. Blocks checked so far are returned and the next call
uses increased timeout.

Change-Id: Ic0899011256d2114112e67c0b51fab4f6230d9cd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4298
Tested-by: jenkins
Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-05-08 15:21:49 -07:00
Tomas Vanek 4a9c29b921 target, flash: prepare infrastructure for multi-block blank check
'flash erase_check' command runs a check algorithm on a target
if possible. The algorithm is run repeatedly for each flash sector.
Unfortunately every start and stop of the algorithm impose not negligible
overhead.
In practice it means checking is faster than plain read only for
sectors of size approx 4 kByte or bigger. And checking sectors
as short as 512 bytes runs approx 4 times slower than plain read.

The patch changes API call target_blank_check_memory() and related
to take an array of sectors (or arbitrary memory blocks).

Changes in target-specific checking routines are kept minimal.
They use only the first block from the array and process it by
the unchanged algorithm.

default_flash_blank_check() routine repeats target_blank_check_memory()
until all blocks are checked, so it works with both multi-block
and single-block based checkers.

Change-Id: I0e6c60f2d71364c9c07c09416b04de9268807f5e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4297
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-05-08 15:21:49 -07:00
Paul Fertser 74db5ad66f configure: disable all drivers when zy1000 is enabled
This also fixes the transport_is_hla FIXME.

Change-Id: I33960f373f11e3e203f9aed9c6d02bf7ca48ac97
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4473
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:49 -07:00
Tomas Vanek 5a591c9857 gdb_server: gdb_memory_map() rework
Use sector sizes instead of bank size.

Detect a gap between sectors and emit xml blocks accordingly.

Detect sector overflow over the bank size.

Change-Id: If0e0e44b0c3b93067b4d717c9c7b07c08582e57b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4436
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:49 -07:00
Armin van der Togt 3c7fd99832 rtos: Fix XPSR_OFFSET for cortex_m4f stacking
Structures rtos_standard_Cortex_M4F_stacking and 
rtos_standard_Cortex_M4F_FPU_stacking in rtos_standard_stackings.c 
where using rtos_standard_Cortex_M3_stack_align for the stack-align 
function. This function calls rtos_Cortex_M_stack_align with 
XPSR_OFFSET = 0x3c. This offset is correct for cortex-M3 but not for 
cortex-M4F and cortex-M4F with fpu. This patch adds stack_align 
functions for M4F an M4F_FPU

Change-Id: If6a90b1898fccbb85619a10f3aef5277dd88ce47
Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Reviewed-on: http://openocd.zylin.com/4037
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:48 -07:00
Matthias Welwarsky 4c8e7a0486 target: free target SMP list on shutdown
On SMP targets, the "target smp" command creates a list of targets
that belong to the SMP cluster. Free this list when a target gets
destroyed on shutdown. For simplicity, the complete list is free'd as
soon as the first target of the SMP cluster is destroyed instead of
individually removing targets from the list.

Change-Id: Ie217ae1efb2e819c288ff3b1155aeaf0a19b06be
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4481
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:48 -07:00
Tomas Vanek 5f723aa9cd target/arm_adi_v5: extend apcsw command to accept arbitrary bits
apcsw command was limited to SPROT bit only.

Now user can manipulate any bit except size and addrinc fields.
Can be used e.g. to set bus signal 'cacheable' on Cortex-M7

Change-Id: Ia1c22b208e46d1653136f6faa5a7aaab036de7aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4431
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:48 -07:00
Matthias Welwarsky 18fd1d8b47 arm_adi_v5: Add ability to ignore the CSYSPWRUPACK bit
The CTRL/STAT register in the ARM DAP DP has a debug power up
ack bit and a system power up ack bit. Some devices do not set
the system power up ack bit until sometime later. To avoid having
the initial target examination fail due to this or to have a
sticky bit error report claim power failure due to this a user
can now specify that this bit should be ignored.

Change-Id: I2451234bbe904984e29562ef6f616cc6d6f60732
Signed-off-by: Eric Katzfey <eric.katzfey@mentalbee.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3710
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:48 -07:00
Tim Newsome 2a103bae44 Don't error if hart select isn't implemented.
It's not implemented for 0.11 because we don't need it. Returning error
caused 0.11 targets to not be debuggable since change
848062d0d1.

Change-Id: I8b04a1fcf3c3e8bf8340cbf39aaf475d2a213519
2018-05-07 15:16:57 -07:00
Tim Newsome 909c9d4ab2 Conform to OpenOCD style
Change-Id: I3954a8ac254b460560fa1414c5921777e4005645
2018-05-03 17:58:44 -07:00
Tim Newsome 487501e761 Merge branch 'riscv' into optimize
Change-Id: I2693eb05dee72acd2df5d8594c51e9da08ea1cc6
2018-05-03 16:02:59 -07:00
Tim Newsome 67b4e2c522 counter*h registers only exist on RV32
Fixes #245.

Change-Id: If05ec9773dc9975931434f09c431eba122a6e8d0
2018-05-03 12:26:30 -07:00
Tim Newsome 292180fb44
Merge pull request #246 from darius-bluespec/sysbus-bugfix
Bug fixes for system bus access
2018-05-01 14:12:48 -07:00
Darius Rad 31494f68a4 Properly retry system bus access if busy error was detected. 2018-05-01 11:45:24 -04:00
Darius Rad cb282e81bc Fix polling for system bus busy. 2018-05-01 11:45:24 -04:00
Tim Newsome b62c014bdc Merge branch 'riscv' into notice_reset 2018-04-30 13:36:06 -07:00
Philipp Tomsich 7b94ae9e52 arm_dpm: flush both scratch registers (R0 and R1)
Neither the initial loop to clear dirty registers (which visits all
registers starting at R2 and counting upwards) nor the final explicit
flushes ensure a write-back in arm_dpm_write_dirty_registers.

This change makes sure that both our scratch registers (i.e. R0 and
R1) are written back to the target.

Change-Id: If65be4f371cd40af9a0cfa97f3730b070b92e981
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-on: http://openocd.zylin.com/4506
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-27 20:00:51 +01:00
Ryan Macdonald 0ed96e80d3 Fix more style issues
Signed-off-by: Ryan Macdonald <rmac@sifive.com>
2018-04-24 14:15:30 -07:00
Ryan Macdonald 9089854b84 Code cleanup from feedback. 2018-04-24 14:01:21 -07:00
Megan Wachs 3715f207c0 fespi: flag an error if offset can't be handled in 3B mode 2018-04-24 10:24:01 -07:00
Faisal Shah 087a162e3c ChibiOS thread states: Update thread state to label mapping
Fixed style issue.
Removed #define with list of strings, and just put the
strings in the array initialization directly.
Removed empty space at the start of line.

Change-Id: I76580be203d7d69b8c5b5440f820156543e0d5cc
Signed-off-by: Faisal Shah <faisal.shah@gmail.com>
Reviewed-on: http://openocd.zylin.com/4488
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-23 20:46:52 +01:00
Bohdan Tymkiv 4440bf1fcd psoc6: Run flash algorithm asynchronously to improve performance
Existing psoc6 driver starts flash algorithm for each Flash row. This is
suboptimal from performance point of view, starting/stopping flash
algorithm for each row adds significant overhead. This change starts
flash algorithm and leaves it running asynchronously while driver
performs flash operations.

Performance gain is 170...250% depending on probe:

flash write_image img_256k.bin    | w/o this change | with this change |
----------------------------------|-----------------|------------------|
KitProg2/CMSIS-DAP, SWD @ 1 MHz   |     4 KiB/s     |     10 KiB/s     |
J-Link Ultra, SWD @ 1 MHz         |    17 KiB/s     |     31 KiB/s     |
J-Link Ultra, SWD @ 4 MHz         |    33 KiB/s     |     57 KiB/s     |

Change-Id: I5bd582584b35af67600c4d197829eb7aeeec7e3f
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4472
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-23 20:42:06 +01:00
Tomas Vanek b941e2e727 flash/nor, contrib/loaders: add stm32 loaders Makefile and generated .inc
Flash loaders refactored to the new style - use generated .inc
instead of hexadecimal machine code in the flash driver source.

Change-Id: If65a2099589e210f9450819b467d67819fd841fc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4439
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-23 20:41:50 +01:00
Tim Newsome 9a69c1c096 Fix mingw32 build.
Change-Id: If7a57749ba8c49385a4020ce8d2d8dbb94242122
2018-04-20 16:28:24 -07:00
Tim Newsome 4593659edf Fix error messages for reset dmi timeouts.
Change-Id: I00869ba20db6f27415af8e53e7b3e67741bf894d
2018-04-20 15:10:56 -07:00
Tim Newsome ba2174249d Make encoding.h pass style guide.
There's a manual step in commenting this out, but this file changes very
rarely.

Change-Id: I332d6490940ecc81e18c3b112a7ba415331b9c86
2018-04-20 14:47:27 -07:00
Tim Newsome b5dae238a1 Fix comments in encoding.h.
This was updated in the source a long time ago:
25881d8a22

Change-Id: Ia158205d046522c6802a3a32b330759f5e65566f
2018-04-20 14:47:27 -07:00
Megan Wachs eeac4f7fd4 riscv-compliance: remove whitespace 2018-04-19 10:52:19 -07:00
Megan Wachs debf2b040a riscv-compliance: correct the HALTSUM0/HALTSUM1 checks 2018-04-19 10:36:52 -07:00
Megan Wachs ac953c71c0 riscv-compliance: add dummy comments to appease the linter 2018-04-18 16:15:07 -07:00
Megan Wachs 06fc61f464 riscv-compliance: whitespace 2018-04-18 16:10:41 -07:00
Megan Wachs 3fedb7d97f Merge remote-tracking branch 'origin/riscv' into HEAD 2018-04-18 15:22:38 -07:00
Tim Newsome 005630d24d Use reset timeout to read dmstatus out of reset
Change-Id: I74cc6a1e006269270c5197994d21523d01206141
2018-04-18 14:31:00 -07:00
Tim Newsome 69a426038d
Enforce OpenOCD style guide. (#239)
* Enforce OpenOCD style guide.

Change-Id: I579a9f54ed22a774bf52f6aa5bc13bcbd2e82cd8

* Fail if `git diff` fails

Change-Id: I57256b0a24247f6123cb0e25a89c1b59867cb3f9

* Maybe every line gets its own shell?

Change-Id: I1a6f83e9f3d7cfd39f8933f0dba13c3cf76f71f6

* Maybe this will error properly.

Change-Id: I50803cfc229e61158569fb6b609195f7191ecac9

* Take different approach than merge-base

Change-Id: I345cbc4eecc4755c7127e8e36e403f7b727010b1

* Fix style issues.

Change-Id: I90e71f710858524812d0ab160b25c486b7b099e7
2018-04-18 13:11:08 -07:00
Megan Wachs 8fa81c1f97 riscv-compliance... code that compiles > code that makes linter happy 2018-04-17 16:11:03 -07:00
Megan Wachs 8ce4f787ca riscv-compliance: whitespace cleanup 2018-04-17 16:05:15 -07:00
Megan Wachs 6217f56186 Merge remote-tracking branch 'origin/notice_reset' into riscv-compliance 2018-04-17 15:47:41 -07:00
Megan Wachs 401dcf7a06 riscv-compliance: make sure reset assertion and deassertion actually worked. 2018-04-17 15:47:15 -07:00
Megan Wachs f516825079 riscv-compliance: make sure not to clear DMACTIVE 2018-04-17 14:30:37 -07:00
Megan Wachs aef4888249 riscv-compliance: Fix writing hartsello 2018-04-17 11:55:50 -07:00
Ryan Macdonald e025cb320c Fix style issues. Code cleanup. 2018-04-17 10:47:44 -07:00
Megan Wachs 30e1dbdc6b riscv-compliance: fix compile errors and whitespace 2018-04-17 10:43:36 -07:00
Ryan Macdonald 4f4d5f46f1 Fix build issues 2018-04-17 10:35:32 -07:00
Megan Wachs ef684c2e68 riscv-compliance: Incorporate feedback to make tests make fewer assumptions about hte implementation and properly use OpenOCD functions 2018-04-17 10:28:13 -07:00
Megan Wachs 716c12bcaf riscv: don't supporess errors 2018-04-17 07:57:32 -07:00
Megan Wachs 4c6c4cb078 riscv: Add a TODO note we need to handle hartselhi 2018-04-17 07:53:34 -07:00
Megan Wachs fa99b8e3b1 riscv-compliance: Fix OpenOCD lint checks 2018-04-17 07:49:06 -07:00
Antonio Borneo 3a28c8c4ba jtag: adapter: fix indentation in handle_interface_command
Minor fix, no code change, just align it to the block it belongs to.

Change-Id: I4c3b0d0bd00a55d5109d3723e5c4bfb2fc72e366
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4492
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-17 08:29:49 +01:00
Megan Wachs bc32aaafa4 riscv-compliance: whitespace cleanup 2018-04-16 17:49:16 -07:00
Megan Wachs d673062291 Merge remote-tracking branch 'origin/style' into riscv-compliance 2018-04-16 17:31:18 -07:00
Ryan Macdonald 0b027a2854 Code cleanup. Bump debug_defines.h version 2018-04-16 17:20:31 -07:00
Ryan Macdonald bf0ffff1db Fix issue with COMMAND_PARSE_NUMBER 2018-04-13 16:09:57 -07:00
Ryan Macdonald 065671b311 Code style cleanup 2018-04-13 11:20:12 -07:00
Megan Wachs ff365173a0 riscv-compliance: fix too-narrow constant 2018-04-12 17:31:23 -07:00
Megan Wachs 2deff1b2c9 riscv: hartsel-> hartsello (not supporting hartselhi yet) 2018-04-12 16:10:45 -07:00
Megan Wachs 415da7ed4e riscv: update definitions to meet current version of spec 2018-04-12 16:06:30 -07:00
Megan Wachs adf7dd7b5e Merge branch 'riscv' into riscv-compliance 2018-04-12 16:03:54 -07:00
Tim Newsome 836168be81 Fix FESPI assert when guessing few algorithm steps
Instead of trying to predict exactly how many steps will be required
(doable but error-prone), just allocate more memory when we need it.

Tested against HiFive1, and Arty board image.

Change-Id: I3cd9798432e65176616c700ba122daf7a5ed6209
2018-04-12 15:07:20 -07:00
Megan Wachs 7eca2dfe5d Squashed commit of the following:
commit fb7009fc38
Author: Gleb Gagarin <gleb@sifive.com>
Date:   Fri Feb 23 16:41:14 2018 -0800

    Make some error messages to be printed once

commit e09dd62229
Author: Gleb Gagarin <gleb@sifive.com>
Date:   Fri Feb 23 15:30:10 2018 -0800

    Reduce severity of the error messages that are polluting the log

commit 73b6ea55eb
Author: Gleb Gagarin <gleb@sifive.com>
Date:   Fri Feb 23 13:32:54 2018 -0800

    removed unused variable

commit c3bdcb0c4a
Author: Gleb Gagarin <gleb@sifive.com>
Date:   Thu Feb 22 18:32:08 2018 -0800

    more R/O checks

commit 353cf212bd
Author: Gleb Gagarin <gleb@sifive.com>
Date:   Thu Feb 22 14:27:25 2018 -0800

    write progbuf via DMI

commit e73d82e3d6
Author: Gleb Gagarin <gleb@sifive.com>
Date:   Wed Feb 21 18:47:36 2018 -0800

    add writes to progbuf

commit f97e4b53e4
Author: Gleb Gagarin <gleb@sifive.com>
Date:   Wed Feb 21 16:20:12 2018 -0800

    Try to zero out ROM
2018-04-12 15:02:04 -07:00
Tomas Vanek 81d0b769a6 target/cortex_m: allow setting the type of a breakpoint
Cortex-M target used 'auto_bp_type' mode. The requested type
of breakpoint was ignored and hard (FPB) breakpoints were set in
'code memory area' 0x00000000-0x1fffffff, soft breakpoints were set above
0x20000000.

The code memory area of Cortex-M does not mean the memory is flash and
vice versa. External flash (parallel or QSPI) is usually mapped above
code memory area. Cortex-M7 ITCM RAM is mapped at 0. Kinetis
has a RAM block under 0x20000000 boundary.

Remove 'auto_bp_type' mode, set breakpoints to requested type.

Change 'cortex_m maskisr auto' handling to use a hard temporary
breakpoint everywhere: it can also workaround not working soft breakpoints
on Cortex-M7 with ICache enabled.

Change-Id: I7a9f9464c5e10bfd7f17cba1037ed07a064fa2e8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4429
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-12 20:49:18 +01:00
Ryan Macdonald 1ba3986eb7 More test/SBA RTL debug 2018-04-12 12:26:54 -07:00
Ryan Macdonald a9b8820916 Checkpoint: debugging tests 2018-04-11 18:10:48 -07:00
Ryan Macdonald 50cd4203a5 Fix more style issues with previous commit 2018-04-11 14:41:00 -07:00
Ryan Macdonald 4191505b76 Fix style issues with previous commit 2018-04-11 14:38:51 -07:00
Ryan Macdonald cc98a14839 Added address alignment test, code fixups from review 2018-04-11 14:26:16 -07:00
Matthias Welwarsky 09076d10dd armv8: valgrind memleak fixes
Various fixes for memory leaks, adds a target cleanup for aarch64
and ARM CTI objects.

Change-Id: I2267f0894df655fdf73d70c11ed03df0b8f8d07d
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4478
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-10 09:13:02 +01:00
Tomas Vanek a9fb0d07f0 flash/nor/at91sam: implement flash bank deallocation for SAM series
Microchip (former Atmel) SAM drivers allocate a struct per chip.

at91sam3, at91sam34:
Deallocate all chip structs from the list at once, on the first bank
deallocation.

at91samd and at91sam4l drivers do not handle more than one bank.
Convert them to simple driver_priv allocation and use
default_flash_free_driver_priv().

Change-Id: I49d7200f38a4568c7e12f306c27d1b1b72646736
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4416
Tested-by: jenkins
2018-04-10 06:19:01 +01:00
Tomas Vanek 66d924f787 flash/nor/kinetis: implement flash bank deallocation
Change-Id: I8ef80eae646d3b3eb7f6dd42067f8516adc5abef
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4415
Tested-by: jenkins
2018-04-10 06:18:35 +01:00
Tomas Vanek c8c20b7c0b flash/nor: handle flash write alignment/padding in the infrastructure
Most of flash drivers have to ensure proper flash write block alignment
and padding. As there was no support for it in the flash infrastructure,
each driver does it its own way. Sometimes this part of code is not properly
tested and contains bugs.

flash_write(_unlock) joins all image sections targeted to one flash bank
using padded areas as a glue. This solves alignment problems on section
boundaries but imposes other problems.

Introduce new flash bank parameters write_start_alignment,
write_end_alignment and minimal_write_gap.
New flash drivers can just properly set these values instead of handling
alignment by its own.

Adapt infrastructure (namely flash_write_unlock(), handle_flash_fill_command()
and handle_flash_write_bank_command()) to prepare write data padded
to an alignment required by the flash bank.

Rework flash_write_unlock() to discontinue write block when the gap
between sections is bigger than minimum specified in minimal_write_gap.
minimal_write_gap is set to one sector by default.

Change-Id: I4368dd402dfaf51c193bcbf1332cffff092b239b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4399
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-04-10 06:17:52 +01:00
Tomas Vanek a867e36f78 target armv7m: multi-block erase check
Tested on PSoC6 (Cortex-M0+ core), onboard KitProg2 in CMSIS-DAP mode,
adapter_khz=1000.
Plain read:
	flash read_bank 0 /dev/null
takes 48 seconds.

erase_check without this change:
	flash erase_check 0
takes horrible 149 seconds!!

And the same command with the change applied takes 1.8 seconds.
Quite a difference.

Remove the erase-value=0 version of algorithm as the new one can check
for any value.

If the target is an insane slow clocked CPU (under 1MHz) algo
timeouts. Blocks checked so far are returned and the next call
uses increased timeout.

Change-Id: Ic0899011256d2114112e67c0b51fab4f6230d9cd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4298
Tested-by: jenkins
Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-04-10 06:17:00 +01:00
Tomas Vanek eb8912ec38 target, flash: prepare infrastructure for multi-block blank check
'flash erase_check' command runs a check algorithm on a target
if possible. The algorithm is run repeatedly for each flash sector.
Unfortunately every start and stop of the algorithm impose not negligible
overhead.
In practice it means checking is faster than plain read only for
sectors of size approx 4 kByte or bigger. And checking sectors
as short as 512 bytes runs approx 4 times slower than plain read.

The patch changes API call target_blank_check_memory() and related
to take an array of sectors (or arbitrary memory blocks).

Changes in target-specific checking routines are kept minimal.
They use only the first block from the array and process it by
the unchanged algorithm.

default_flash_blank_check() routine repeats target_blank_check_memory()
until all blocks are checked, so it works with both multi-block
and single-block based checkers.

Change-Id: I0e6c60f2d71364c9c07c09416b04de9268807f5e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4297
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-04-10 06:16:40 +01:00
Tim Newsome 1fda89c3ce Only write hartsel if we're changing it.
DebugBreakpoint went from 2.94s to 2.74s.

Change-Id: Ia3ab857aea89fb83f0bcdd9a6bb69f256bde13dd
2018-04-09 15:13:24 -07:00
Tim Newsome 4b84e0d77b Remove prototype that crept back in.
Change-Id: I93c4690d6f655d2b4e5121cee889d9143d49b9ed
2018-04-09 12:51:20 -07:00
Tim Newsome c73e06809d Merge branch 'master' into from_upstream
Conflicts:
	src/rtos/rtos.c
	src/rtos/rtos.h
	src/server/gdb_server.c

Change-Id: Icd5a8165fe111f699542530c9cb034faf30e09b2
2018-04-09 12:17:08 -07:00
Ryan Macdonald 836bd7cb69 Fix sign compare compiler error 2018-04-09 11:55:46 -07:00
Ryan Macdonald c2c52c89b1 Fix some build issues 2018-04-09 11:38:41 -07:00
Ryan Macdonald 99f2f5a272 Change #ifdef SIM_ON to be a run-time arg 2018-04-09 11:26:31 -07:00
Ryan Macdonald de329f4004 Fixed style issues in previous commit. 2018-04-09 10:54:21 -07:00
Ryan Macdonald a9b2277574 Add #ifdef to only enable sbbusyerror test in simulation. 2018-04-09 10:51:53 -07:00
Paul Fertser 70b15f989f configure: disable all drivers when zy1000 is enabled
This also fixes the transport_is_hla FIXME.

Change-Id: I33960f373f11e3e203f9aed9c6d02bf7ca48ac97
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4473
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-09 09:04:46 +01:00
Tomas Vanek dbd7e80eb4 gdb_server: gdb_memory_map() rework
Use sector sizes instead of bank size.

Detect a gap between sectors and emit xml blocks accordingly.

Detect sector overflow over the bank size.

Change-Id: If0e0e44b0c3b93067b4d717c9c7b07c08582e57b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4436
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07 20:34:28 +01:00
Armin van der Togt 4f2c3e6c4f rtos: Fix XPSR_OFFSET for cortex_m4f stacking
Structures rtos_standard_Cortex_M4F_stacking and 
rtos_standard_Cortex_M4F_FPU_stacking in rtos_standard_stackings.c 
where using rtos_standard_Cortex_M3_stack_align for the stack-align 
function. This function calls rtos_Cortex_M_stack_align with 
XPSR_OFFSET = 0x3c. This offset is correct for cortex-M3 but not for 
cortex-M4F and cortex-M4F with fpu. This patch adds stack_align 
functions for M4F an M4F_FPU

Change-Id: If6a90b1898fccbb85619a10f3aef5277dd88ce47
Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Reviewed-on: http://openocd.zylin.com/4037
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-07 20:33:39 +01:00
Matthias Welwarsky db456e209f target: free target SMP list on shutdown
On SMP targets, the "target smp" command creates a list of targets
that belong to the SMP cluster. Free this list when a target gets
destroyed on shutdown. For simplicity, the complete list is free'd as
soon as the first target of the SMP cluster is destroyed instead of
individually removing targets from the list.

Change-Id: Ie217ae1efb2e819c288ff3b1155aeaf0a19b06be
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4481
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-07 20:33:01 +01:00
Tomas Vanek 414213a5ea target/arm_adi_v5: extend apcsw command to accept arbitrary bits
apcsw command was limited to SPROT bit only.

Now user can manipulate any bit except size and addrinc fields.
Can be used e.g. to set bus signal 'cacheable' on Cortex-M7

Change-Id: Ia1c22b208e46d1653136f6faa5a7aaab036de7aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4431
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07 20:31:37 +01:00
Tim Newsome 2e2bb14b27 Add gdb_report_register_access_error command
With this option enabled (it's disabled by default) errors accessing
registers are returned to gdb. Otherwise they are ignored and success is
reported to gdb. (This is the current behavior.)

We want this for RISC-V, but there's still some cleanup that needs to be
done before that can be upstreamed.

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I7e56109ea52d18b780c14a07fb35f9e6e8979da4
Reviewed-on: http://openocd.zylin.com/4452
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-04-07 20:31:14 +01:00
Matthias Welwarsky 0dba1815e6 arm_adi_v5: Add ability to ignore the CSYSPWRUPACK bit
The CTRL/STAT register in the ARM DAP DP has a debug power up
ack bit and a system power up ack bit. Some devices do not set
the system power up ack bit until sometime later. To avoid having
the initial target examination fail due to this or to have a
sticky bit error report claim power failure due to this a user
can now specify that this bit should be ignored.

Change-Id: I2451234bbe904984e29562ef6f616cc6d6f60732
Signed-off-by: Eric Katzfey <eric.katzfey@mentalbee.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3710
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07 20:30:12 +01:00
Tim Newsome 238b1e9f06 Cache registers while halted.
This saves us from re-reading s0 before doing just about anything
program buffer related.

Improves DebugBreakpoint from 3.01s to 2.89s. Feels like the improvement
should be larger than that. Maybe my metric isn't very good.

Change-Id: I85e1a1ddbf09006d76c451a32048be7b773dcfe9
2018-04-06 15:52:40 -07:00
Stefan Arnold be87994d60 flash/nor/at91samd: Add "nvmuserrow" command.
Add option "nvmuserrow" to "at91samd" for changing and reading the register at 0x804000 which represents various fuses.

Change-Id: I6382cc4ac15e6b9681e2f30b0ae60397a6289c3b
Signed-off-by: Stefan Arnold <sarnold@sh-sw.de>
Reviewed-on: http://openocd.zylin.com/4260
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-06 10:37:31 +01:00
Ryan Macdonald 7c6f6d79bc Fixed more style issues 2018-04-05 17:59:43 -07:00
Tim Newsome 5c0a9a9ee4 Just read abstractcs once when executing a command
DebugBreakpoint went from 3.41s to 3.05s!

Change-Id: Icfc4ad5fb663b3607bf2027fda744b43be662fc5
2018-04-05 17:59:07 -07:00
Ryan Macdonald d471fff3db Fixed build issues 2018-04-05 17:57:53 -07:00
Ryan Macdonald ada78cae11 Checkpoint: fix even more code style issues 2018-04-05 16:49:00 -07:00
Ryan Macdonald 8c8bed878c Checkpoint: fix some more code style issues 2018-04-05 16:42:28 -07:00
Ryan Macdonald 761aaeba98 Checkpoint: fix some code style issues 2018-04-05 16:39:33 -07:00
Ryan Macdonald 3bdb8b29a8 Checkpoint: finish debug of tests, working on hitting sbbusyerror case 2018-04-05 16:31:09 -07:00
Ryan Macdonald c5a8e1cf4c Initial commit of tests for SBA feature 2018-04-04 13:50:17 -07:00
Tomas Vanek b08900badc nrf51: Add HWID 0x008F again
HWID originally added in commit 7829f31a6d
was accidentally omited during refactoring in commit
52885d2b53

While on it move old ingeneering sample of 51822 to block of 51822 rev 1

Change-Id: Ie9f15563792a27a72e71df6edbcc6b04490370ed
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4437
Tested-by: jenkins
2018-04-04 21:27:33 +01:00
Tomas Vanek 7829bb701f drivers/kitprog: workaround KitProg firmware bug of missing ZLP
KitProg firmware does not send a zero length packet at the end of the bulk-in
transmission of a length divisible by a bulk packet size. This is inconsistent
with the USB specification and results in jtag_libusb_bulk_read()
waits forever when a transmission of specific size is received.

Limit bulk read size to expected number of bytes for problematic tranfer sizes.
Use 1 second timeout as the last resort.

Change-Id: Ice80306424afd76e9fbc6851911ffd5109c84501
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4426
Tested-by: jenkins
Reviewed-by: Bohdan Tymkiv <bhdt@cypress.com>
2018-04-04 21:26:59 +01:00
Cody P Schafer a28dea0fe4 target/cortex_m: avoid dwt comparator overflow
Avoid ever overflowing the DWT_COMPARATOR array by allocating space for
16 comparators (the field is masked by 0xf).

On a stm32f767zi chip (on a nucleo-767zi board) I've been seeing crashes
with address sanitizer enabled due to its (apparent) 10 present
comparators. This appears to be due to
https://sourceforge.net/p/openocd/tickets/178/.

In non-address sanitizer builds, this would likely cause some random
memory to be written to in some cases. (see above bug for observations).

Change-Id: I2b7d599eb326236dbc93f74b350c442c9a502c4b
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Reviewed-on: http://openocd.zylin.com/4458
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-04 21:24:53 +01:00
Michele Sardo 6e6f90d1af Fix for warnings detected by clang static analyzer
Fix for potential memory leakage and for unused/unreported return error code

Change-Id: Ifb2c95b60637c3a241ad4bf41d1a328c92ccea4b
Signed-off-by: Michele Sardo <msmttchr@gmail.com>
Reviewed-on: http://openocd.zylin.com/4476
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-04 21:23:57 +01:00
Tomas Vanek 7690a74b09 flash/nor: implement flash bank deallocation in drivers with simple alloc
All drivers which simply allocate one driver_priv memory block
per each bank now use default_flash_free_driver_priv()

Change-Id: I425bf4213c3632f02dbe11ab819c31eda9b2db62
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4417
Tested-by: jenkins
Reviewed-by: Liviu Dudau <liviu@dudau.co.uk>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-04 20:14:18 +01:00
Tim Newsome 6030644a9d Track misa per-hart even in -rtos mode
This works around some side effects of the -rtos hack, namely that we
were unable to set hardware breakpoints on harts whose misa differed
from the first one. There may be other bugs like this one lurking
elsewhere. The only proper solution is for gdb to have a better user
interface when talking to a server that exposes multiple targets, but
that's a very big project.

This fixes #194.

Change-Id: I81aedddeaa922d220e936730e9c731545953ae21
2018-04-03 15:12:19 -07:00
Tim Newsome eeae8c4261 Add gdb_report_register_access_error command
This replaces the earlier mechanism which would propagate errors only
for targets that decided they wanted to. It was suggested by Matthias
Welwarsky from the OpenOCD team.

Change-Id: Ibe8e97644abb47aff26d74b8280377d42615a4d3
2018-04-02 13:37:53 -07:00
Tim Newsome 755c6a4caa Add wall clock timeout to dmi_op()
If the target is held in reset we'd keep adding more delays, and since
those grow exponentially they'd get so huge it would take forever to
exit out of the loop.

Change-Id: Ieaab8b124c101fd1b12f81f905a6de22192ac662
2018-03-30 15:24:16 -07:00
Tim Newsome 58a2994b00
Merge pull request #231 from riscv/auth
Fix auth error message.
2018-03-30 14:02:29 -07:00
Tim Newsome 3c7c7e26a4
Merge pull request #230 from riscv/deleg
Make m*deleg regs conditional on U/S/N
2018-03-30 14:02:13 -07:00
Tim Newsome 4ee7d5373d Fix auth error message.
Change-Id: I79b72325e9a6b85f8b67df8e9837a54cfce928f0
2018-03-30 13:21:00 -07:00
Tim Newsome 358a85baf4
Merge pull request #224 from riscv/upstream
Remove debug code.
2018-03-30 13:05:11 -07:00
Tomas Vanek 6eba3777fc jtag/core, target: unregister JTAG events
Also call adapter_exit() before command_exit() as the latter releases
Jim interpreter so JTAG events should be released before.

Fixes memory leak reported by valgrind

Change-Id: I493f3fcba34ea2b4234148e79a4e329c866e0f05
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4474
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:15:23 +01:00
Tomas Vanek 37deb37593 target: fix display halt message logic
If a target is run from gdb and then stopped from OpenOCD telnet interface,
halt does not show message with status and PC registers.

While on it rename 'display' to 'verbose_halt_msg' and use bool type
instead of int.

Change-Id: Ibe6589015b302e0be97258b06938c297745436a5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4475
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:14:56 +01:00
Tomas Vanek f035b0851b flash/nor: implement flash bank deallocation on OpenOCD exit
Change-Id: I8fcf09b2a85b3b68743f5fd68a31edea933b9b17
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4414
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 10:13:09 +01:00
Matthias Welwarsky 2231da8ec4 target: restructure dap support
- add 'dap create' command to create dap instances
- move all dap subcmmand into the dap instance commands
- keep 'dap info' for convenience
- change all armv7 and armv8 targets to take a dap
  instance instead of a jtag chain position
- restructure tap/dap/target relations, jtag tap no
  longer references the dap, daps are now independently
  created and initialized.
- clean up swd connect
- re-initialize DAP also on JTAG errors (e.g. after reset,
  power cycle)
- update documentation
- update target files

Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4468
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 09:58:21 +01:00
Matthias Welwarsky f444c57bf2 arm_cti: add cti command group
Extend the CTI abstraction to be accessible from TCL and
change the 'target' command to accept a cti 'object' instead of a
base address. This also allows accessing CTI instances that are not
related to a configured target.

Change-Id: Iac9ed0edca6f1be00fe93783a35c26077f6bc80a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4031
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 09:48:03 +01:00
Tim Newsome 224e7b4f16 Once more... Less sloppy this time.
Change-Id: I4a24e777af3a0d8e072bc1bce0b314738393aa86
2018-03-27 11:42:32 -07:00
Tim Newsome 55e427b72b Don't rely on havereset when deasserting reset.
This removes the need for the supports_havereset config option as well.

Change-Id: Ic4391ce8c15d15e2ef662d170d483f336e8e8a5e
2018-03-27 11:31:39 -07:00
Matthias Welwarsky 1756f393e4 aarch64: add cpsr bitfields to target description
provide meta information for the cpsr so gdb can display the status
flags and not only a hexadecimal number

Change-Id: I9d3fb29153780adbea389d7e4175d5e19bddc256
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4460
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-27 09:15:43 +01:00
Matthias Welwarsky 0808c6e8a3 tdesc: bitfields may carry a type
a bitfield may carry a type (bool or int), add support for that.

Change-Id: Ic831a9b8eac8579e8fdd7d0f01b7f1c9259e6739
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4459
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-27 09:15:27 +01:00
Tim Newsome 0c05aafbf8 Fix m*deleg logic.
Change-Id: Ieda035280334f8e7dc78c9fbc2bdbea7c565d2de
2018-03-26 16:00:34 -07:00
Tim Newsome b6dca68b2e Make m*deleg regs conditional on U/S/N
Change-Id: I544fc15625400d8ad64d4a65f0fc9d77f428ca84
2018-03-23 13:43:12 -07:00
Tim Newsome c534a37fc3 Make reset work again for multicore
Both regular multicore and RTOS hack methods.

Change-Id: I9a0998de0f33ef8a4d163f36ddf01c7675893b3d
2018-03-23 12:53:24 -07:00
Tim Newsome d7282d0bfe Add set_supports_havereset
This lets reset work on targets that don't implement havereset.

Change-Id: I09eb20970fac740eb6465541db6e739ae3e6b0d5
2018-03-22 12:44:15 -07:00
Tim Newsome e5591c2584 Halt the target again if it was reset while halted
Change-Id: I59707e7b2e1646c312d4eb8e96e9d7dfd1e128c2
2018-03-20 12:34:17 -07:00
Tomas Vanek 78a44055c5 transport: add transport_is_hla()
and move declaration of all transport_is_xxx() functions to transport.h

Change-Id: Ib229115b5017507b49655bc43b517ab6fb32f7a6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4469
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-20 11:48:44 +00:00
Tim Newsome 52eabbd2a5 Add `riscv set_prefer_sba`
This allows a user to tell OpenOCD to prefer system bus access for
memory access, which can be useful for testing, or when there really is
a difference in behavior.

Change-Id: I8c2f15b89a2ccdae568c68ee743b75a74f9ad6bd
2018-03-19 14:09:56 -07:00
Tim Newsome d5b450c508 Fix build, broken by b7c5c5d228.
Change-Id: Iee55d799e14376ec5079d7db5fc6369e85368212
2018-03-19 12:56:05 -07:00
Tim Newsome 40e0c5b976 Format error messages.
Change-Id: I50c21319765e1ead279223466ed02a06ecf6a522
2018-03-19 12:46:10 -07:00
Tim Newsome b7c5c5d228
Merge pull request #225 from riscv/old_bus2
Support v0 System Bus Access
2018-03-19 12:11:28 -07:00
Paul Fertser 828ee07657 server: bind to IPv4 localhost by default
Since OpenOCD basically allows to perform arbitrary actions on behalf of
the running user, it makes sense to restrict the exposure by default.

If you need network connectivity and your environment is safe enough,
use "bindto 0.0.0.0" to switch to the old behaviour.

Change-Id: I4a4044b90d0ecb30118cea96fc92a7bcff0924e0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4331
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2018-03-18 12:59:43 +00:00
Tim Newsome 4d2d1f7324 Notice when a hart has reset.
Attempt to notify the user.
Deal correctly with a halted target that is suddenly running.

Change-Id: Ib0e0aa843d1da22df673713687ec884f6af14949
2018-03-16 15:04:14 -07:00
Tim Newsome fd2759a63d Clear havereset in examine() and deassert_reset().
Change-Id: I89f32a44ebd6f3df0d0e2f6b54b111daa6ab06f7
2018-03-16 15:03:31 -07:00
Tim Newsome 848062d0d1 Propagate errors in more places
Change-Id: I5a7594d4b44c524537827f403348d0c10814546f
2018-03-16 15:03:31 -07:00
Matthias Welwarsky ffd6b78a2c aarch64: fix debug entry from EL0
If we enter debug state from EL0, some registers are not accessible.
Temporarily move to EL1H and back to gain access. Also, fix
armv8_dpm_modeswitch() to not immediately restore the previous state
on elevating the privilege level.

Change-Id: Ic2a92109230ff4eb6834c00ef544397a5b7ad56a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4461
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-16 08:58:06 +00:00
Matthias Welwarsky 935f0c5cc2 gdb_server: fake step if thread is not current rtos thread
gdb assumes that a rtos can make any thread active at will in response
to a 'Hg' packet. It further assumes that it needs to step-over after
setting a breakpoint on frame #0 of any non-current thread. Both
assumptions are not valid for an actual rtos. We fake the step-over to
not trigger an internal error in gdb. See
https://sourceware.org/bugzilla/show_bug.cgi?id=22925 for details.

Change-Id: Ida60cd134033c1d58ada77b87fe664a58f61e2c0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4448
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-16 08:57:20 +00:00