Fix error messages for reset dmi timeouts.
Change-Id: I00869ba20db6f27415af8e53e7b3e67741bf894d
This commit is contained in:
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005630d24d
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4593659edf
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@ -149,6 +149,7 @@ extern int debug_level;
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*/
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#define ERROR_FAIL (-4)
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#define ERROR_WAIT (-5)
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#define ERROR_TIMEOUT (-6)
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#endif /* OPENOCD_HELPER_LOG_H */
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@ -520,13 +520,8 @@ static int dmi_op_timeout(struct target *target, uint32_t *data_in, int dmi_op,
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LOG_ERROR("failed %s at 0x%x, status=%d", op_name, address, status);
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return ERROR_FAIL;
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}
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if (time(NULL) - start > timeout_sec) {
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LOG_ERROR("dmi.op is still busy after %d seconds. The target is "
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"either really slow or broken. You could increase the "
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"timeout with riscv set_command_timeout_sec.",
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timeout_sec);
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return ERROR_FAIL;
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}
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if (time(NULL) - start > timeout_sec)
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return ERROR_TIMEOUT;
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}
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if (status != DMI_STATUS_SUCCESS) {
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@ -549,13 +544,8 @@ static int dmi_op_timeout(struct target *target, uint32_t *data_in, int dmi_op,
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status);
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return ERROR_FAIL;
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}
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if (time(NULL) - start > timeout_sec) {
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LOG_ERROR("dmi.op is still busy after %d seconds. The target is "
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"either really slow or broken. You could increase the "
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"timeout with riscv set_command_timeout_sec.",
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timeout_sec);
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return ERROR_FAIL;
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}
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if (time(NULL) - start > timeout_sec)
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return ERROR_TIMEOUT;
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}
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if (status != DMI_STATUS_SUCCESS) {
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@ -575,8 +565,16 @@ static int dmi_op_timeout(struct target *target, uint32_t *data_in, int dmi_op,
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static int dmi_op(struct target *target, uint32_t *data_in, int dmi_op,
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uint32_t address, uint32_t data_out)
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{
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return dmi_op_timeout(target, data_in, dmi_op, address, data_out,
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int result = dmi_op_timeout(target, data_in, dmi_op, address, data_out,
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riscv_command_timeout_sec);
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if (result == ERROR_TIMEOUT) {
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LOG_ERROR("DMI operation didn't complete in %d seconds. The target is "
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"either really slow or broken. You could increase the "
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"timeout with riscv set_command_timeout_sec.",
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riscv_command_timeout_sec);
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return ERROR_FAIL;
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}
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return result;
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}
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static int dmi_read(struct target *target, uint32_t *value, uint32_t address)
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@ -592,9 +590,10 @@ static int dmi_write(struct target *target, uint32_t address, uint32_t value)
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int dmstatus_read_timeout(struct target *target, uint32_t *dmstatus,
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bool authenticated, unsigned timeout_sec)
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{
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if (dmi_op_timeout(target, dmstatus, DMI_OP_READ, DMI_DMSTATUS, 0,
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timeout_sec) != ERROR_OK)
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return ERROR_FAIL;
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int result = dmi_op_timeout(target, dmstatus, DMI_OP_READ, DMI_DMSTATUS, 0,
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timeout_sec);
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if (result != ERROR_OK)
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return result;
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if (authenticated && !get_field(*dmstatus, DMI_DMSTATUS_AUTHENTICATED)) {
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LOG_ERROR("Debugger is not authenticated to target Debug Module. "
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"(dmstatus=0x%x). Use `riscv authdata_read` and "
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@ -1604,44 +1603,45 @@ static int deassert_reset(struct target *target)
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index = r->current_hartid;
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}
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char *operation;
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uint32_t expected_field;
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uint32_t unexpected_field;
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if (target->reset_halt) {
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LOG_DEBUG("Waiting for hart %d to halt out of reset.", index);
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do {
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if (dmstatus_read_timeout(target, &dmstatus, true,
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riscv_reset_timeout_sec) != ERROR_OK)
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return ERROR_FAIL;
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if (time(NULL) - start > riscv_reset_timeout_sec) {
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LOG_ERROR("Hart %d didn't halt coming out of reset in %ds; "
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"dmstatus=0x%x; "
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"Increase the timeout with riscv set_reset_timeout_sec.",
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index, riscv_reset_timeout_sec, dmstatus);
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return ERROR_FAIL;
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}
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} while (get_field(dmstatus, DMI_DMSTATUS_ALLHALTED) == 0);
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target->state = TARGET_HALTED;
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operation = "halt";
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expected_field = DMI_DMSTATUS_ALLHALTED;
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unexpected_field = DMI_DMSTATUS_ANYRUNNING;
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} else {
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LOG_DEBUG("Waiting for hart %d to run out of reset.", index);
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while (get_field(dmstatus, DMI_DMSTATUS_ALLRUNNING) == 0) {
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if (dmstatus_read_timeout(target, &dmstatus, true,
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riscv_reset_timeout_sec) != ERROR_OK)
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return ERROR_FAIL;
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if (get_field(dmstatus, DMI_DMSTATUS_ANYHALTED) ||
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get_field(dmstatus, DMI_DMSTATUS_ANYUNAVAIL)) {
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LOG_ERROR("Unexpected hart %d status during reset. dmstatus=0x%x",
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index, dmstatus);
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return ERROR_FAIL;
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}
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if (time(NULL) - start > riscv_reset_timeout_sec) {
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LOG_ERROR("Hart %d didn't run coming out of reset in %ds; "
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"dmstatus=0x%x; "
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"Increase the timeout with riscv set_reset_timeout_sec.",
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index, riscv_reset_timeout_sec, dmstatus);
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return ERROR_FAIL;
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}
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}
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target->state = TARGET_RUNNING;
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operation = "run";
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expected_field = DMI_DMSTATUS_ALLRUNNING;
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unexpected_field = DMI_DMSTATUS_ANYHALTED;
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}
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LOG_DEBUG("Waiting for hart %d to %s out of reset.", index, operation);
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while (1) {
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int result = dmstatus_read_timeout(target, &dmstatus, true,
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riscv_reset_timeout_sec);
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if (result == ERROR_TIMEOUT)
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LOG_ERROR("Hart %d didn't complete a DMI read coming out of "
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"reset in %ds; Increase the timeout with riscv "
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"set_reset_timeout_sec.",
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index, riscv_reset_timeout_sec);
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if (result != ERROR_OK)
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return result;
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if (get_field(dmstatus, unexpected_field)) {
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LOG_ERROR("Unexpected hart %d status during reset. dmstatus=0x%x",
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index, dmstatus);
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return ERROR_FAIL;
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}
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if (get_field(dmstatus, expected_field))
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break;
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if (time(NULL) - start > riscv_reset_timeout_sec) {
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LOG_ERROR("Hart %d didn't %s coming out of reset in %ds; "
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"dmstatus=0x%x; "
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"Increase the timeout with riscv set_reset_timeout_sec.",
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index, operation, riscv_reset_timeout_sec, dmstatus);
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return ERROR_FAIL;
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}
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}
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target->state = TARGET_HALTED;
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if (get_field(dmstatus, DMI_DMSTATUS_ALLHAVERESET)) {
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/* Ack reset. */
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