Checkpoint: fix even more code style issues
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@ -2827,17 +2827,17 @@ static int get_max_sbaccess(struct target *target)
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uint32_t sbaccess8 = get_field(sbcs, DMI_SBCS_SBACCESS8);
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if (sbaccess128)
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return 4;
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return 4;
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else if (sbaccess64)
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return 3;
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return 3;
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else if (sbaccess32)
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return 2;
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return 2;
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else if (sbaccess16)
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return 1;
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return 1;
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else if (sbaccess8)
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return 0;
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else
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return ERROR_FAIL;
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return 0;
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else
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return ERROR_FAIL;
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}
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static int riscv013_test_sba_config_reg(struct target *target, target_addr_t illegal_address)
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@ -2887,7 +2887,7 @@ static int riscv013_test_sba_config_reg(struct target *target, target_addr_t ill
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}
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}
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if (test_passed)
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LOG_INFO("System Bus Access Test 1: Read/write test, no addr autoincrement PASSED");
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LOG_INFO("System Bus Access Test 1: Read/write test, no addr autoincrement PASSED");
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// Test 2: Simple write/read test, with address autoincrement
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test_passed = true;
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@ -2923,7 +2923,7 @@ static int riscv013_test_sba_config_reg(struct target *target, target_addr_t ill
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}
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}
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if (test_passed)
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LOG_INFO("System Bus Access Test 2: Read/write test, addr autoincrement PASSED");
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LOG_INFO("System Bus Access Test 2: Read/write test, addr autoincrement PASSED");
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// Test 3: Read from illegal address
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read_memory_sba_simple(target, illegal_address, sbcs_orig);
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@ -3014,11 +3014,10 @@ static int riscv013_test_sba_config_reg(struct target *target, target_addr_t ill
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sbcs = set_field(sbcs_orig, DMI_SBCS_SBBUSYERROR, 1);
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dmi_write(target, DMI_SBCS, sbcs);
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dmi_read(target, &rd_val, DMI_SBCS);
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if (get_field(rd_val, DMI_SBCS_SBBUSYERROR) == 0) {
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LOG_INFO("System Bus Access Test 6: SBCS sbbusyerror test PASSED");
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} else {
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LOG_ERROR("System Bus Access Test 6: SBCS sbbusyerror test FAILED, unable to clear to 0");
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}
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if (get_field(rd_val, DMI_SBCS_SBBUSYERROR) == 0)
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LOG_INFO("System Bus Access Test 6: SBCS sbbusyerror test PASSED");
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else
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LOG_ERROR("System Bus Access Test 6: SBCS sbbusyerror test FAILED, unable to clear to 0");
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} else {
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LOG_ERROR("System Bus Access Test 6: SBCS sbbusyerror test FAILED, unable to set");
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}
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