Use register_commands() with command registration array.
---
This module was broken by previous changes, but no one has complained.
Are there still users for this modules?
Use the new command registration chaining capabilities to eliminate
the foo_register_commands helper, folding its remaining command
handler setup into the hello_command_handlers registration array.
Adds the ability to chain registration structures. Modules can define a
command with the 'chain' and 'num_chain' fields defined in their
registration table, and the register_commands() function will initialize
these commands. If the registration record creates a new command, then
the chained commands are created under it; otherwise, they are created
in the same context as the other commands (i.e. the parent argument).
Use register_commands() to register low-level command handlers,
adding a builtin_command_handlers declaration that is easy to understand.
Splits help and usage information into their appropriate fields.
Adds the usage command, to display usage information for commands.
The output for this command will remain erronenously empty until
commands are updated to use these new coventions.
The register_commands API takes multiple commands in one call, allowing
modules to declare and pass a much simpler (and more explicit) array of
command_registration records.
Add a structure to encapsulate command registration information, rather
than passing them all as parameters. Enables further API changes that
require additional required or optional parameters.
Updates the register_command API and COMMAND_REGISTER macro to use it,
along with their documentation.
Provides a migration path for the widely used register_command API,
which needs to be updated to provide new functionality.
This macro allows the API to change without having to update all of its
callers at the same time.
There was a lot of needless handshaking overhead in the current
Cortex-A8 DCC/ITR operations, since the status read by each step
was discarded rather than letting the next step know it.
This shrinks the handshaking by: (a) passing status along from
previous steps, avoiding re-fetching; which enables the big win
(b) relying on a useful invariant: that the DSCR_INSTR_COMP bit
is set after every call to a DPM method.
A "reg sp_usr" call previously took 17 flushes; now it takes just 9.
This visibly speeds common operations like entry to debug state and
stepping, as well as "arm reg" and so on.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This replaces two versions of register access functions. One
was commented out, and seemed to have uncertain intent. The
other was fairly new, and helped motivate the DPM framework
once I observed that the ARM11 was doing the very same ops.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This implements the DPM interface for Cortex-A8 cores. It
also adds a synchronization operation to the DPM framework,
which is needed by the Cortex-A8 after CPSR writes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make various functions static, add some comments, report
vector catch as a flavor of DBG_REASON_BREAKPOINT, get
rid of needless/undesirable ARMV4_5_CORE_REG_MODE, etc.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous implementation was unnecessarily complex. Get rid of the loops,
let vsnprintf() tell us directly how much storage we need and allocate that. A
second pass writes the actual string. Also add a va_end() that was missing.
This should be much faster for large strings and less wasteful for small ones.
A quirk that has been retained is that some callers patch in a newline at the
end of the returned string and depend on alloc_vprintf to allocate at least
one byte extra.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Rewrite rlink_init routine to use jtag_usb_open helper. Eliminates
some spurious calls to exit().
Wraps a tremendously long line of comment to fit 80 columns too.
Begins to consolidate code used by several USB JTAG interfaces.
This first patch provides the required build system changes and
a common jtag_usb_open routine, which will replace the guts for
probing the busses and devices for possible VID/PID matches.
The following patches convert each driver to use it.
This finishes the basic switchover to the new register code,
for everything except the debug registers. (And maybe we
shouldn't have a cache for *those* which works this way...)
The context save/restore code now uses the new code, but
it's in a slightly different sequence. That should be fine
since the R0/PC/CPSR stuff is all that really matters (and
if we can update those, we can update the rest).
Now there's no longer a way any code can be confused about
which copy of "r1" (etc) to use.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
As with single stepping, the previous stuff was needed because
the ARM11 code wasn't using the standard ARM base type and
register access ... but now those mechanisms work, so we can
switch out that special-purpose glue, in favor of the more
thoroughly tested/capable "standard" code.
Fixes a bug in the resume() implementation: it wasn't handling
two of its arguments correctly, preventing the "flash erase_check"
algorithm from working. (This code needs a *subsequent* update
for correct register handling, though... removing the confusion
about which "r2", for example, to use.)
This should resolve some "FIXME" comments too, for Thumb and
processor mode support. It also gets rid of a nasty exit()
call; servers should only have *clean* shutdown paths.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous stuff was needed because the ARM11 code wasn't using
the standard ARM base type and register access ... but now those
mechanisms work, so we can switch out that special-purpose glue.
This should resolve all the "FIXME -- handle Thumb single stepping"
comments too, and properly handle the processor's mode. (Modulo
the issue that this code doesn't yet handle two-byte breakpoints.)
Clarify the comments about the the hardware single stepping. When
we eventually share breakpoint code with Cortex-A8, we can just make
that be the default on cores which support it. We may still want an
override command, not just to facilitate testing but to cope with
"instruction address mismatch" not quite being true single-step.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This provides "standard" ARM register support -- with twenty or
more shadow registers on top of what this code now handles, but
properly associated with the various core modes -- parallel to
the current register code. That is, the current code is stilil
managing the "current" registers; the new code shadows them.
You can see all the registers with "arm reg", modify the shadows
like "r8_fiq" or "sp_abt" with "reg", and see them get properly
written back when you step. (Just don't do that with any of the
registers managed by the "old" code ...)
It also switches to using more standard code, relying on those
standard registers, in two places: (a) the poll status display,
which now shows core state (ARM/Thumb/...) and mode (Supervisor,
IRQ, etc); and (b) GDB register access.
So it's not a full migration, there are warts -- every place that
touches the old register cache is a potential bug -- but it's a
small more-or-less-comprehensible step that's even somewhat useful.
Later patches complete the migration.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This was a private mechanism to snapshot registers before leaving
debug state, and then on reentry to optionally display what changed.
It was coupled to the private register cache, which won't be sticking
around in that form for much longer. Remove (instead of teaching
it how to handle *all* the registers).
(The idea is interesting, but we ought to be able to implement
this in a generic way. Ideally through Tcl scripts that can
automatically be invoked following debug entry...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is a very thin layer over some of the current ARM11
debug TAP utilities. The layer isn't yet hooked up.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
First version of interface for sharing code between ARMv6 and ARMv7a
debug modules ... now the architecture includes debug support. (Not
the same as for the trimmed-down v7m or v6m though!) This is a first
version of an interface that will let the ARM11 and Cortex-A8 support
share code, features, and bugfixes. Based on existing code from both
of those cores.
The ARM v7-AR architecture specification calls this commonality the
"Debug Programmer's Model (DPM)", which seemed to be an appropriate
acronym -- a TLA even! -- for use in our code. Made it so. :)
The initial scope of this just supports register access, and is geared
towards supporting top level "struct arm" mechanisms. Later, things
like breakpoint and watchpoint support should be included.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add $HOME/.openocd as the first default script search directory, allowing
the user to override the standard scripts.
Update the user guide with information on where OpenOCD expects to find
configuration files and scripts. Also fixed some minor formatting issues.
Add entry to NEWS as well.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
For now there's no point in saving this stuff after examine()
checks it out as OK. Ditto exporting symbols that aren't
used outside of the module which defines them. In fact, those
two things needlessly complicate the code...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make this code look more like the rest of the OpenOCD code.
- Use calloc() directly, not NEW() ... and fix some potential
memory leaks while we're at it.
- Remove FNC_INFO ... it's a NOP that just clutters things,
and it's trivial for developers to add tracing as needed.
- Replace FNC_INFO_NOTIMPLEMENTED with LOG_WARNING calls;
ditto. And stop having those call sites wrongly succeed!
- Waste less space with the CHECK_RETVAL() macro.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This will allow data to be allocated in read only
memory instead of on the stack. Speeds things up
and reduces stack usage.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
buf_set_u32() operated on an uninitialized stack
variable with non-byte boundaries, which led to
warnings about reading uninitialized stack.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Start using the arm_reg_current() call. This shrinks and speeds
the affected code. It can also prevent some coredumps coming from
invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns
bogus registers if e.g. "Secure Monitor" mode isn't supported by
the current CPU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We don't need to use size_t in these places; so it's easy
to be rid of the need for this #ifdef and its MS-derived
portability problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
With -O3 when inlining aggressively the total stack usage will
be the sum of many fn's, which can easily get out of hand.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Have arm_set_cpsr() handle the two core state flags, updating
the CPU state. This eliminates code in various debug_entry()
paths, and marginally improves handling of the J bit.
Catch and comment a few holes in the handling of the J bit on
ARM926ejs cores ... it's unlikely our users will care about
Jazelle mode, but we can at least warn of Impending Doom. If
anyone does use it, these breadcrumbs may help them to find
the right path through the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Define arm_reg_current() ... returning handle to a given register,
and encapsulating the current mode's register shadowing. It's got
one current use, for reporting the current register set to GDB.
This will let later patches clean up much ARMV4_5_CORE_REG_MODE()
nastiness, saving a bit of code.
Define and use arm_set_cpsr() ... initially it updates the cached
CPSR and sets up state used by arm_reg_current(), plus any SPSR
handle. (Later: can also set up for T and J bits.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Stash a pointer to the CPSR in the "struct arm", to help get rid
of the (common) references to its index in the register cache.
This removes almost all references to CPSR offsets outside of the
toplevel ARM code ... except a pair related to the current ARM11
"simulator" logic (which should be removable soonish).
This is a net minor code shrink of a few hundred bytes of object
code, and also makes the code more readable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Minor cleanup of ARM11 register handling: remove disabled
register hooks. This should all be handled by shared code,
and this stuff is just clutter.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add this to ease debugging why the standard scripts aren't
found on the default script search path in some build/install
enviroments. Especially on Windows it's not straight forward
where openocd actually looks for the scripts.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Implementations need to access the register struct they modify;
make it easier and less error-prone to identify the instance.
(This removes over 10% of the ARMV4_5_CORE_REG_MODE nastiness...)
Plus some minor fixes noted when making these updates: ARM7/ARM9
accessor methods should be static; don't leave CPSR wrongly marked
"dirty"; note significant XScale omissions in register handling;
and have armv4_5_build_reg_cache() record its result.
Rename "struct armv4_5_core_reg" as "struct arm_reg"; it's used
for more than those older architecture generations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove two commands that were documented as "debug commands"
and where "you probably don't want to use this". We never
intended to support them, and at least one problem report
boiled down to using this when it shouldn't have been used.
Update the docs on the existing register commands to talk a
bit more about register access and cache behavior. (Those
debug commands existed largely to *bypass* the cache.) And
fix some minor doc goofs that snuck in with recent changes,
renaming "armv4_5" as "arm" and "arm9tdmi" as "arm9".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rewrite means for scripts to register help text for commands. These
cause the new commands to be stored in the command heirarchy, with
built-in commands; however, they will never be invoked there because
they do not receive a command handler. The same trick is used for
the Jim commands.
Remove the old helpers that were used to register commands.
For the startup.tcl code to use built-in commands, the context must be
associated with the interpreter temporarily. This will be required to
add help text.
Rewrites 'help' command in C, using new 'cmd_help' for display. Adds the
built-in 'help' COMMAND_HANDLER to provide better output than the
TCL-based script command (e.g. heirarchical listing of commands).
The help string is stored in the command structure, though it conitnues
to be pushed into the Jim environment. The current idiomatic usage
suggests the addition of a usage field as well, to provide two levels
of detail for users to consume (i.e. terse usage list, or verbose help).
Creates a helper function, cmd_help, which displays the help string
for a single command. Presently, it is called from the loop in help.
The routine has been extended to allow indentation of command groups,
so an improved help command can improve the display of information.
Refactors the command registration to use helpers to simplify the code.
The unregistration routines were made more flexible by allowing them
to operate on a single command, such that one can remove all of a
commands children in one step (perhaps before adding back a 'config'
subcommand that allows getting the others back). Eliminates a bit
of duplicated code and adds full API documentation for these routines.
The previous version never wrote dirty registers
for non-current CPU modes ... fix that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We *should* be able to read and write registers in any core mode,
instead of being stuck with whatever mode the core was when we
entered debug state. This patch makes them work.
Note that the current restore_context() only handles the current
mode; writing to other-mode registers is a NOP without a followup
patch fixing that. Also, that SPSR access needed some bugfixes;
it was confused with CPSR.
Secure monitor mode also seems dubious; there's probably more to
be done before that's sufficiently understood by the debugger.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Create a generic register_cache_invalidate(), and use it to
replace three all-but-identical core-specific routines:
- armv4_5_invalidate_core_regs()
- armv7m_invalidate_core_regs
- mips32_invalidate_core_regs() too.
Make cache->num_regs be unsigned, avoiding various errors.
Net code shrink and simplification.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move bulk of for-loop to a new static command helper function.
Adds handle_nand_list_drivers command handler, registered as
'nand drivers'.
Improves command help text and error reporting.
Move variables to point of first use, reducing their scope.
Add driver_name temporary to help arguments be changed later.
Eliminates the useless 'found' variable, changing the code to terminate
the loop immediate and return its success.
After adding support for referencing banks by name, renames
the COMMAND_HELPERs appropriately:
flash_command_get_bank_by_num -> flash_command_get_bank
nand_command_get_device_by_num -> flash_command_get_device
Add get_flash_bank_by_name (and get_nand_device_by_name) helpers
to retrieves struct flash_bank * (struct nand_device *) given a
driver name and an (optional) driver-specific bank index.
These are used to extend flash_command_get_bank_by_num (and
nand_command_get_device_by_num) to allow all flash (nand) commands to
reference defined banks by name, not just by number.
To avoid some code duplication, add the flash/common.[ch] files to hold
functionality common to both types driver. The first two methods are
helpers for the above routines to find a bank specified by a "name" or
"name.index" string. get_flash_name_index() finds the '.index' portion,
while flash_driver_name_matches() performs the string portion matching.
Just pre-allocate memory for the cached register value.
Shrinks heap overhead; increases locality-of-reference.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Combine register names with other per-register data into a
single template structure. This saves space, and makes it
easier to change how registers get handled (by shrinking
the number of places that care about cache indices).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The examine() method has some conceptual breakage. Cope
with it by manually splitting out the run-once parts from
the after-each-reset parts ... this gets rid of memory
leaks and speeds up resets after the first one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We don't want an ARMv7-specific core state enumeration just to
add ThumbEE state. Update the generic stuff to handle that,
and replace the V7-specific bits with it.
For Cortex-A8: on debug entry, check both the T and J bits
instead of just the T bit. When the J bit is set, set the
right state and warn appropriately.
(And while we're at it, move the generic arm struct to the front
of the v7a structure, for somewhat better code generation.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The only way ARMv7-A modes differ from ARMv4/ARMv5 flavors
is that v7-A is allowed to include "Secure monitor" support.
That's now handled by our standard top-level ARM code ... so
phase out the stuff that's specific to ARMv7-A.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removing the fast command eliminates the fast_and_dangerous global,
which was used only by arm7_9_common as an initializer. The command
is not called in the tree; instead, more explicit commands are used.
The jim_global_long function was not used anywhere in the tree.
Adds the foo/bar commands to provide more working examples of command
argument parsing, including the new handle_command_parse_bool helper.
Updates hello command help text to provide useful information.
This patch changes the behavior of all boolean parsing callers to
accept any one of "true/enable/on/yes/1" or "false/disable/off/no/0".
Since one particular pair will be most appropriate in any given
situation, the specific macros should continue to be used in
order to display the most informative error messages possible.
Rewrite arm11_handle_bool to provide a generic on/off command helper.
Refactors COMMAND_PARSE_BOOL to use new command_parse_bool helper,
which gets reused by the new command_parse_bool_any helper.
This later helper is called by the new command helper function to
accepts any on/off, enable/disable, true/false, yes/no, or 0/1 parameter.
Updates all command parsing of simple "enable" and "disable" arguments.
A few case in the tree use a tri-state or extended arguments, which
cannot use this simple macro.
Simlifies the xscale icache/dcache command handler logic.
Adds several macros similar to COMMAND_PARSE_NUMBER, but for parsing
boolean command arguments. Two flavors are provided to provide
drop-in compatibility with existing code, allow for the elimination
of a lot of code bloat while improving the error checking and reporting.
COMMAND_PARSE_ON_OFF parses "on"/"off" command parameters.
COMMAND_PARSE_ENABLE parses "enable"/"disable" command parameters.
Both print the error and return an error out of the calling function.
Change the layout to show the "Secure Monitor" registers too,
when they're present.
Instead of lining registers for each of six (or seven) modes up
in adjacent vertical columns, display each mode's registers (or
shadows) in a single block, avoiding duplicate value displays.
This also lets us shrink the line length to fits in standard 80
character lines ... six or seven 18-character columns can't fit.
Relabel "r13" as "sp", so it's more meaningful.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When we read the CPSR on debug entry, update the CPSR cache in all
cases, not just when the current processor state is User or System.
Plus minor cleanup of how the (too-many) other registers' cache
entries get updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
If the core doesn't provide an optimized version of this
method, provide one without core-specific optimizations.
Use this to make Cortex-A8 support the "arm reg" command.
Related: make the two register access methods properly static,
have the "set" log a "not halted" error too, and make sure
that the "valid" flag is set on successful reads.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
ARMv7-A doesn't need to duplicate all the standard ARM code
for register handling.
- Switch Cortex-A8 to use the standard register code
- Remove duplicated infrastructure from ARMv7-A
- Have ARMv7-A arch_state() show CPSR, like other ARMs
Add comments to show where the Cortex-A8 isn't actually doing
the right thing for register reads/writes, unless core happens
to be in the right mode to start with. (Looks like maybe there
may be generic confusion between saved/current PSR values in all
the ARM code ...)
Make related ARMv7-A and Cortex-A8 symbols properly static.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Teach the "armv4_5" register code to understand about the
secure monitor mode:
- Add the other three shadowed registers to the arrays
- Support another internal mode number (sigh) in mappings
- Catch malloc/calloc failures building that register cache
This should kick in for Cortex-A8 and ARM1176.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's used to flag cores with the "TrustZone" extension,
and is used in subsequent patches to set up support for
the registers shadowed by its new secure monitor mode.
The ARM1176 and Cortex-A8 both support this new mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous changes to move the startup TCL code resulted in segfaults
during startup. This seemingly innocuous patch fixes the problem.
I would explain why changing from 'foo[]' to '*foo' caused this issue,
but the difference seems superficial. For now, this hot fix will do,
but this issue might bear further scrutiny.
Moves definitions for each layer into their own file, eliminating
layering violations in the built-in TCL code. Updates src/Makefile.am
rules to include all files in the final startup.tcl input file, and
others Makefile.am rules to distribute the new files in our packages.
The recent migration broke them, the fixes broken them in a new way,
but this should restore them to working order. Eliminates the
temporary variable, as the CMD_NAME macro can once again be use
in routines that increment CMD_ARGV without nasty side-effects.
Also, this is on the path to increasing the word size for
bit vectors from 8 to something wider(32? natural host machine
width?)
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add a new is_arm_mode() predicate, and use it to replace almost
all calls to current armv4_5_mode_to_number().
Eventually those internal mode numbers should vanish... along
with their siblings in the armv7a.c file.
Remove a handful of superfluous checks ... e.g. the mode number
was just initialized, or (debug entry methods) already validated.
Move one of the macros using internal mode numbers into the only
file which uses that macro. Make the tables manipulated with
those numbers be read-only and, where possible, static so they're
not confused with part of the generic ARM interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
All ARM cores need to provide obsolete FPA registers in their
GDB register dumps. (Even though cores with floating point
support now generally use some version of VFP...)
Clean up that support a bit by sharing the same dummy registers,
and removing the duplicate copies. Eventually we shouldn't need
to export those dummies.
(This makes the ARMv7-M support include the armv4_5 header, and
cleans up related #includes, but doesn't yet use anything from
there except those dummies.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Adds the command_invocation structure to encapsulate parameters for
all COMMAND_HANDLER routines. Rather than passing several arguments
to each successive subroutine, a single pointer may be passed around.
Changes the CMD_* macros to reference the new fields.
Updates run_command to create an instance and pass it to the handler.
Add additional macros to allow command handling to be migrated easily:
CMD_CTX, CMD_ARGC, and CMD_ARGV. Updates CMD_NAME to use CMD_ARGV.
In addition to making the remaining patches of this series cleaner,
this introduces easily sed-able symbols that could allow us to retire
these once the command handler infrastructure matures (i.e. pre-1.0).
No need to indirect from registered integers to pointers.
Just stash the pointers directly in the register struct,
and don't even bother registering.
This is a small code shrink, speeds register access just
a smidgeon, and gets rid of another rude exit() path.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The code is now much more explicit. It flushes every
N writes. For now flush every time, but tinkering with
the bridge FIFO size and how often we flush clearly
points in the direction of the Avalon write FIFO full
being the culprit.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Shifting by more than 32 is undefined for 32 bit integers according
to the C standard. Robust solution is conditional code.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
And move the rest of the vector_catch stuff into the C file;
it's not part of the module interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Also, switch integrity check over to the correct magic number,
and remove duplicate v4/v5 #define.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have ARM11 register the "standard" ARM commands. For now, only
disassembly really works.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the "armv4_5" command prefix to straight "arm" so it makes
more sense for newer cores. Add a simple compatibility script.
Make sure all the commands give the same "not an ARM" diagnostic
message (and fail properly) when called against non-ARM targets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix bug noted by Øyvind: terminate the IR length autoscan when
the IR is too long, or otherwise broken.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use size_t instead of uint32_t when specifying file sizes. Update all
consumers up through the layers to use size_t when required. These
changes should be safe, but the higher-levels will need to be updated
further to receive the intended benefits (i.e. large file support).
Add error checking for fileio_read and file_write. Previously, all
errors were being silently ignored, so this change might cause some
problems for some people in some cases. However, it gives us the chance
to handle any errors that do occur at higher-levels, rather than burying
our heads in the sand.
Uses unsigned type to pass line numbers.
Use uint64_t to pass sleep routines their milliseconds. Updates sleep
routines to use this type and improve whitespace.
Tweak "standard" ARM disassembler diagnostics to fail if the target
is not "an ARM" (vs. not "an ARMV4/5"), so it makes more sense for
cores inheriting this as the "generic" disassembler.
Also, to use the Thumb2 entry instead of the original Thumb entry.
This makes it work better for both newer cores (which support those
added instructions) and for BL and BLX instructions on older cores.
(Those instructions are 32-bits, which requires curious state-aware
code to go through a 16-bit decode interface...)
Plus minor cleanups, notably to have fewer exit paths and to make
sure they all return failure codes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
They're really too big to inline, at least for code that's
not in any performance-critical loops.
Also move the associated string table to the rodata section.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "improve inline binarybuffer helpers" mis-handled bytes
with the high bit set; treat them as unsigned, not signed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't include it in more headers than necessary; just
use it in the few files that actually need it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The ARRAY_SIZE macro was defined in several target files, so move it
to types.h.
This patch also removes two other identical macros: DIM (from jtag.h)
and asizeof (from arm11.h).
Eliminate redundant check that gets covered by using unsigned type.
Created to eliminate noise from subsequent patches, but this kind of
conversion will be beneficial in similar ways throughout the tree.
The container_of macro is useful as a general solution. It belongs
in types.h, rather than target.h where it was introduced. Requires
the offsetof macro, which comes from <stddef.h> (moved as well).
Add the 'nand verify' command to perform a dump and fake-write
simultaneously, checking the read bits against those generated by the
write process. Appropriate user documentation for this command has
been added to the user guide as well.
The algorithm presently makes a relatively naive comparison. Some chips
that use ECC may not verify correctly using this implementation, but the
new documentation provides details about this limitation.
In some cases, the FILEIO_NONE access mode may be useful as a parameter
to indicate that file access should be disabled. High-level routines can
use it to skip file access calls, as 'fileio_open' will fail presently
if called to open a file using this mode.
This patch eliminates duplicated code in the the NAND 'dump' and 'write'
by using the new static helper functions.
These changes also fix a possible memory leak in nand dump command, in
the case that the dump file failed to open.
Overall, the changes should be functionally equivalent, but the
resulting code will be easier to improve and extend further.
This patch provides helpers APIs that will eliminate duplicated code in
the the NAND 'dump' and 'write' commands by factoring their common code
into static helper functions. These helpers may be useful for creating
new commands, as shown in the final patch to 'verify' flash from a file.
Several previously unreported error conditions now generate messages and
propogate the return codes, such as when the file fails to open and bad
arguments are given. These changes will fix a possible memory leak in
nand dump command, in the case that the dump file failed to open.
Overall, the changes should be functionally equivalent, but the
resulting code will be easier to improve and extend consistently.
Rewrite buf_cmp to use memcpy for bulk of comparison. Add static
helper to perform comparison of trailing byte, which uses another
static helper to perform a maksed comparison. The masked comparison
helper is used by the buf_cmp_mask to simplify its loop.
Improve types to use void *, unsigned, and return bool.
Don't include "target.h" from more headers than necessary. This
avoids needless interdependencies and duplicated include paths.
Don't needlessly include it in source files, either.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Same deal: "register.h" got needlessly included all over the
place because of being in a few widely included headers.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also, don't need that extra "types.h" inclusion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Lots of files still include it, often through needless
duplicate inclusion of "log.h"; sigh.
This cleans up the inclusion graph a bunch, so there are
fewer inclusion paths, but it doesn't change much otherwise.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most files in the tree seem to have ended up including this,
and *quite* needlessly ... only code implementing or using
downloadable algorithms actually needs these declarations.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also: "algorithm.h" doesn't need to include "types.h" again;
it already comes from a different header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most files in the tree seem to have ended up including this,
and *quite* needlessly ... only code implementing or using
breakpoints actually needs these declarations.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now the ARM11 cores can use the renamed arm_checksum_memory()
and arm_blank_check_memory() routines ... do so.
Sanity checked with "flash erase_check" of both NOR banks on an
OMAP2420 ... the algorithm code dumped four lines of of "poll"
status after each of almost 520 blocks (yes, *very* annoying) but
gave plausible results after producing that spam.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Three changes: remove ARM11_HANDLER() in favor of normal structure
initialization syntax; fix goofy indentation in that structure; and
don't needlessly export arm11_register_commands(), it's only called
through that method table.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The arm7_9_checksum_memory() and arm7_9_blank_check_memory()
routines are not actually specific to the ARM7 and ARM9 core
generations ... they can work for any core which can run
algorithms using basic ARM (not Thumb) instructions.
Rename them; move the declarations to a more generic site;
likewise move the code (and tidy it a bit in the process).
NOTE: the blank_check() method falsely returned a success
status (0) on one error path, when the algorithm failed.
Fixed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Previously this flag was stored in "target_type", so that for example
if there were two ARM7TDMI targets in a scan chain, both would claim
to have been examined although only the first one actually had its
examine() method called.
Move this state to where it should have been in the first place, and
hide a method that didn't need exposure ... the flag is write-once.
Provide some doxygen. The examine() method is confusing, since it
isn't separating one-time setup from the after-each-reset stuff. And
the ARM7/ARM9 version is, somewhat undesirably, not leaving the debug
state alone after reset ... probably more of an issue for trace setup
than for watchpoints and breakpoints.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes unused arm_jtag_buf_* helpers from arm_jtag.[ch]. These could
reappear if patches are provided to conver the tree to use them, but
this code should not be in the master tree until that series is ready.
Purge an unused routine from the tree and remove a layering violation.
If this code is needed, it should reappear somwhere in src/jtag/,
where struct scan_field gets defined.
It's completely unused; the obnoxious "DANGER!!!" comments
don't even explain what it was doing (shorthand SVN magic).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This fixes an issue due to the new command handler syntax caused by the mw handler playing with the args pointer before
using the CMD_NAME macro. Fix is to move this call above the lines changing args.
Create src/openocd.h to hold declarations previously made internally
by src/main.c and src/server/server.c. This ensures all functions
are verified to be in-sync at compile time (rather than at link),
making it easier to track down bugs.
Changed some printf format strings..
[dbrownell@users.sourceforge.net: shrink lines, fix indents]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Kick in ETM (and ETB) support for ARM11. Tested on OMAP 2420,
so update that configuration. (That's an ARM1136ejs, ETB,
OpenGL ES1.1, C55x DSP, etc.)
Also update the other ARM11 ETM + ETB targets in the tree
to set up these modules. (Not tested.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These aren't desirable, given "standard" ETM support.
Also remove the now-unused arm11_find_target().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in having two identical examine methods for the
ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share.
Add a bit of doxygen; stop needlessly exporting a method.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Return NULL from etm_build_reg_cache() not ERROR_OK; and share
code on that fault path.
Let ETM code handle any tracking of its cache -- not callers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This will enable reusing many common ARM utilities, in
particular the ETM and ETB support. The ARM11 support
can still be much simplified after this patch, though.
Note: none of those common utilities kick in yet...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We have too many different registers, and too many version and
context dependent interpretations, for this type of bitfield
management to be scalable.
(Anyone who really wants bitfield interpretation *can* do that
in Tcl code...)
There are ... quite a few copies of the same ARM dummy registers.
There should eventually be one copy; this many is craziness.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove the last external user of arm7_9_get_arch_pointers(), and
that annoying downcast utility. Add an is_arm7_9() predicate.
Stop returning specious success codes on various failure paths
in the ARM7/ARM9 commands which used that downcast utility.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The hello module provides the 'hello' command, printing a greetings
to the command console. It can grow to serve as pedagogical example
of services that OpenOCD developers should use: a runnable style guide.
The number of command arguments will always be 0 or more, so use
the right type in handlers. This has a cascading effect up through
the layers, but the new COMMAND_HANDLER macros prevented total chaos.
By using CALL_COMMAND_HANDLER, parameters can be reordered, added, or
even removed in inherited signatures, without requiring revisiting
all of the various call sites.
The FLASH_BANK_COMMAND_HANDLER provides an extended command handler
using the __COMMAND_HANDLER macro, whereby changing that macro is
sufficient to update flash handlers with the new signature. It also
enforces uniform style and scope when implementing this handler.
This patch adds new typedefs for command handler callback functions.
Users of this type signature were updated to use these new types.
It uses the new __COMMAND_HANDLER macro to prevent duplication.
The COMMAND_HANDLER and COMMAND_HELPER macros allow commands to be
defined in a manner that decouples them from the exact order and type of
their parameters. Once converted, incremental changes to the command
handler type can be addressed in incremental patches that do not need to
touch the entire tree.
These macros' implementation, __COMMAND_HANDLER, is used to define the
new command_handler_t type, and additional patches will use it to derive
new macros to define extended command types (e.g. flash, nand, pld).
The CALL_COMMAND_HANDLER provides a means of calling helpers or nested
handlers from withing a command handler.
This patch uses C99 varadic macro expansion. Please report compilers
that cannot handle this code.
The "remove (forward) declarations" patch goofed indentation on the
"cortexa8_target" struct; fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
To be more informative (and consistent with flash and pld trees), change
'device' parameter name to 'nand' in NAND source files. This change
eliminates confusing 'device->device->' instance from the code, and
it simplifies the forthcoming command handler patches.
ARM11 and newer cores include updated ETM modules. Recognize
their version codes and some key config differences. Sanity
checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1).
This still handles only scan chain 6, with at most 128 registers.
Newer cores (mostly, Cortex) will need to use the DAP instead.
Note that the newer ETM modules don't quite fit the quirky config
model of the older ones ... having more port widths is easy, but
the modes aren't the same. That still needs to change.
Fix a curious bug ... how did the register cache NOT get saved??
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add the khz and speed_div functions to the parport interface driver.
Add the parport_toggling_time function that tells the parport driver
how long (in nanoseconds) it takes for the hardware to toggle TCK.
[dbrownell@users.sourceforge.net: tweak doc for clarity, mention
multimeter, and whitespace fixes]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.
Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.
The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP. Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ETM itself use the new toplevel ETM handle, instead
of the to-be-removed lower level one. As of this patch,
nothing should be using the old ARM7/ARM9-specific handle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make both useful ETM port drivers (etb, etm_dummy) use the new
toplevel ETM handle, instead of the to-be-removed lower level one.
Do the same for the "oocd-trace" prototype too; and fix its
error reporting paths: return failure codes, don't exit(), etc
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ARM7 and ARM9 cores use the new toplevel ETM handle to
trigger ETM setup, not the to-be-removed lower level one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename "struct armv4_5_common_s" as "struct arm". It needs
a bit more work to be properly generic, and to move out of
this header, but it's the best start we have on that today.
Add and initialize an optional ETM pointer, since that will
be the first thing that gets generalized.
The intent being: all ARMs should eventually derive from
this "struct arm", so they can reuse the current ETM logic.
(And later, more.) Currently the ARM cores that *don't* so
derive are only ARMv7-M (and thus Cortex-M3) and ARM11.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Eliminate duplicate code for linking commands into a list.
Adds a check to ensure the command does not already exist;
if it does, return that one instead of creating a duplicate.
Add help for commands regardless of whether a handler is involved.
With this, all sorts of new commands can be found in 'help' text.
Hopefully, all of them have been documented....
Sadly, the lsort function appears to handle nested lists poorly, such
that sub-commands do not group with their parents.
The command_name function returns a malloced string for a given
command and its parents. This can be used to display a message
to the user, but it is used internally to handle registration
and syntax errors. This helps permit arbitrary command nesting.
Add 'const' keyword to 'char *' parameters to allow command handlers to
pass constant string arguments. These changes allow the 'args' command
handler to be changed to 'const' in a subsequent patch.
Subsequent patches expect all command handlers to use a uniform
parameter naming scheme. In the entire tree, these two files used
standard 'argv' instead of our non-standard 'args'. This patch opts
to reduces the noise required to unify the command handlers, using
dominant 'args' form.
A future patch may be used to convert us back to the standard argv, but
that requires coordination with all developers to minimize disruptions.
Separates various groups of files to be built in logical succession.
In each layer, the core module (target.c, nand.c, etc.) is built _after_
their helper modules (e.g. image.c, nand_ecc.c) but _before_ any of
their drivers (e.g. arm966e.c, mx3_nand.c).
This allows problems introduced at the bottom of the stack to result
in build failures as soon as possible, as the helpers and core should
wrap portions of them.
Various cleanups of ETM related code.
- Saner error return paths
- Simplify arm7_9 init ... no need for extra zeroing!
- Shrink some lines
- Tweak some diagnostics
- Use shorter name for ETM struct type.
- Don't exit()
and similar. The diagnostics look forward to having
this ETM code work with more than just ARM7/ARM9.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "ARM720 uses the new inheritance/nesting scheme" patch
wrongly scrubbed a calloc() from arm720t_target_create().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Start switching MMU handling over to a more sensible scheme.
Having an mmu() method enables MMU-aware behaviors. Not having
one kicks in simpler ones, with no distinction between virtual
and physical addresses.
Currently only a handful of targets have methods to read/write
physical memory: just arm720, arm920, and arm926. They should
all initialize OK now, but the arm*20 parts don't do the "extra"
stuff arm926 does (which should arguably be target-generic).
Also simplify how target_init() loops over all targets by making
it be a normal "for" loop, instead of scattering its three parts
to the four winds.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
First cut of these commands. Øyvind tinkered a bit with
the number parsing to bring it up to speed + rebased it.
Ready for testing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- improve some names -- a "default" prefix is not descriptive
- add doxygen @todo entries for some issues
- avr8 isn't ever going to need those MMU hooks
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Contrary to my previous assessment, some opportunities to remove forward
declarations were overlooked. Remove them by moving the definitions
of the command registration and interface structure to the end of files.
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of file.
Moves flash structure definitions to end of files.
Changes a few references to global flash structure to local refs.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registrations to end of files.
Moves flash structure definitions to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of files.
Moves flash structure definition to end of files.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Remove useless forward declarations.
Moves command registration to end of file.
Moves flash structure definition to end of file.
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
This patch introduced a bug preventing flash writes from working
on Cortex-M3 targets like the STM32. Moreover, it's the wrong
approach for handling no-MMU targets.
The right way to handle no-MMU targets is to provide accessors
for physical addresses, and use them everywhere; and any code
which tries to work with virtual-to-physical mappings should use
a identity mapping (which can be defaulted).
And ... we can tell if a target has an MMU by seeing if it's
got an mmu() method. No such methood means no MMU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's been about a year since these were deprecated and, in most
cases, removed. There's no point in carrying that documentation,
or backwards compatibility for "jtag_device" and "jtag_speed",
around forever. (Or a few remnants of obsolete code...)
Removed a few obsolete uses of "jtag_speed":
- The Calao stuff hasn't worked since July 2008. (Those Atmel
targets need to work with a 32KHz core clock after reset until
board-specific init-reset code sets up the PLL and enables a
faster JTAg clock.)
- Parport speed controls don't actually work (tops out at about
1 MHz on typical HW).
- In general, speed controls need to live in board.cfg files (or
sometimes target.cfg files), not interface.cfg ...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes 'extern' keywords from function prototypes in the flash headers.
Wraps long lines to fit into 80 columns.
Adds multiple inclusion protection for s3c2xx_nand.h.
Removes the 'extern' keyword from function declarations.
Wraps long prototypes to fit into 80 columns.
Fixes documentation for jtag_tap_s::{,has}idcode fields.
The "$ocd_HOSTOS" variable was wrongly documented. Fix its
documentation, and its value on Linux.
Shrink a few of the too-long lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add comments (Doxygen and normal), remove unused code,
shrink some overlong lines. Get rid of a forward decl.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch changes the duration_* API in several ways. First, it
updates the API to use better names. Second, string formatting has
been removed from the API (with its associated malloc). Finally, a
new function added to convert the time into seconds, which can be
used (or formatted) by the caller. This eliminates hidden calls to
malloc that require associated calls to free().
This patch also removes the useless extern keyword from prototypes,
and it eliminates the duration_t typedef (use 'struct duration').
These API also allows proper error checking, as it is possible for
gettimeofday to fail in certain circumstances.
The consumers have all been chased to use this new API as well, as
there were relatively few cases doing this type of measurement.
In most cases, the code performs additional checks for errors, but
the calling code looks much cleaner in every case.
Reduces confusion about location of associated routines and
reduces clutter in the arm11 header.
Removes extra whitespace around the lines touched by these changes.
Make several functions be static. Shrink some of the overlong
lines. Use pure tab indents in some places that mixed in spaces.
This gives a minor object code shrink (about 2% on amd64).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Resolve serious bug inserted by the "target: require working
area for physical/virtual addresses to be specified" patch.
It forced use of (invalid) virtual addresses when the MMU
was disabled, and vice versa.
Observed to break at least Cortex-M3, ARM926, ARM7TDMI whenever
work areas are used, such as during bulk writes to flash, DDR2,
SRAM, and so on.
Also, fix overlong lines and whitespace goofs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move various embedded target structs to the beginnings of
their containers ... pretty much the way C++ or Obj-C
would for single inheritance.
This shrinks code that accesses those embedded structs by
letting common offsets use smaller instructions. Sample
before/after sizes (on amd64):
17181 312 0 17493 4455 arm920t.o
16810 312 0 17122 42e2 arm920t.o
Where the "after" is the smaller number, with this patch
over the ones leveraging that embedding knowledge.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove most remaining uses of target->arch_info from ARM
infrastructure, where it hasn't already been updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_armv7a() etc, replacing needless pointer traversals.
Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm7_9(), replacing needless pointer traversals.
Also: remove now-useless contents of arm7tdmi struct; it's
almost ready to be removed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm720(), replacing needless pointer traversals
and simplifying a bunch of nasty code. Stop setting arch_info
for arm720 type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_xscale(), replacing needless pointer traversals
and simplifying a bunch of code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Replace needless pointer traversals and simplify. Also remove most
remaining contents from arm9tdmi struct; it's almost removable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm926(), replacing needless pointer traversals
and simplifying a bunch of code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm920(), replacing needless pointer traversals
and simplifying. Stop setting arm9tdmi->arch_info for arm920
type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use new target_to_cm3() and target_to_armv7m() inlines,
instead of a series of x->arch_info conversions. Remove
arch_info, since nothing uses it.
Also fix an omission: the Cortex-M3 commands didn't verify
that they were operating on that kind of target. Add comment
about the ARMv7M version of that omission.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide a cleaner way to handle single inheritance of targets
in C, using the same model Linux does: structs containing other
structs, un-nested via calls to a "container_of()" macro that
are packaged in typesafe inline functions.
Targets already use this containment idiom, but make it much
more complicated because they un-nest using embedded "void *"
pointers ... in chains of up to five per target, which is all
pure needless complication. (Example: arm92x core, arm9tdmi,
arm7_9, armv4_5 ... on top of the base "target" class.)
Applying this scheme consistently simplifies things, and gets
rid of many error-prone untyped pointers. It won't change any
part of the type model though -- it just simplifies things.
(And facilitates more cleanup later on.)
Rule of thumb: where there's an X->arch_info void* pointer,
access to that pointer can and should be removed. It may be
convenient to set up pointers to some of the embedded structs;
and shrink their current "*_common" names (annoyingly long).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions; get rid of arm7tdmi_register_commands(), it's
not needed (just delegated); minor whitespace declutter.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch
David Brownell
Andreas Fritiofson
Jerry Ling
Øyvind Harboe
Dean Glazeski
Krzysztof Dziuba
Ferdinand Postema
Jonas Horberg
Michael Bruck