ARM7/ARM9: use shared examine() method
No point in having two identical examine methods for the ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share. Add a bit of doxygen; stop needlessly exporting a method. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@ -548,8 +548,7 @@ struct target_type arm720t_target =
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.register_commands = arm720t_register_commands,
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.target_create = arm720t_target_create,
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.init_target = arm720t_init_target,
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.examine = arm7tdmi_examine,
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.examine = arm7_9_examine,
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.mrc = arm720t_mrc,
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.mcr = arm720t_mcr,
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};
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@ -37,7 +37,25 @@
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#include "arm_simulator.h"
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int arm7_9_debug_entry(struct target *target);
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/**
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* @file
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* Hold common code supporting the ARM7 and ARM9 core generations.
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*
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* While the ARM core implementations evolved substantially during these
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* two generations, they look quite similar from the JTAG perspective.
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* Both have similar debug facilities, based on the same two scan chains
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* providing access to the core and to an EmbeddedICE module. Both can
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* support similar ETM and ETB modules, for tracing. And both expose
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* what could be viewed as "ARM Classic", with multiple processor modes,
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* shadowed registers, and support for the Thumb instruction set.
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*
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* Processor differences include things like presence or absence of MMU
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* and cache, pipeline sizes, use of a modified Harvard Architecure
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* (with separate instruction and data busses from the CPU), support
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* for cpu clock gating during idle, and more.
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*/
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static int arm7_9_debug_entry(struct target *target);
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/**
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* Clear watchpoints for an ARM7/9 target.
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@ -1311,7 +1329,7 @@ int arm7_9_halt(struct target *target)
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* @param target Pointer to target that is entering debug mode
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* @return Error code if anything fails, otherwise ERROR_OK
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*/
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int arm7_9_debug_entry(struct target *target)
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static int arm7_9_debug_entry(struct target *target)
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{
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int i;
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uint32_t context[16];
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@ -2838,6 +2856,42 @@ int arm7_9_blank_check_memory(struct target *target, uint32_t address, uint32_t
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return ERROR_OK;
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}
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/**
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* Perform per-target setup that requires JTAG access.
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*/
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int arm7_9_examine(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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int retval;
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if (!target_was_examined(target)) {
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struct reg_cache *t, **cache_p;
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t = embeddedice_build_reg_cache(target, arm7_9);
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if (t == NULL)
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return ERROR_FAIL;
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cache_p = register_get_last_cache_p(&target->reg_cache);
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(*cache_p) = t;
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arm7_9->eice_cache = (*cache_p);
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if (arm7_9->armv4_5_common.etm)
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(*cache_p)->next = etm_build_reg_cache(target,
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&arm7_9->jtag_info,
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arm7_9->armv4_5_common.etm);
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target_set_examined(target);
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}
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retval = embeddedice_setup(target);
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if (retval == ERROR_OK)
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retval = arm7_9_setup(target);
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if (retval == ERROR_OK && arm7_9->armv4_5_common.etm)
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retval = etm_setup(target);
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return retval;
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}
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COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
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{
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uint32_t value;
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@ -159,5 +159,6 @@ void arm7_9_disable_eice_step(struct target *target);
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int arm7_9_execute_sys_speed(struct target *target);
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int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9);
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int arm7_9_examine(struct target *target);
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#endif /* ARM7_9_COMMON_H */
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@ -646,42 +646,6 @@ static void arm7tdmi_build_reg_cache(struct target *target)
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armv4_5->core_cache = (*cache_p);
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}
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int arm7tdmi_examine(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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int retval;
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if (!target_was_examined(target))
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{
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/* get pointers to arch-specific information */
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struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
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struct reg_cache *t = embeddedice_build_reg_cache(target, arm7_9);
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if (t == NULL)
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return ERROR_FAIL;
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(*cache_p) = t;
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arm7_9->eice_cache = (*cache_p);
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if (arm7_9->armv4_5_common.etm)
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(*cache_p)->next = etm_build_reg_cache(target,
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&arm7_9->jtag_info,
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arm7_9->armv4_5_common.etm);
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target_set_examined(target);
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}
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if ((retval = embeddedice_setup(target)) != ERROR_OK)
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return retval;
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if ((retval = arm7_9_setup(target)) != ERROR_OK)
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return retval;
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if (arm7_9->armv4_5_common.etm)
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{
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if ((retval = etm_setup(target)) != ERROR_OK)
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return retval;
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}
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return ERROR_OK;
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}
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int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)
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{
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arm7tdmi_build_reg_cache(target);
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@ -786,5 +750,5 @@ struct target_type arm7tdmi_target =
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.register_commands = arm7_9_register_commands,
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.target_create = arm7tdmi_target_create,
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.init_target = arm7tdmi_init_target,
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.examine = arm7tdmi_examine,
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.examine = arm7_9_examine,
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};
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@ -35,6 +35,5 @@ struct arm7tdmi_common
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int arm7tdmi_init_arch_info(struct target *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap);
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int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target);
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int arm7tdmi_examine(struct target *target);
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#endif /* ARM7TDMI_H */
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@ -1420,7 +1420,7 @@ struct target_type arm920t_target =
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.register_commands = arm920t_register_commands,
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.target_create = arm920t_target_create,
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.init_target = arm9tdmi_init_target,
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.examine = arm9tdmi_examine,
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.examine = arm7_9_examine,
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.mrc = arm920t_mrc,
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.mcr = arm920t_mcr,
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};
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@ -877,7 +877,7 @@ struct target_type arm926ejs_target =
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.register_commands = arm926ejs_register_commands,
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.target_create = arm926ejs_target_create,
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.init_target = arm9tdmi_init_target,
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.examine = arm9tdmi_examine,
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.examine = arm7_9_examine,
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.virt2phys = arm926ejs_virt2phys,
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.mmu = arm926ejs_mmu,
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@ -268,5 +268,5 @@ struct target_type arm966e_target =
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.register_commands = arm966e_register_commands,
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.target_create = arm966e_target_create,
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.init_target = arm9tdmi_init_target,
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.examine = arm9tdmi_examine,
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.examine = arm7_9_examine,
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};
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@ -742,41 +742,6 @@ static void arm9tdmi_build_reg_cache(struct target *target)
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armv4_5->core_cache = (*cache_p);
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}
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int arm9tdmi_examine(struct target *target)
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{
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int retval;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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if (!target_was_examined(target))
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{
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struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
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struct reg_cache *t;
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/* one extra register (vector catch) */
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t = embeddedice_build_reg_cache(target, arm7_9);
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if (t == NULL)
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return ERROR_FAIL;
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(*cache_p) = t;
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arm7_9->eice_cache = (*cache_p);
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if (arm7_9->armv4_5_common.etm)
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(*cache_p)->next = etm_build_reg_cache(target,
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&arm7_9->jtag_info,
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arm7_9->armv4_5_common.etm);
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target_set_examined(target);
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}
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if ((retval = embeddedice_setup(target)) != ERROR_OK)
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return retval;
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if ((retval = arm7_9_setup(target)) != ERROR_OK)
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return retval;
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if (arm7_9->armv4_5_common.etm)
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{
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if ((retval = etm_setup(target)) != ERROR_OK)
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return retval;
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}
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return ERROR_OK;
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}
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int arm9tdmi_init_target(struct command_context *cmd_ctx,
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struct target *target)
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{
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@ -986,5 +951,5 @@ struct target_type arm9tdmi_target =
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.register_commands = arm9tdmi_register_commands,
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.target_create = arm9tdmi_target_create,
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.init_target = arm9tdmi_init_target,
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.examine = arm9tdmi_examine,
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.examine = arm7_9_examine,
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};
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@ -53,7 +53,6 @@ enum arm9tdmi_vector_bit
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int arm9tdmi_init_target(struct command_context *cmd_ctx,
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struct target *target);
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int arm9tdmi_examine(struct target *target);
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int arm9tdmi_init_arch_info(struct target *target,
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struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap);
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int arm9tdmi_register_commands(struct command_context *cmd_ctx);
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@ -393,5 +393,5 @@ struct target_type fa526_target =
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.register_commands = arm920t_register_commands,
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.target_create = fa526_target_create,
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.init_target = arm9tdmi_init_target,
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.examine = arm9tdmi_examine,
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.examine = arm7_9_examine,
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};
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@ -646,7 +646,7 @@ int feroceon_examine(struct target *target)
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struct arm7_9_common *arm7_9;
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int retval;
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retval = arm9tdmi_examine(target);
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retval = arm7_9_examine(target);
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if (retval != ERROR_OK)
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return retval;
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