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14,055 Commits 92 Branches 49 Tags 39 MiB
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14055 Commits

Author SHA1 Message Date
Clifford Wolf 8426884b40 Re-enabled mux->and/or transform (and fixed lm32 in yosys-bigsim) 2015-01-13 13:20:09 +01:00
Clifford Wolf dfa42e272c Tiny fix in vcdcd.pl 2015-01-13 12:59:29 +01:00
Clifford Wolf dd699e03c1 Small Makefile typo fix 2015-01-13 12:21:27 +01:00
Clifford Wolf 95f1eb9b87 Only enable code coverage counters on linux 2015-01-09 17:32:53 +01:00
Clifford Wolf bd3dd80526 Merge pull request #46 from utzig/master 
Fixes building on a Mac using Homebrew as package manager
 2015-01-08 16:06:03 +01:00
Fabio Utzig 0a231f96d7 Enable use of homebrew's provided bison if available 2015-01-08 09:58:24 -02:00
Fabio Utzig fff6f00b3c Enable bison to be customized 2015-01-08 09:56:20 -02:00
Fabio Utzig b16ed78b43 Add homebrew's libffi paths 2015-01-08 09:54:28 -02:00
Fabio Utzig 0ca889a433 Add homebrew's readline paths 2015-01-08 09:52:30 -02:00
Clifford Wolf 1d96277f5d Added add_share_file Makefile macro 2015-01-08 00:23:18 +01:00
Clifford Wolf 38dfc5c580 added minimalistic xilinx sim models 2015-01-08 00:05:11 +01:00
Clifford Wolf fd787609aa disabled problematic mux -> and/or transform 2015-01-07 23:25:51 +01:00
Clifford Wolf d1e38693d5 More Xilinx bram cleanups 2015-01-07 01:59:36 +01:00
Clifford Wolf 584c5f3937 Cleanups in xilinx bram descriptions 2015-01-07 01:28:18 +01:00
Clifford Wolf b26590f8ab memory_bram hotfix for memories with width 1 2015-01-06 23:59:53 +01:00
Clifford Wolf 08c13f635c Xilinx RAMB36/RAMB18 memory_bram support complete 2015-01-06 23:54:33 +01:00
Clifford Wolf ec2eef89fa Towards Xilinx bram support 2015-01-06 23:21:52 +01:00
Clifford Wolf 7cc5192125 small fix in xilinx/brams.v 2015-01-06 17:21:18 +01:00
Clifford Wolf 07703bdac4 fixed compiler warning on non-linux archs 2015-01-06 16:12:43 +01:00
Clifford Wolf da72050107 removed old debug code 2015-01-06 16:08:04 +01:00
Clifford Wolf 859e3e41e7 hashlib iterator fix 2015-01-06 16:05:00 +01:00
Clifford Wolf 9fb715dc74 build fix for mxe 2015-01-06 15:46:58 +01:00
Clifford Wolf 9474928672 Towards Xilinx bram support 2015-01-06 15:26:33 +01:00
Clifford Wolf 4a0b3a5423 Various small improvements to synth_xilinx 2015-01-06 14:37:50 +01:00
Clifford Wolf 081e1a49f8 Towards Xilinx bram support 2015-01-06 14:26:51 +01:00
Clifford Wolf 9c7f47bbd5 Towards Xilinx bram support 2015-01-06 13:33:51 +01:00
Clifford Wolf 462b22f44f dict<> ref vs insert bugfix 2015-01-06 00:16:44 +01:00
Clifford Wolf 9ea2511fe8 Towards Xilinx bram support 2015-01-05 13:59:04 +01:00
Clifford Wolf 8898897f7b Towards Xilinx bram support 2015-01-04 14:23:30 +01:00
Clifford Wolf daae35319b Added memory_bram "shuffle_enable" feature 2015-01-04 13:14:30 +01:00
Clifford Wolf 5d631f0ea7 Removed left over debug code from memory_bram 2015-01-04 11:46:04 +01:00
Clifford Wolf 0648e2874c Fixed pattern matching in "hierarchy -generate" 2015-01-04 11:45:39 +01:00
Clifford Wolf f9304e6c10 Print non-errors to stdout 2015-01-03 22:10:33 +01:00
Clifford Wolf 45918b8315 Added "memory -bram" 2015-01-03 17:40:20 +01:00
Clifford Wolf a7fe87f888 Added memory_bram 'or_next_if_better' feature 2015-01-03 17:34:05 +01:00
Clifford Wolf fd2c224c04 memory_bram transp support 2015-01-03 12:41:46 +01:00
Clifford Wolf a7e43ae3d9 Progress in memory_bram 2015-01-03 10:57:01 +01:00
Clifford Wolf 146f769bee Cosmetic changes in verilog output format 2015-01-02 22:57:08 +01:00
Clifford Wolf 90f4017703 Added proper clkpol support to memory_bram 2015-01-02 22:57:08 +01:00
Clifford Wolf 1dca7ae486 Fixes and improvements in bram test 2015-01-02 18:54:22 +01:00
Clifford Wolf 03b3c02540 Progress in bram testbench 2015-01-02 17:50:15 +01:00
Clifford Wolf 1bd67d792e Define YOSYS and SYNTHESIS in preproc 2015-01-02 17:11:54 +01:00
Clifford Wolf 474831643c New $mem simlib model 2015-01-02 17:11:31 +01:00
Clifford Wolf bbf89c4dc6 Progress in memory_bram 2015-01-02 13:59:47 +01:00
Clifford Wolf 36c20f2ede Progress in memory_bram 2015-01-02 00:07:44 +01:00
Clifford Wolf 24ae156a74 Progress in bram testbench 2015-01-01 20:58:33 +01:00
Clifford Wolf 340e769667 Bram testbench (incomplete) 2015-01-01 17:01:17 +01:00
Clifford Wolf f29f4e7c83 Progress in memory_bram 2015-01-01 15:32:37 +01:00
Clifford Wolf eefe78be09 Fixed memory->start_offset handling 2015-01-01 12:56:01 +01:00
Clifford Wolf 17c1c55473 Progress in memory_bram 2015-01-01 12:17:19 +01:00