Eddie Hung
bc380b0b56
Merge pull request #1999 from YosysHQ/eddie/verific_enum_again
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verific: recover wiretype/enum attr as part of import_attributes()
2020-04-30 09:07:02 -07:00
whitequark
33c9c04561
Merge pull request #2008 from whitequark/editorconfig-abc
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Fix .editorconfig to not break abc
2020-04-30 15:53:27 +00:00
Eddie Hung
5017ff4a97
verific: ignore anonymous enums
2020-04-30 07:48:47 -07:00
whitequark
adeed6f730
Fix .editorconfig to not break abc.
2020-04-30 02:22:37 +00:00
Eddie Hung
97bfe65d3a
verific: support VHDL enums too
2020-04-27 15:17:13 -07:00
Eddie Hung
a66200ed1d
Merge pull request #1946 from YosysHQ/eddie/yosyshq_abc
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abc: use YosysHQ/abc instead of upstream berkeley-abc/abc
2020-04-27 13:48:50 -07:00
Eddie Hung
c34d57de2e
Update CHANGELOG and manual for departure from upstream
2020-04-27 12:08:45 -07:00
Eddie Hung
a3fa9fd6e9
abc: use YosysHQ/abc instead of upstream berkeley-abc/abc
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Enabling modifications
2020-04-27 12:03:40 -07:00
Eddie Hung
eabc00de8b
Merge pull request #1992 from YosysHQ/eddie/bugpoint_help
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bugpoint: improve help text
2020-04-27 11:12:17 -07:00
Eddie Hung
dd5f206d9e
verific: recover wiretype/enum attr as part of import_attributes()
2020-04-27 08:43:54 -07:00
whitequark
868b6b1b0d
Merge pull request #2002 from YosysHQ/dave/cxxrtl-width
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cxxrtl: Round up constant width
2020-04-25 18:30:53 +00:00
David Shah
1b93dda037
cxxrtl: Round up constant width
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Signed-off-by: David Shah <dave@ds0.me>
2020-04-25 10:42:21 +01:00
whitequark
9b26a1fa89
README: explain how to do out-of-tree builds.
2020-04-24 23:27:43 +00:00
whitequark
f1087b2552
Fix out-of-tree builds configured as `SMALL := 1`.
2020-04-24 23:27:43 +00:00
whitequark
26cda3c247
gowin,ecp5: remove generated files in `make clean`.
2020-04-24 23:26:39 +00:00
whitequark
bbf343589b
Merge pull request #1998 from whitequark/cxxrtl-fixes
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cxxrtl: fix attribute syntax, minor fixes
2020-04-24 22:44:35 +00:00
Eddie Hung
56dd036b97
bugpoint: improve messaging
2020-04-24 13:41:19 -07:00
Eddie Hung
e602184856
bugpoint: (* keep *) to (* bugpoint_keep *); also apply to modules/cells
2020-04-24 13:26:04 -07:00
Eddie Hung
b52eccef3a
Revert "verific: import enum attributes from verific"
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This reverts commit 5028e17f7d
.
2020-04-24 11:57:55 -07:00
whitequark
a0e658d412
cxxrtl: use `cxxrtl_` prefix rather than `cxxrtl.`
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The former prefix does not need to be escaped in Verilog, unlike
the latter, and the Yosys convention is to use the former.
2020-04-24 18:35:53 +00:00
Eddie Hung
4bfe6ebea9
bugpoint: skip ports with (* keep *) on; add header
2020-04-24 11:17:09 -07:00
Claire Wolf
3eb24809a1
Merge pull request #1995 from YosysHQ/eddie/fix_verific_wiretype
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verific: do not assert if wire not found; warn instead
2020-04-24 14:09:47 +02:00
Dan Ravensloft
4ca5f9799b
intel_alm: cleanup duplication
2020-04-24 11:26:48 +02:00
whitequark
f88378ae61
cxxrtl: improve printing of narrow memories.
2020-04-24 05:50:36 +00:00
whitequark
3738391bdd
cxxrtl: fix handling of parametric modules with large parameters.
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These have a `$paramod$` prefix, not `$paramod\\`.
2020-04-24 05:44:39 +00:00
Eddie Hung
d3555c667c
verific: do not assert if wire not found; warn instead
2020-04-23 16:28:11 -07:00
Eddie Hung
bf021a0e1f
bugpoint: improve help text
2020-04-23 12:16:55 -07:00
Eddie Hung
b048afc3a6
Merge pull request #1974 from YosysHQ/eddie/abc9_disable_mfs
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abc9: tolerate &mfs failure by writing output file before calling it (and using that if it fails)
2020-04-23 06:43:30 -07:00
Claire Wolf
dc9a72bc8d
Merge pull request #1989 from boqwxp/qbfsat_anyconst_sourcelocs
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qbfsat: Make hole name recovery from source locations more robust.
2020-04-23 11:34:19 +02:00
Claire Wolf
1797c574da
Merge pull request #1988 from boqwxp/qbfsat
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qbfsat: Add `-assume-negative-polarity` option.
2020-04-23 11:33:54 +02:00
Claire Wolf
ca31027fe1
Merge pull request #1986 from YosysHQ/eddie/verific_enum
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verific: import enum attributes from verific
2020-04-23 11:28:05 +02:00
Dan Ravensloft
3d149aff73
intel_alm: work around a Quartus ICE
2020-04-23 11:03:28 +02:00
Alberto Gonzalez
4ee8452d34
qbfsat: Make hole name recovery more robust. Allow multiple cell types to share the same source location as long as only one `$anyconst` or `$anyseq` has that location.
2020-04-23 05:45:44 +00:00
Eddie Hung
b700592881
Merge pull request #1984 from YosysHQ/eddie/getParam_exception
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kernel: Cell::getParam() to throw exception again if not found
2020-04-22 22:12:41 -07:00
Alberto Gonzalez
7369e6b26b
qbfsat: Add `-assume-negative-polarity` option.
2020-04-23 04:06:15 +00:00
Eddie Hung
51ae0f4e20
ecp5: ecp5_gsr to skip cells that don't have GSR parameter again
2020-04-22 17:53:08 -07:00
Eddie Hung
988d47af85
tests: read +/xilinx/cell_sim.v before xilinx_dsp test
2020-04-22 17:50:30 -07:00
Eddie Hung
592baebd22
xilinx: xilinx_dsp_cascade to check CREG for DSP48E1 only
2020-04-22 17:43:25 -07:00
Eddie Hung
5028e17f7d
verific: import enum attributes from verific
2020-04-22 17:26:56 -07:00
Eddie Hung
db09e96dff
test: ice40_dsp test to read +/ice40/cells_sim.v for default params
2020-04-22 16:35:35 -07:00
Eddie Hung
d2d90e4504
xilinx: improve xilinx_dffopt message
2020-04-22 16:25:23 -07:00
Eddie Hung
f582eb14af
xilinx: xilinx_dffopt to read cells_sim.v; fix test
2020-04-22 16:25:23 -07:00
Eddie Hung
86ab7d3a6e
kernel: Cell::getParam() to throw exception again if not found
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As it did before #1945
2020-04-22 16:25:23 -07:00
Eddie Hung
fa9df06c9d
Merge pull request #1949 from YosysHQ/eddie/select_blackbox
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select: do not select inside black-/white- boxes unless '=' prefix used
2020-04-22 15:35:05 -07:00
Eddie Hung
274098cce6
Merge pull request #1983 from YosysHQ/eddie/use_default_param
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Cleanup use of hard-coded default parameters in light of #1945
2020-04-22 14:37:27 -07:00
whitequark
cf14e186eb
Merge pull request #1982 from AsuMagic/asu/cxxrtl-memory-queue-opt
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cxxrtl: keep the memory write queue sorted on insertion.
2020-04-22 20:29:08 +00:00
Claire Wolf
beb9e4b299
Update passes/cmds/select.cc
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Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
2020-04-22 21:31:32 +02:00
Eddie Hung
bf22cda912
Merge pull request #1969 from boqwxp/pool_emplace
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kernel: Add `pool` support for rvalue references and C++11 move semantics.
2020-04-22 12:10:42 -07:00
Eddie Hung
7f33a0294b
Cleanup use of hard-coded default parameters in light of #1945
2020-04-22 12:02:30 -07:00
Asu
dc77563a6a
cxxrtl: keep the memory write queue sorted on insertion.
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Strategically inserting the pending memory write in memory::update to keep the
queue sorted allows us to skip the queue sort in memory::commit.
The Minerva SRAM SoC runs ~7% faster as a result.
2020-04-22 20:53:12 +02:00