Marcelina Kościelnicka
522788f016
techmap: Add support for [] wildcards in techmap_celltype.
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Fixes #1826 .
2020-08-02 22:46:48 +02:00
Zachary Snow
c3e95eb1ab
Fix generate scoping issues
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- expand_genblock defers prefixing of items within named sub-blocks
- Allow partially-qualified references to local scopes
- Handle shadowing within generate blocks
- Resolve generate scope references within tasks and functions
- Apply generate scoping to genvars
- Resolves #2214 , resolves #1456
2020-07-31 20:32:47 -06:00
Claire Wolf
c39ebe6ae0
Bump YOSYS_VER
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Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-07-31 20:57:41 +02:00
Marcelina Kościelnicka
18ad56ef41
Add dffunmap pass.
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To be used with backends that cannot deal with fancy FF types (like blif
or smt).
2020-07-31 00:59:51 +02:00
Marcelina Kościelnicka
6cd135a5eb
opt_expr: Remove -clkinv option, make it the default.
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Adds -noclkinv option just in case the old behavior was actually useful
to someone.
2020-07-31 00:08:15 +02:00
Marcelina Kościelnicka
cf60699884
synth_ice40: Use opt_dff.
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The main part is converting ice40_dsp to recognize the new FF types
created in opt_dff instead of trying to recognize the mux patterns on
its own.
The fsm call has been moved upwards because the passes cannot deal with
$dffe/$sdff*, and other optimizations don't help it much anyway.
2020-07-30 22:26:20 +02:00
Marcelina Kościelnicka
8501342fc5
synth_xilinx: Use opt_dff.
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The main part is converting xilinx_dsp to recognize the new FF types
created in opt_dff instead of trying to recognize the patterns on its
own.
The fsm call has been moved upwards because the passes cannot deal with
$dffe/$sdff*, and other optimizations don't help it much anyway.
2020-07-30 22:26:09 +02:00
Marcelina Kościelnicka
4a05cad7f8
async2sync: Support all FF types.
2020-07-30 20:22:03 +02:00
Marcelina Kościelnicka
af6623ebb8
Add opt_dff pass.
2020-07-30 18:27:04 +02:00
Marcelina Kościelnicka
8fd43515c5
verilog_backend: Add handling for all FF types.
2020-07-30 18:22:36 +02:00
Miodrag Milanović
2f50c5af48
Merge pull request #2314 from YosysHQ/verifix_errorfix
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Verific - prevent exit yosys due to stored error
2020-07-29 15:41:26 +02:00
Miodrag Milanovic
cc02d58194
Clear last error message
2020-07-29 15:28:33 +02:00
Marcelina Kościelnicka
dc18bf1969
opt_expr: Fix handling of $_XNOR_ cells with A = B.
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Fixes #2311 .
2020-07-29 12:41:43 +02:00
Marcelina Kościelnicka
773b056ffb
ffinit: Fortify the code a bit.
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This fixes handling of messy cases involving repeatedly setting and
removing the same init bit.
2020-07-28 17:21:15 +02:00
clairexen
45e96d5d87
Merge pull request #2301 from zachjs/for-loop-errors
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Clearer for loop error messages
2020-07-28 14:07:26 +02:00
clairexen
66afed6f55
Merge pull request #2306 from YosysHQ/mwk/equiv_induct-undef
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equiv_induct: Fix up assumption for $equiv cells in -undef mode.
2020-07-28 12:56:22 +02:00
Marcelina Kościelnicka
a1a0abf52a
equiv_induct: Fix up assumption for $equiv cells in -undef mode.
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Before this fix, equiv_induct only assumed that one of the following is
true:
- defined value of A is equal to defined value of B
- A is undefined
This lets through valuations where A is defined, B is undefined, and
the defined (meaningless) value of B happens to match the defined value
of A. Instead, tighten this up to OR of the following:
- defined value of A is equal to defined value of B, and B is not
undefined
- A is undefined
2020-07-27 18:36:13 +02:00
Dan Ravensloft
a2fb84fd0c
intel_alm: direct M10K instantiation
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This reverts commit a3a90f6377
.
2020-07-27 15:39:06 +02:00
Dan Ravensloft
62311b7ec0
intel_alm: increase abc9 -W
2020-07-26 23:56:54 +02:00
clairexen
9bcde4d82b
Merge pull request #2299 from zachjs/arg-loop
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Avoid generating wires for function args which are constant
2020-07-26 21:34:55 +02:00
Zachary Snow
58da181af9
Clearer for loop error messages
2020-07-25 10:37:16 -06:00
Zachary Snow
f69daf4830
Allow blocks with declarations within constant functions
2020-07-25 10:16:12 -06:00
Zachary Snow
59c4ad8ed3
Avoid generating wires for function args which are constant
2020-07-24 21:18:24 -06:00
Marcelina Kościelnicka
bd959d5d9e
async2sync: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
c9251eb26b
memory_dff: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
557f81cb49
proc_dlatch: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
31d6107521
pmux2shift: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
4d9105ccb0
wreduce: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
7b1a4fc1e6
techmap: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
9e72be3ae8
shregmap: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
522f367db3
abc: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
336b8c7786
dffinit: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
1c8483b7dd
zinit: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
e98382f6e2
dfflegalize: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
abe4e9e607
clk2fflogic: Support all FF types.
2020-07-24 03:19:48 +02:00
Marcelina Kościelnicka
0c6d0d4b5d
satgen: Add support for dffe, sdff, sdffe, sdffce cells.
2020-07-24 03:19:21 +02:00
Marcelina Kościelnicka
dafe04d559
Add utility module for representing flip-flops.
2020-07-23 23:39:46 +02:00
Marcelina Kościelnicka
eae2edf3e4
memory_dff: recognize more dff cells
2020-07-23 20:55:28 +02:00
Marcelina Kościelnicka
022af4f0ca
Add utility module for dealing with init attributes.
2020-07-23 20:49:48 +02:00
clairexen
c0ad522cf6
Merge pull request #2285 from YosysHQ/mwk/techmap-cellname
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techmap: Add _TECHMAP_CELLNAME_ special parameter.
2020-07-23 18:39:42 +02:00
clairexen
02583ad504
Merge pull request #2294 from Ravenslofty/intel_alm_timings
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intel_alm: add additional ABC9 timings
2020-07-23 18:21:20 +02:00
Dan Ravensloft
4d9d90079c
intel_alm: add additional ABC9 timings
2020-07-23 11:57:07 +01:00
Keith Rothman
819f1d8c20
Remove EXPLICIT_CARRY logic.
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The symbiflow-arch-defs tool chain no longer needs the EXPLICIT_CARRY
within yosys itself.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2020-07-23 00:56:09 +02:00
Marcelina Kościelnicka
dc07ae9677
techmap: Add _TECHMAP_CELLNAME_ special parameter.
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This parameter will resolve to the name of the cell being mapped. The
first user of this parameter will be synth_intel_alm's Quartus output,
which requires a unique (and preferably descriptive) name passed as
a cell parameter for the memory cells.
2020-07-21 15:00:54 +02:00
clairexen
57af8499df
Merge pull request #2215 from boqwxp/qbfsat-solver-options
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qbfsat, smt2, smtio: Add `-solver-option` to allow specifying SMT-LIBv2 `(set-option ...)` commands
2020-07-21 14:43:33 +02:00
Alberto Gonzalez
42fb75c570
smtio: Emit `mode: start` options before `set-logic` command and any other options after it.
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Refer to the SMT-LIB specification, section 4.1.7. According to the spec, some options can only be specified in `start` mode. Once the solver sees `set-logic`, it moves to `assert` mode.
2020-07-20 22:09:44 +00:00
Alberto Gonzalez
654864658f
smtio: Add support for parsing `yosys-smt2-solver-option` info statements.
2020-07-20 21:54:56 +00:00
Alberto Gonzalez
2f786fcfac
qbfsat: Add `-solver-option` option.
2020-07-20 21:54:56 +00:00
Alberto Gonzalez
f037985337
smt2: Add `-solver-option` option.
2020-07-20 21:54:56 +00:00
clairexen
856d40973d
Merge pull request #2282 from YosysHQ/claire/satunsat
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Only allow "sat" and "unsat" smt solver responses in yosys-smtbmc
2020-07-20 23:06:36 +02:00