riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
14,425 Commits 92 Branches 49 Tags 38 MiB
Commit Graph

14425 Commits

Author SHA1 Message Date
Mohamed Gaber ab4ea84679
wheels: more compatibility 
* Update manylinux images
* FFI now built as a per-platform static library
* Explicitly set minimum macOS deployment target, use clang on macOS
* Try enabling Windows (as an experiment)
* Disable aarch64-linux, aarch64-windows
 2024-10-07 16:39:54 +03:00
Mohamed Gaber 407343a7a1
Pyosys Wheels 
* Created `setup.py`: Python package manifest to build `pyosys` wheels with a custom extension to build and include `libyosys.so` using Make
* `.gitignore`: Added byproducts of the Python wheel build process
* `Makefile`: Added `-undefined dynamic_lookup` to `libyosys.so` so missing symbols can be resolved by importing into a Python interpreter
* `kernel/yosys.cc`: Gated `PyImport_AppendInittab` with `!Py_IsInitialized`; as of Python 3.12, the interpreter is already initialized and `PyImport_AppendInittab` would cause an exception to be raised
* Created `wheels.yml`: CI workflow for building wheels for CPython on:
  * Linux (glibc, musl) and Darwin
  * x86-64 and arm64
 2024-10-07 16:39:54 +03:00
Martin Povišer ca5c2fdff1 quicklogic: Relax the LUT number test 2024-10-07 15:27:03 +02:00
Martin Povišer b01b17689e Add test of error not getting silenced 2024-10-07 14:49:17 +02:00
Martin Povišer 7989d53c58 read_xaiger2: Add help 2024-10-07 14:19:49 +02:00
Martin Povišer f44a418212 read_xaiger2: Add casts to silence warnings 2024-10-07 12:27:54 +02:00
Martin Povišer 72f0fea9e8 aiger2: Try to fix VS build 2024-10-07 12:27:37 +02:00
Martin Povišer d0a11e26f3 aiger2: Add test of writing a flattened view 2024-10-07 12:04:33 +02:00
Martin Povišer 47fd2b9deb aiger2: Update help 2024-10-07 12:03:49 +02:00
Martin Povišer 373e7a1485 aiger2: Fix print 2024-10-07 12:03:49 +02:00
Martin Povišer ebe51e206e aiger2: Fix warnings 2024-10-07 12:03:49 +02:00
Martin Povišer 2e587c835f abc9_exe: Document SC mapping options 2024-10-07 12:03:49 +02:00
Martin Povišer 3b6dcc7bd0 abc9_exe: Remove `-genlib` option 2024-10-07 12:03:49 +02:00
Martin Povišer ac79a052ba aiger2: Adjust help 2024-10-07 12:03:49 +02:00
Martin Povišer 81688e3ba2 aigsize: Remove 2024-10-07 12:03:49 +02:00
Martin Povišer e0a86d5483 abc_new: Start new command for aiger2-based round trip 2024-10-07 12:03:49 +02:00
Martin Povišer b8f389370b aiger2: Convert x-states to zeroes 2024-10-07 12:03:48 +02:00
Martin Povišer 4c0a8a1326 aiger2: Add analysis step to order boxes 2024-10-07 12:03:48 +02:00
Martin Povišer f7c7371ea9 aiger2: Fix relative ordering of PI/POs and box I/Os 2024-10-07 12:03:48 +02:00
Martin Povišer 8d12492610 read_xaiger2: Fix detecting the end of extensions 2024-10-07 12:03:48 +02:00
Martin Povišer 2b1b5652f1 Adjust `read_xaiger2` prints 2024-10-07 12:03:48 +02:00
Martin Povišer e58a9b6ab6 abc9: Understand ASIC options similar to `abc` 2024-10-07 12:03:48 +02:00
Martin Povišer d4e009fc2f aiger2: Add TODO 2024-10-07 12:03:48 +02:00
KrystalDelusion f72d0219d1
Update test-build.yml 
Call make docs from root
 2024-10-07 22:52:33 +13:00
Krystine Sherwin 33930e44ac
ci: Test build docs 2024-10-07 22:22:10 +13:00
Krystine Sherwin edf29e725e
Docs: Add functional_ir to index 2024-10-07 22:20:22 +13:00
Emil J. Tywoniak 3e6e8c892e Bump abc submodule 2024-10-07 11:09:02 +02:00
Emil J 1f517d6c7d
Merge pull request #4553 from donn/python_scriptfile 
-y flag for libyosys Python scripts
 2024-10-07 11:02:40 +02:00
Krystine Sherwin 13d7b5fd6a
Docs: Ignore example outputs 2024-10-07 22:01:56 +13:00
Krystine Sherwin 0b1b94d85e
Docs: Clean example outputs 2024-10-07 22:00:28 +13:00
Krystine Sherwin 468a019c30
docs: Makefile tidying 
examples and dots are now orthogonal.
 2024-10-07 21:56:23 +13:00
Krystine Sherwin 2e1181a092
ci: Run make docs on PRs 2024-10-07 21:25:15 +13:00
github-actions[bot] 6155c59d00 Bump version 2024-10-07 00:21:37 +00:00
KrystalDelusion 3534e6b52d
Merge pull request #4632 from tarikgraba/main 
docs: avoid concurrency issues when generating images in parallel
 2024-10-07 10:33:02 +13:00
Krystine Sherwin 571d181fb4
Fix top-level make docs prerequisites 
Add `$(TARGETS)` for gen_examples and gen_images since they need the `yosys` executable.
Add guidelines source files as a prerequisite to docs/source/generated while we're at it.
 2024-10-07 10:26:29 +13:00
Krystine Sherwin d8038c11d1
Add -j flag to make docs CI 2024-10-07 10:07:17 +13:00
TG 5841b44543 docs: Simplify images generation to allow parallel build 
- remove the tidy target from the main target.
  * aux/log file are already excluded in a .gititgnore file
  * allow parallel generation as the tidy target imposes sequential build
 2024-10-06 08:38:16 +02:00
Lofty 13ecbd5c76 quicklogic: test that dividing by a constant does not infer carry chains 2024-10-03 20:05:28 +01:00
Roland Coeurjoly 5ea2c6e6e5 Assume x values for missing signal data in FST 
Co-authored-by: Miodrag Milanovic <mmicko@gmail.com>
Co-authored-by: Roland Coeurjoly <rolandcoeurjoly@gmail.com>
 2024-10-02 12:08:48 +02:00
Martin Povišer ec42b42bd9 cellmatch: Size the `lut` attribute 2024-10-02 11:29:54 +02:00
Emil J. Tywoniak 997cb30f1f cxxrtl: test stream operator 2024-10-01 13:25:07 +02:00
Roland Coeurjoly 76c615b2ae Fix: handle VCD variable references with and without whitespace 
Co-authored-by: Miodrag Milanović <mmicko@gmail.com>
Co-authored-by: Roland Coeurjoly <rolandcoeurjoly@gmail.com>
 2024-10-01 11:51:20 +02:00
github-actions[bot] 1bf908dea8 Bump version 2024-10-01 00:23:05 +00:00
Miodrag Milanović 500db6acc6
Merge pull request #4621 from RCoeurjoly/roland/get_vcd2fst 
Add "Get vcd2fst" step to test-yosys job
 2024-09-30 21:38:39 +02:00
Mohamed Gaber 35c8ad61ac
cli/python: error-checking, python interpreter bugfix 
* Less brittle method of adding script dirname to sys.path
* Check if scriptfp successfully opens before using it
* Move `log_error` to after `PyErr_Print()` is called
 2024-09-30 17:38:43 +03:00
Roland Coeurjoly 5fca9b867d Add Get vcd2fst step to test-yosys job 
Co-authored-by: Miodrag Milanovic <mmicko@gmail.com>
Co-authored-by: Roland Coeurjoly <rolandcoeurjoly@gmail.com>
 2024-09-30 16:25:32 +02:00
github-actions[bot] 59404f8ce5 Bump version 2024-09-30 00:21:26 +00:00
rherveille ce7db661a8
Added cast to type support (#4284) 2024-09-29 17:03:01 -04:00
George Rennie 0572f8806f opt_reduce: add test for constant $reduce_and/or not being zero width 2024-09-25 16:28:41 +01:00
George Rennie 023f029dcf opt_reduce: keep at least one input to $reduce_or/and cells 2024-09-25 16:21:19 +01:00