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quicklogic: Relax the LUT number test

This commit is contained in:
Martin Povišer 2024-10-07 15:26:48 +02:00
parent 13ecbd5c76
commit ca5c2fdff1
1 changed files with 1 additions and 1 deletions
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2
tests/arch/quicklogic/qlf_k6n10f/div.ys
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@ -10,5 +10,5 @@ EOF
equiv_opt -assert -map +/quicklogic/qlf_k6n10f/cells_sim.v synth_quicklogic -family qlf_k6n10f
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd top # Constrain all select calls below inside the top module
select -assert-count 26 t:$lut
select -assert-max 100 t:$lut
select -assert-none t:$lut %% t:* %D