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1055 Commits

Author SHA1 Message Date
Alberto Gonzalez 5cb4ae4666
Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and `outbit_to_cell`. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez c43017fc08
Replace `std::map` with `dict` for `TechmapWires` type. 2020-05-14 20:06:54 +00:00
Alberto Gonzalez 644e55b3d3
Replace `std::map` with `dict` for `celltypeMap`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 67f4046c05
Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 64c16f8c13
Replace `std::map` with `dict` for `positional_ports`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 2fb4931e5b
Add specialized `hash()` for type `dict` and use a `dict` instead of a `std::map` for `techmap_cache` and `techmap_do_cache`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 437f3fb342
Replace `std::map` with `dict` for `simplemap_mappers`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 99b586b283
Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`. 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 5f7f213c7f
Replace `std::string` and `RTLIL::IdString` with `IdString` in `passes/techmap/techmap.cc`. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-05-14 20:06:53 +00:00
Alberto Gonzalez e49fdee404
Do not modify design modules while iterating over `modules()`. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-05-14 20:06:53 +00:00
Alberto Gonzalez 985a29ff3b
Clean up pseudo-private member usage, superfluous `std::vector` instantiation, and `RTLIL::id2cstr()` usage in `passes/techmap/techmap.cc`. 2020-05-14 20:06:53 +00:00
Eddie Hung da7da44919 abc9_ops: -reintegrate to be sensitive to start_offset too 2020-05-02 11:19:04 -07:00
whitequark b43c282e4e Add WASI platform support. 
This includes the following significant changes:
  * Patching ezsat and minisat to disable resource limiting code
    on WASM/WASI, since the POSIX functions they use are unavailable.
  * Adding a new definition, YOSYS_DISABLE_SPAWN, present if platform
    does not support spawning subprocesses (i.e. Emscripten or WASI).
    This definition hides the definition of `run_command()`.
  * Adding a new Makefile flag, DISABLE_SPAWN, present in the same
    condition. This flag disables all passes that require spawning
    subprocesses for their function.
 2020-04-30 18:56:25 +00:00
Eddie Hung b048afc3a6
Merge pull request #1974 from YosysHQ/eddie/abc9_disable_mfs 
abc9: tolerate &mfs failure by writing output file before calling it (and using that if it fails)
 2020-04-23 06:43:30 -07:00
Eddie Hung 3d7b983351 abc9: tolerate ABC nonzero exit code if output.aig; write before &mfs 
Re-enable mfs for xilinx/ecp5 speculatively -- if it fails, use pre-mfs
result
 2020-04-20 11:26:11 -07:00
Eddie Hung a998a4155d xilinx/ecp5: disable abc9's "&mfs" optimisation 
Can sometimes fire an assertion, e.g. #1962
 2020-04-20 10:30:10 -07:00
Eddie Hung 8c992ca47f abc9: -prep_lut to be more robust 2020-04-20 09:39:35 -07:00
whitequark 69743aad42
Merge pull request #1864 from boqwxp/cleanup_techmap_abc 
Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`
 2020-04-17 02:25:18 +00:00
Eddie Hung 33b0ac9269
Merge pull request #1933 from YosysHQ/eddie/zinit_more 
zinit: handle $__DFFS?E?_[NP][NP][01] too
 2020-04-15 08:36:25 -07:00
Marcelina Kościelnicka 38a0c30d65 Get rid of dffsr2dff. 
This pass is a proper subset of opt_rmdff, which is called by opt, which
is called by every synth flow in the coarse part.  Thus, it never
actually does anything and can be safely removed.
 2020-04-15 16:22:37 +02:00
Marcelina Kościelnicka 4c52691a58 abc9_ops: Add a check ensuring that connected port actually exists. 2020-04-15 08:11:15 +02:00
Eddie Hung a8ab74285b zinit: handle $__DFFS?E?_[NP][NP][01] too 2020-04-14 13:08:23 -07:00
Marcelina Kościelnicka 7a36728b2f dffinit: Avoid setting init parameter to zero-length value. 
Fixes #1704.
 2020-04-14 19:52:19 +02:00
Eddie Hung 3a27906ac6 abc9_exe: verify -> &verify -s 2020-04-14 08:21:26 -07:00
Eddie Hung 843201ec96 techmap: fix error message 2020-04-14 08:17:02 -07:00
Alberto Gonzalez 4ccaf048a5
Simplify `passes/techmap/abc.cc` and remove superfluous `RTLIL::SigSpec` constructions. 
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
 2020-04-14 02:39:44 +00:00
Eddie Hung b75c5bf743 zinit: resolve one more comment by @mwkmwkmwk 2020-04-13 15:25:37 -07:00
Eddie Hung c6afce7638 zinit: fix review comments from @mwkmwkmwk 2020-04-13 15:16:51 -07:00
Eddie Hung 70bca35f9c zinit: operate on $adff, erase (* init *) entries on consumption 2020-04-13 14:28:53 -07:00
Eddie Hung 1cdfdbc6d1 Fix S/R comment; thanks @mwkmwkmwk 2020-04-13 13:45:18 -07:00
Eddie Hung 4617aa8ccd zinit to transform set/reset value of $_DFF_[NP][NP][01]_ 2020-04-13 13:45:18 -07:00
Eddie Hung b97a9cd3f3 Supress error for unhandled \init if whole module selected 2020-04-13 13:16:49 -07:00
Miodrag Milanovic 0d789c5a3b Support custom PROGRAM_PREFIX 2020-04-10 10:38:40 +02:00
Alberto Gonzalez 83222193af
Clean up `passes/techmap/hilomap.cc`. 2020-04-09 05:28:32 +00:00
whitequark 79c6149069
Merge pull request #1865 from boqwxp/cleanup_dfflibmap 
Clean up `passes/techmap/dfflibmap.cc`.
 2020-04-06 10:56:22 +00:00
Alberto Gonzalez f3e282a97c
Clean up `passes/techmap/dfflibmap.cc`. 2020-04-06 03:02:40 +00:00
Alberto Gonzalez 9168701881
Clean up pseudo-private member usage and simplify `passes/techmap/abc.cc`. 2020-04-05 21:31:18 +00:00
Alberto Gonzalez 64a32ead38
Clean up `passes/techmap/extract.cc`. 2020-04-05 19:36:23 +00:00
Eddie Hung 5f662b1c43
Merge pull request #1767 from YosysHQ/eddie/idstrings 
IdString: use more ID::*, make them easier to use, speed up IdString::in()
 2020-04-02 11:47:25 -07:00
Eddie Hung 956ecd48f7 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
Marcin Kościelnicki 2d3753d730 iopadmap: Fix z assignment to inout port 
Fixes #1841.
 2020-04-02 18:15:04 +02:00
Claire Wolf 22ef5701c0
Merge pull request #1842 from YosysHQ/mwk/fix-deminout-xz 
deminout: prevent any constant assignment from demoting to input
 2020-04-02 18:14:34 +02:00
Eddie Hung fdafb74eb7 kernel: use more ID::* 2020-04-02 07:14:08 -07:00
Eddie Hung 37f42fe102
Merge pull request #1845 from YosysHQ/eddie/kernel_speedup 
kernel: speedup by using more pass-by-const-ref
 2020-04-02 07:13:33 -07:00
Marcin Kościelnicki f68985f997 deminout: prevent any constant assignment from demoting to input 
Before this patch,

```
module top(inout io);
assign io = 1'bx;
endmodule
```

would have the `io` pin demoted to input (same happens for `1'bz`,
but not for `1'b0` or `1'b1`), resulting in check failures later on.

Part of fix for #1841.
 2020-03-30 15:04:31 +02:00
Claire Wolf 590d8eccb7
Merge pull request #1806 from YosysHQ/mwk/techmap-replace-fix 
techmap: Fix cell names with _TECHMAP_REPLACE_.*
 2020-03-26 19:03:37 +01:00
Marcin Kościelnicki c2bf11e42a techmap: Fix cell names with _TECHMAP_REPLACE_.* 
Fixes #1804.
 2020-03-23 11:17:07 +01:00
R. Ou c34969d3f1 iopadmap: Attempt to give new wires/cells meaningful names 2020-03-22 23:01:09 +01:00
Eddie Hung 432a09af80 kernel: SigSpec use more const& + overloads to prevent implicit SigSpec 2020-03-13 08:17:39 -07:00
Eddie Hung dd8ebf7873
Merge pull request #1743 from YosysHQ/eddie/abc9_keep 
abc9: improve (* keep *) handling
 2020-03-11 06:32:15 -07:00