2015-10-13 10:17:23 -05:00
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#!/usr/bin/env python3
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2015-10-13 18:31:54 -05:00
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#
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# yosys -- Yosys Open SYnthesis Suite
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#
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# Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
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#
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# Permission to use, copy, modify, and/or distribute this software for any
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# purpose with or without fee is hereby granted, provided that the above
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# copyright notice and this permission notice appear in all copies.
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#
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# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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#
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2015-10-13 10:17:23 -05:00
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import os, sys, getopt, re
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2015-10-13 18:31:54 -05:00
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##yosys-sys-path##
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2016-09-02 05:01:31 -05:00
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from smtio import SmtIo, SmtOpts, MkVcd
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from collections import defaultdict
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got_topt = False
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skip_steps = 0
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step_size = 1
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num_steps = 20
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append_steps = 0
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vcdfile = None
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cexfile = None
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aimfile = None
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aiwfile = None
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aigheader = True
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btorwitfile = None
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vlogtbfile = None
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vlogtbtop = None
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inconstr = list()
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outconstr = None
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gentrace = False
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covermode = False
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tempind = False
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dumpall = False
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assume_skipped = None
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final_only = False
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topmod = None
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noinfo = False
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presat = False
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smtcinit = False
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smtctop = None
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noinit = False
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so = SmtOpts()
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def usage():
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print("""
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yosys-smtbmc [options] <yosys_smt2_output>
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-t <num_steps>
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-t <skip_steps>:<num_steps>
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-t <skip_steps>:<step_size>:<num_steps>
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default: skip_steps=0, step_size=1, num_steps=20
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2016-08-20 09:32:50 -05:00
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-g
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generate an arbitrary trace that satisfies
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all assertions and assumptions.
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-i
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instead of BMC run temporal induction
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-c
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instead of regular BMC run cover analysis
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-m <module_name>
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name of the top module
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--smtc <constr_filename>
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read constraints file
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--cex <cex_filename>
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read cex file as written by ABC's "write_cex -n"
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--aig <prefix>
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read AIGER map file (as written by Yosys' "write_aiger -map")
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and AIGER witness file. The file names are <prefix>.aim for
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the map file and <prefix>.aiw for the witness file.
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--aig <aim_filename>:<aiw_filename>
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like above, but for map files and witness files that do not
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share a filename prefix (or use different file extensions).
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--aig-noheader
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the AIGER witness file does not include the status and
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properties lines.
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2018-12-09 20:43:07 -06:00
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--btorwit <btor_witness_filename>
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read a BTOR witness.
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2016-09-19 13:43:28 -05:00
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--noinfo
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only run the core proof, do not collect and print any
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additional information (e.g. which assert failed)
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2017-07-06 19:47:30 -05:00
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--presat
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check if the design with assumptions but without assertions
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is SAT before checking if assertions are UNSAT. This will
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detect if there are contradicting assumptions. In some cases
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this will also help to "warm up" the solver, potentially
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yielding a speedup.
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--final-only
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only check final constraints, assume base case
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--assume-skipped <start_step>
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assume asserts in skipped steps in BMC.
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no assumptions are created for skipped steps
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before <start_step>.
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2016-08-20 09:07:59 -05:00
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--dump-vcd <vcd_filename>
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write trace to this VCD file
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(hint: use 'write_smt2 -wires' for maximum
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coverage of signals in generated VCD file)
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--dump-vlogtb <verilog_filename>
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write trace as Verilog test bench
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2017-07-01 11:19:23 -05:00
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--vlogtb-top <hierarchical_name>
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use the given entity as top module for the generated
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Verilog test bench. The <hierarchical_name> is relative
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to the design top module without the top module name.
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2016-08-24 15:09:50 -05:00
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--dump-smtc <constr_filename>
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write trace as constraints file
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2016-08-29 15:41:45 -05:00
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2017-08-04 10:09:08 -05:00
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--smtc-init
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write just the last state as initial constraint to smtc file
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--smtc-top <old>[:<new>]
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replace <old> with <new> in constraints dumped to smtc
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file and only dump object below <old> in design hierarchy.
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--noinit
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do not assume initial conditions in state 0
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2016-08-29 15:41:45 -05:00
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--dump-all
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when using -g or -i, create a dump file for each
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step. The character '%' is replaces in all dump
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filenames with the step number.
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--append <num_steps>
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add <num_steps> time steps at the end of the trace
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when creating a counter example (this additional time
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steps will still be constrained by assumptions)
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""" + so.helpmsg())
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sys.exit(1)
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2015-10-13 17:18:38 -05:00
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2015-10-13 10:17:23 -05:00
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try:
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opts, args = getopt.getopt(sys.argv[1:], so.shortopts + "t:igcm:", so.longopts +
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["final-only", "assume-skipped=", "smtc=", "cex=", "aig=", "aig-noheader", "btorwit=", "presat",
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"dump-vcd=", "dump-vlogtb=", "vlogtb-top=", "dump-smtc=", "dump-all", "noinfo", "append=",
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"smtc-init", "smtc-top=", "noinit"])
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except:
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usage()
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for o, a in opts:
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if o == "-t":
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got_topt = True
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a = a.split(":")
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if len(a) == 1:
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num_steps = int(a[0])
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elif len(a) == 2:
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skip_steps = int(a[0])
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num_steps = int(a[1])
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elif len(a) == 3:
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skip_steps = int(a[0])
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step_size = int(a[1])
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num_steps = int(a[2])
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else:
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assert False
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elif o == "--assume-skipped":
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assume_skipped = int(a)
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elif o == "--final-only":
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final_only = True
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elif o == "--smtc":
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inconstr.append(a)
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elif o == "--cex":
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cexfile = a
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elif o == "--aig":
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if ":" in a:
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aimfile, aiwfile = a.split(":")
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else:
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aimfile = a + ".aim"
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aiwfile = a + ".aiw"
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elif o == "--aig-noheader":
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aigheader = False
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elif o == "--btorwit":
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btorwitfile = a
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elif o == "--dump-vcd":
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vcdfile = a
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2016-08-20 11:43:39 -05:00
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elif o == "--dump-vlogtb":
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vlogtbfile = a
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2017-07-01 11:19:23 -05:00
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elif o == "--vlogtb-top":
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vlogtbtop = a
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elif o == "--dump-smtc":
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outconstr = a
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elif o == "--smtc-init":
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smtcinit = True
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elif o == "--smtc-top":
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smtctop = a.split(":")
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if len(smtctop) == 1:
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smtctop.append("")
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assert len(smtctop) == 2
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smtctop = tuple(smtctop)
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elif o == "--dump-all":
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dumpall = True
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elif o == "--presat":
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presat = True
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elif o == "--noinfo":
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noinfo = True
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elif o == "--noinit":
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noinit = True
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elif o == "--append":
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append_steps = int(a)
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elif o == "-i":
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tempind = True
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elif o == "-g":
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gentrace = True
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elif o == "-c":
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covermode = True
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elif o == "-m":
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topmod = a
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elif so.handle(o, a):
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pass
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else:
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usage()
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if len(args) != 1:
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usage()
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2017-02-04 11:17:08 -06:00
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if sum([tempind, gentrace, covermode]) > 1:
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usage()
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2016-08-27 07:30:36 -05:00
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constr_final_start = None
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constr_asserts = defaultdict(list)
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constr_assumes = defaultdict(list)
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2016-09-24 13:40:22 -05:00
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constr_write = list()
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for fn in inconstr:
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current_states = None
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current_line = 0
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with open(fn, "r") as f:
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for line in f:
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current_line += 1
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2016-08-24 16:18:29 -05:00
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if line.startswith("#"):
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continue
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2016-08-22 10:27:43 -05:00
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tokens = line.split()
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if len(tokens) == 0:
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continue
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if tokens[0] == "initial":
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current_states = set()
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if not tempind:
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current_states.add(0)
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continue
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2016-08-27 07:30:36 -05:00
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if tokens[0] == "final":
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constr_final = True
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if len(tokens) == 1:
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current_states = set(["final-%d" % i for i in range(0, num_steps+1)])
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constr_final_start = 0
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elif len(tokens) == 2:
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arg = abs(int(tokens[1]))
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current_states = set(["final-%d" % i for i in range(arg, num_steps+1)])
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constr_final_start = arg if constr_final_start is None else min(constr_final_start, arg)
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else:
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assert False
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continue
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2016-08-22 10:27:43 -05:00
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if tokens[0] == "state":
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current_states = set()
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if not tempind:
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for token in tokens[1:]:
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|
|
|
tok = token.split(":")
|
|
|
|
if len(tok) == 1:
|
|
|
|
current_states.add(int(token))
|
|
|
|
elif len(tok) == 2:
|
|
|
|
lower = int(tok[0])
|
|
|
|
if tok[1] == "*":
|
|
|
|
upper = num_steps
|
|
|
|
else:
|
|
|
|
upper = int(tok[1])
|
|
|
|
for i in range(lower, upper+1):
|
|
|
|
current_states.add(i)
|
2016-08-24 16:18:29 -05:00
|
|
|
else:
|
2016-12-01 05:57:26 -06:00
|
|
|
assert False
|
2016-08-24 16:18:29 -05:00
|
|
|
continue
|
|
|
|
|
|
|
|
if tokens[0] == "always":
|
|
|
|
if len(tokens) == 1:
|
|
|
|
current_states = set(range(0, num_steps+1))
|
|
|
|
elif len(tokens) == 2:
|
2017-01-02 13:02:52 -06:00
|
|
|
arg = abs(int(tokens[1]))
|
|
|
|
current_states = set(range(arg, num_steps+1))
|
2016-08-24 16:18:29 -05:00
|
|
|
else:
|
2016-12-01 05:57:26 -06:00
|
|
|
assert False
|
2016-08-22 10:27:43 -05:00
|
|
|
continue
|
|
|
|
|
|
|
|
if tokens[0] == "assert":
|
2016-08-24 16:18:29 -05:00
|
|
|
assert current_states is not None
|
2016-08-22 10:27:43 -05:00
|
|
|
|
2016-08-24 16:18:29 -05:00
|
|
|
for state in current_states:
|
2016-08-29 06:53:12 -05:00
|
|
|
constr_asserts[state].append(("%s:%d" % (fn, current_line), " ".join(tokens[1:])))
|
2016-08-22 10:27:43 -05:00
|
|
|
|
|
|
|
continue
|
|
|
|
|
|
|
|
if tokens[0] == "assume":
|
2016-08-24 16:18:29 -05:00
|
|
|
assert current_states is not None
|
2016-08-22 10:27:43 -05:00
|
|
|
|
2016-08-24 16:18:29 -05:00
|
|
|
for state in current_states:
|
2016-08-29 06:53:12 -05:00
|
|
|
constr_assumes[state].append(("%s:%d" % (fn, current_line), " ".join(tokens[1:])))
|
2016-08-22 10:27:43 -05:00
|
|
|
|
|
|
|
continue
|
|
|
|
|
2016-09-24 13:40:22 -05:00
|
|
|
if tokens[0] == "write":
|
|
|
|
constr_write.append(" ".join(tokens[1:]))
|
|
|
|
continue
|
|
|
|
|
|
|
|
if tokens[0] == "logic":
|
|
|
|
so.logic = " ".join(tokens[1:])
|
|
|
|
continue
|
|
|
|
|
2016-12-01 05:57:26 -06:00
|
|
|
assert False
|
2016-08-22 10:27:43 -05:00
|
|
|
|
|
|
|
|
2016-08-29 06:53:12 -05:00
|
|
|
def get_constr_expr(db, state, final=False, getvalues=False):
|
2016-08-27 07:30:36 -05:00
|
|
|
if final:
|
|
|
|
if ("final-%d" % state) not in db:
|
2016-08-29 07:53:32 -05:00
|
|
|
return ([], [], []) if getvalues else "true"
|
2016-08-27 07:30:36 -05:00
|
|
|
else:
|
|
|
|
if state not in db:
|
2016-08-29 07:53:32 -05:00
|
|
|
return ([], [], []) if getvalues else "true"
|
2016-08-22 10:27:43 -05:00
|
|
|
|
2018-03-03 07:15:49 -06:00
|
|
|
netref_regex = re.compile(r'(^|[( ])\[(-?[0-9]+:|)([^\]]*|\S*)\](?=[ )]|$)')
|
2016-08-24 16:18:29 -05:00
|
|
|
|
|
|
|
def replace_netref(match):
|
|
|
|
state_sel = match.group(2)
|
|
|
|
|
|
|
|
if state_sel == "":
|
|
|
|
st = state
|
|
|
|
elif state_sel[0] == "-":
|
|
|
|
st = state + int(state_sel[:-1])
|
|
|
|
else:
|
|
|
|
st = int(state_sel[:-1])
|
|
|
|
|
|
|
|
expr = smt.net_expr(topmod, "s%d" % st, smt.get_path(topmod, match.group(3)))
|
|
|
|
|
|
|
|
return match.group(1) + expr
|
|
|
|
|
2016-08-22 10:27:43 -05:00
|
|
|
expr_list = list()
|
2016-08-29 06:53:12 -05:00
|
|
|
for loc, expr in db[("final-%d" % state) if final else state]:
|
|
|
|
actual_expr = netref_regex.sub(replace_netref, expr)
|
|
|
|
if getvalues:
|
|
|
|
expr_list.append((loc, expr, actual_expr))
|
|
|
|
else:
|
|
|
|
expr_list.append(actual_expr)
|
|
|
|
|
|
|
|
if getvalues:
|
|
|
|
loc_list, expr_list, acual_expr_list = zip(*expr_list)
|
|
|
|
value_list = smt.get_list(acual_expr_list)
|
|
|
|
return loc_list, expr_list, value_list
|
2016-08-22 10:27:43 -05:00
|
|
|
|
2016-08-22 10:45:01 -05:00
|
|
|
if len(expr_list) == 0:
|
|
|
|
return "true"
|
|
|
|
|
|
|
|
if len(expr_list) == 1:
|
|
|
|
return expr_list[0]
|
|
|
|
|
2016-08-22 10:27:43 -05:00
|
|
|
return "(and %s)" % " ".join(expr_list)
|
|
|
|
|
|
|
|
|
2016-09-02 05:01:31 -05:00
|
|
|
smt = SmtIo(opts=so)
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2016-09-24 13:40:22 -05:00
|
|
|
if noinfo and vcdfile is None and vlogtbfile is None and outconstr is None:
|
|
|
|
smt.produce_models = False
|
|
|
|
|
2016-09-05 18:40:31 -05:00
|
|
|
def print_msg(msg):
|
|
|
|
print("%s %s" % (smt.timestamp(), msg))
|
|
|
|
sys.stdout.flush()
|
|
|
|
|
|
|
|
print_msg("Solver: %s" % (so.solver))
|
2015-10-13 10:17:23 -05:00
|
|
|
|
|
|
|
with open(args[0], "r") as f:
|
|
|
|
for line in f:
|
|
|
|
smt.write(line)
|
|
|
|
|
2016-09-24 13:40:22 -05:00
|
|
|
for line in constr_write:
|
|
|
|
smt.write(line)
|
|
|
|
|
2016-07-11 04:49:05 -05:00
|
|
|
if topmod is None:
|
|
|
|
topmod = smt.topmod
|
2015-10-15 08:08:41 -05:00
|
|
|
|
2016-07-11 04:49:05 -05:00
|
|
|
assert topmod is not None
|
|
|
|
assert topmod in smt.modinfo
|
2015-10-13 17:18:38 -05:00
|
|
|
|
2016-10-17 07:57:28 -05:00
|
|
|
if cexfile is not None:
|
2016-12-03 05:37:20 -06:00
|
|
|
if not got_topt:
|
|
|
|
assume_skipped = 0
|
|
|
|
skip_steps = 0
|
|
|
|
num_steps = 0
|
|
|
|
|
2016-10-17 07:57:28 -05:00
|
|
|
with open(cexfile, "r") as f:
|
2016-10-18 03:54:53 -05:00
|
|
|
cex_regex = re.compile(r'([^\[@=]+)(\[\d+\])?([^@=]*)(@\d+)=([01])')
|
2016-10-17 07:57:28 -05:00
|
|
|
for entry in f.read().split():
|
|
|
|
match = cex_regex.match(entry)
|
|
|
|
assert match
|
|
|
|
|
2016-10-18 03:54:53 -05:00
|
|
|
name, bit, extra_name, step, val = match.group(1), match.group(2), match.group(3), match.group(4), match.group(5)
|
|
|
|
|
|
|
|
if extra_name != "":
|
|
|
|
continue
|
2016-10-17 07:57:28 -05:00
|
|
|
|
|
|
|
if name not in smt.modinfo[topmod].inputs:
|
|
|
|
continue
|
|
|
|
|
|
|
|
if bit is None:
|
|
|
|
bit = 0
|
|
|
|
else:
|
|
|
|
bit = int(bit[1:-1])
|
|
|
|
|
|
|
|
step = int(step[1:])
|
|
|
|
val = int(val)
|
|
|
|
|
|
|
|
if smt.modinfo[topmod].wsize[name] == 1:
|
|
|
|
assert bit == 0
|
|
|
|
smtexpr = "(= [%s] %s)" % (name, "true" if val else "false")
|
|
|
|
else:
|
|
|
|
smtexpr = "(= ((_ extract %d %d) [%s]) #b%d)" % (bit, bit, name, val)
|
|
|
|
|
|
|
|
# print("cex@%d: %s" % (step, smtexpr))
|
|
|
|
constr_assumes[step].append((cexfile, smtexpr))
|
2016-07-11 05:49:33 -05:00
|
|
|
|
2016-12-03 05:37:20 -06:00
|
|
|
if not got_topt:
|
|
|
|
skip_steps = max(skip_steps, step)
|
|
|
|
num_steps = max(num_steps, step+1)
|
|
|
|
|
2017-01-30 04:38:43 -06:00
|
|
|
if aimfile is not None:
|
2016-12-01 05:57:26 -06:00
|
|
|
input_map = dict()
|
|
|
|
init_map = dict()
|
|
|
|
latch_map = dict()
|
|
|
|
|
2016-12-03 05:37:20 -06:00
|
|
|
if not got_topt:
|
|
|
|
assume_skipped = 0
|
|
|
|
skip_steps = 0
|
|
|
|
num_steps = 0
|
|
|
|
|
2017-01-30 04:38:43 -06:00
|
|
|
with open(aimfile, "r") as f:
|
2016-12-01 05:57:26 -06:00
|
|
|
for entry in f.read().splitlines():
|
|
|
|
entry = entry.split()
|
|
|
|
|
|
|
|
if entry[0] == "input":
|
|
|
|
input_map[int(entry[1])] = (entry[3], int(entry[2]))
|
|
|
|
continue
|
|
|
|
|
|
|
|
if entry[0] == "init":
|
|
|
|
init_map[int(entry[1])] = (entry[3], int(entry[2]))
|
|
|
|
continue
|
|
|
|
|
|
|
|
if entry[0] in ["latch", "invlatch"]:
|
|
|
|
latch_map[int(entry[1])] = (entry[3], int(entry[2]), entry[0] == "invlatch")
|
|
|
|
continue
|
|
|
|
|
|
|
|
if entry[0] in ["output", "wire"]:
|
|
|
|
continue
|
|
|
|
|
|
|
|
assert False
|
|
|
|
|
2017-01-30 04:38:43 -06:00
|
|
|
with open(aiwfile, "r") as f:
|
2016-12-01 05:57:26 -06:00
|
|
|
got_state = False
|
|
|
|
got_ffinit = False
|
|
|
|
step = 0
|
|
|
|
|
2017-01-28 08:14:56 -06:00
|
|
|
if not aigheader:
|
|
|
|
got_state = True
|
|
|
|
|
2016-12-01 05:57:26 -06:00
|
|
|
for entry in f.read().splitlines():
|
|
|
|
if len(entry) == 0 or entry[0] in "bcjfu.":
|
|
|
|
continue
|
|
|
|
|
|
|
|
if not got_state:
|
|
|
|
got_state = True
|
|
|
|
assert entry == "1"
|
|
|
|
continue
|
|
|
|
|
|
|
|
if not got_ffinit:
|
|
|
|
got_ffinit = True
|
|
|
|
if len(init_map) == 0:
|
|
|
|
for i in range(len(entry)):
|
|
|
|
if entry[i] == "x":
|
|
|
|
continue
|
|
|
|
|
|
|
|
if i in latch_map:
|
|
|
|
value = int(entry[i])
|
|
|
|
name = latch_map[i][0]
|
|
|
|
bitidx = latch_map[i][1]
|
|
|
|
invert = latch_map[i][2]
|
|
|
|
|
|
|
|
if invert:
|
|
|
|
value = 1 - value
|
|
|
|
|
|
|
|
path = smt.get_path(topmod, name)
|
|
|
|
width = smt.net_width(topmod, path)
|
|
|
|
|
|
|
|
if width == 1:
|
|
|
|
assert bitidx == 0
|
|
|
|
smtexpr = "(= [%s] %s)" % (name, "true" if value else "false")
|
|
|
|
else:
|
|
|
|
smtexpr = "(= ((_ extract %d %d) [%s]) #b%d)" % (bitidx, bitidx, name, value)
|
|
|
|
|
|
|
|
constr_assumes[0].append((cexfile, smtexpr))
|
|
|
|
continue
|
|
|
|
|
|
|
|
for i in range(len(entry)):
|
|
|
|
if entry[i] == "x":
|
|
|
|
continue
|
|
|
|
|
|
|
|
if (step == 0) and (i in init_map):
|
|
|
|
value = int(entry[i])
|
|
|
|
name = init_map[i][0]
|
|
|
|
bitidx = init_map[i][1]
|
|
|
|
|
|
|
|
path = smt.get_path(topmod, name)
|
2017-01-28 08:14:56 -06:00
|
|
|
|
|
|
|
if not smt.net_exists(topmod, path):
|
|
|
|
match = re.match(r"(.*)\[(\d+)\]$", path[-1])
|
|
|
|
if match:
|
|
|
|
path[-1] = match.group(1)
|
|
|
|
addr = int(match.group(2))
|
|
|
|
|
|
|
|
if not match or not smt.mem_exists(topmod, path):
|
|
|
|
print_msg("Ignoring init value for unknown net: %s" % (name))
|
|
|
|
continue
|
|
|
|
|
|
|
|
meminfo = smt.mem_info(topmod, path)
|
|
|
|
smtexpr = "(select [%s] #b%s)" % (".".join(path), bin(addr)[2:].zfill(meminfo[0]))
|
|
|
|
width = meminfo[1]
|
|
|
|
|
|
|
|
else:
|
|
|
|
smtexpr = "[%s]" % name
|
|
|
|
width = smt.net_width(topmod, path)
|
2016-12-01 05:57:26 -06:00
|
|
|
|
|
|
|
if width == 1:
|
|
|
|
assert bitidx == 0
|
2017-01-28 08:14:56 -06:00
|
|
|
smtexpr = "(= %s %s)" % (smtexpr, "true" if value else "false")
|
2016-12-01 05:57:26 -06:00
|
|
|
else:
|
2017-01-28 08:14:56 -06:00
|
|
|
smtexpr = "(= ((_ extract %d %d) %s) #b%d)" % (bitidx, bitidx, smtexpr, value)
|
2016-12-01 05:57:26 -06:00
|
|
|
|
|
|
|
constr_assumes[0].append((cexfile, smtexpr))
|
|
|
|
|
|
|
|
if i in input_map:
|
|
|
|
value = int(entry[i])
|
|
|
|
name = input_map[i][0]
|
|
|
|
bitidx = input_map[i][1]
|
|
|
|
|
|
|
|
path = smt.get_path(topmod, name)
|
|
|
|
width = smt.net_width(topmod, path)
|
|
|
|
|
|
|
|
if width == 1:
|
|
|
|
assert bitidx == 0
|
|
|
|
smtexpr = "(= [%s] %s)" % (name, "true" if value else "false")
|
|
|
|
else:
|
|
|
|
smtexpr = "(= ((_ extract %d %d) [%s]) #b%d)" % (bitidx, bitidx, name, value)
|
|
|
|
|
|
|
|
constr_assumes[step].append((cexfile, smtexpr))
|
|
|
|
|
|
|
|
if not got_topt:
|
2016-12-03 05:37:20 -06:00
|
|
|
skip_steps = max(skip_steps, step)
|
2016-12-01 05:57:26 -06:00
|
|
|
num_steps = max(num_steps, step+1)
|
|
|
|
step += 1
|
|
|
|
|
2018-12-09 20:43:07 -06:00
|
|
|
if btorwitfile is not None:
|
|
|
|
with open(btorwitfile, "r") as f:
|
|
|
|
step = None
|
|
|
|
suffix = None
|
|
|
|
altsuffix = None
|
|
|
|
header_okay = False
|
|
|
|
|
|
|
|
for line in f:
|
|
|
|
line = line.strip()
|
|
|
|
|
|
|
|
if line == "sat":
|
|
|
|
header_okay = True
|
|
|
|
continue
|
|
|
|
|
|
|
|
if not header_okay:
|
|
|
|
continue
|
|
|
|
|
|
|
|
if line == "" or line[0] == "b" or line[0] == "j":
|
|
|
|
continue
|
|
|
|
|
|
|
|
if line == ".":
|
|
|
|
break
|
|
|
|
|
|
|
|
if line[0] == '#' or line[0] == '@':
|
|
|
|
step = int(line[1:])
|
|
|
|
suffix = line
|
|
|
|
altsuffix = suffix
|
|
|
|
if suffix[0] == "@":
|
|
|
|
altsuffix = "#" + suffix[1:]
|
|
|
|
else:
|
|
|
|
altsuffix = "@" + suffix[1:]
|
|
|
|
continue
|
|
|
|
|
|
|
|
line = line.split()
|
|
|
|
|
|
|
|
if len(line) == 0:
|
|
|
|
continue
|
|
|
|
|
|
|
|
if line[-1].endswith(suffix):
|
|
|
|
line[-1] = line[-1][0:len(line[-1]) - len(suffix)]
|
|
|
|
|
|
|
|
if line[-1].endswith(altsuffix):
|
|
|
|
line[-1] = line[-1][0:len(line[-1]) - len(altsuffix)]
|
|
|
|
|
|
|
|
if line[-1][0] == "$":
|
|
|
|
continue
|
|
|
|
|
|
|
|
# BV assignments
|
|
|
|
if len(line) == 3 and line[1][0] != "[":
|
|
|
|
value = line[1]
|
|
|
|
name = line[2]
|
|
|
|
|
|
|
|
path = smt.get_path(topmod, name)
|
|
|
|
|
|
|
|
if not smt.net_exists(topmod, path):
|
|
|
|
continue
|
|
|
|
|
|
|
|
width = smt.net_width(topmod, path)
|
|
|
|
|
|
|
|
if width == 1:
|
|
|
|
assert value in ["0", "1"]
|
|
|
|
value = "true" if value == "1" else "false"
|
|
|
|
else:
|
|
|
|
value = "#b" + value
|
|
|
|
|
|
|
|
smtexpr = "(= [%s] %s)" % (name, value)
|
|
|
|
constr_assumes[step].append((btorwitfile, smtexpr))
|
|
|
|
|
|
|
|
# Array assignments
|
|
|
|
if len(line) == 4 and line[1][0] == "[":
|
|
|
|
index = line[1]
|
|
|
|
value = line[2]
|
|
|
|
name = line[3]
|
|
|
|
|
|
|
|
path = smt.get_path(topmod, name)
|
|
|
|
|
|
|
|
if not smt.mem_exists(topmod, path):
|
|
|
|
continue
|
|
|
|
|
|
|
|
meminfo = smt.mem_info(topmod, path)
|
|
|
|
|
|
|
|
if meminfo[1] == 1:
|
|
|
|
assert value in ["0", "1"]
|
|
|
|
value = "true" if value == "1" else "false"
|
|
|
|
else:
|
|
|
|
value = "#b" + value
|
|
|
|
|
|
|
|
assert index[0] == "["
|
|
|
|
assert index[-1] == "]"
|
|
|
|
index = "#b" + index[1:-1]
|
|
|
|
|
|
|
|
smtexpr = "(= (select [%s] %s) %s)" % (name, index, value)
|
|
|
|
constr_assumes[step].append((btorwitfile, smtexpr))
|
|
|
|
|
|
|
|
skip_steps = step
|
|
|
|
num_steps = step+1
|
2018-12-07 23:59:27 -06:00
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
def write_vcd_trace(steps_start, steps_stop, index):
|
|
|
|
filename = vcdfile.replace("%", index)
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Writing trace to VCD file: %s" % (filename))
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
with open(filename, "w") as vcd_file:
|
2016-09-02 05:01:31 -05:00
|
|
|
vcd = MkVcd(vcd_file)
|
2016-08-29 15:41:45 -05:00
|
|
|
path_list = list()
|
2016-08-18 04:17:45 -05:00
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
for netpath in sorted(smt.hiernets(topmod)):
|
|
|
|
hidden_net = False
|
|
|
|
for n in netpath:
|
|
|
|
if n.startswith("$"):
|
|
|
|
hidden_net = True
|
|
|
|
if not hidden_net:
|
2018-02-20 10:45:22 -06:00
|
|
|
edge = smt.net_clock(topmod, netpath)
|
|
|
|
if edge is None:
|
|
|
|
vcd.add_net([topmod] + netpath, smt.net_width(topmod, netpath))
|
|
|
|
else:
|
|
|
|
vcd.add_clock([topmod] + netpath, edge)
|
2016-08-29 15:41:45 -05:00
|
|
|
path_list.append(netpath)
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2017-02-26 14:26:32 -06:00
|
|
|
mem_trace_data = dict()
|
|
|
|
for mempath in sorted(smt.hiermems(topmod)):
|
2017-12-13 20:05:20 -06:00
|
|
|
abits, width, rports, wports, asyncwr = smt.mem_info(topmod, mempath)
|
2017-02-26 14:26:32 -06:00
|
|
|
|
|
|
|
expr_id = list()
|
|
|
|
expr_list = list()
|
|
|
|
for i in range(steps_start, steps_stop):
|
|
|
|
for j in range(rports):
|
|
|
|
expr_id.append(('R', i-steps_start, j, 'A'))
|
|
|
|
expr_id.append(('R', i-steps_start, j, 'D'))
|
|
|
|
expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "R%dA" % j))
|
|
|
|
expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "R%dD" % j))
|
|
|
|
for j in range(wports):
|
|
|
|
expr_id.append(('W', i-steps_start, j, 'A'))
|
|
|
|
expr_id.append(('W', i-steps_start, j, 'D'))
|
|
|
|
expr_id.append(('W', i-steps_start, j, 'M'))
|
|
|
|
expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "W%dA" % j))
|
|
|
|
expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "W%dD" % j))
|
|
|
|
expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "W%dM" % j))
|
|
|
|
|
|
|
|
rdata = list()
|
|
|
|
wdata = list()
|
|
|
|
addrs = set()
|
|
|
|
|
|
|
|
for eid, edat in zip(expr_id, smt.get_list(expr_list)):
|
|
|
|
t, i, j, f = eid
|
|
|
|
|
|
|
|
if t == 'R':
|
|
|
|
c = rdata
|
|
|
|
elif t == 'W':
|
|
|
|
c = wdata
|
|
|
|
else:
|
|
|
|
assert False
|
|
|
|
|
|
|
|
while len(c) <= i:
|
|
|
|
c.append(list())
|
|
|
|
c = c[i]
|
|
|
|
|
|
|
|
while len(c) <= j:
|
|
|
|
c.append(dict())
|
|
|
|
c = c[j]
|
|
|
|
|
|
|
|
c[f] = smt.bv2bin(edat)
|
|
|
|
|
|
|
|
if f == 'A':
|
|
|
|
addrs.add(c[f])
|
|
|
|
|
|
|
|
for addr in addrs:
|
|
|
|
tdata = list()
|
|
|
|
data = ["x"] * width
|
|
|
|
gotread = False
|
|
|
|
|
2017-10-25 06:05:14 -05:00
|
|
|
if len(wdata) == 0 and len(rdata) != 0:
|
|
|
|
wdata = [[]] * len(rdata)
|
|
|
|
|
2017-02-26 14:26:32 -06:00
|
|
|
assert len(rdata) == len(wdata)
|
|
|
|
|
|
|
|
for i in range(len(wdata)):
|
|
|
|
if not gotread:
|
|
|
|
for j_data in rdata[i]:
|
|
|
|
if j_data["A"] == addr:
|
|
|
|
data = list(j_data["D"])
|
|
|
|
gotread = True
|
|
|
|
break
|
|
|
|
|
|
|
|
if gotread:
|
|
|
|
buf = data[:]
|
|
|
|
for i in reversed(range(len(tdata))):
|
|
|
|
for k in range(width):
|
|
|
|
if tdata[i][k] == "x":
|
|
|
|
tdata[i][k] = buf[k]
|
|
|
|
else:
|
|
|
|
buf[k] = tdata[i][k]
|
|
|
|
|
2017-12-13 20:05:20 -06:00
|
|
|
if not asyncwr:
|
|
|
|
tdata.append(data[:])
|
2017-02-26 14:26:32 -06:00
|
|
|
|
|
|
|
for j_data in wdata[i]:
|
|
|
|
if j_data["A"] != addr:
|
|
|
|
continue
|
|
|
|
|
|
|
|
D = j_data["D"]
|
|
|
|
M = j_data["M"]
|
|
|
|
|
|
|
|
for k in range(width):
|
|
|
|
if M[k] == "1":
|
|
|
|
data[k] = D[k]
|
|
|
|
|
2017-12-13 20:05:20 -06:00
|
|
|
if asyncwr:
|
|
|
|
tdata.append(data[:])
|
|
|
|
|
2017-02-26 14:26:32 -06:00
|
|
|
assert len(tdata) == len(rdata)
|
|
|
|
|
|
|
|
netpath = mempath[:]
|
2017-02-28 06:54:50 -06:00
|
|
|
netpath[-1] += "<%0*x>" % ((len(addr)+3) // 4, int(addr, 2))
|
2017-02-26 14:26:32 -06:00
|
|
|
vcd.add_net([topmod] + netpath, width)
|
|
|
|
|
|
|
|
for i in range(steps_start, steps_stop):
|
|
|
|
if i not in mem_trace_data:
|
|
|
|
mem_trace_data[i] = list()
|
|
|
|
mem_trace_data[i].append((netpath, "".join(tdata[i-steps_start])))
|
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
for i in range(steps_start, steps_stop):
|
|
|
|
vcd.set_time(i)
|
|
|
|
value_list = smt.get_net_bin_list(topmod, path_list, "s%d" % i)
|
|
|
|
for path, value in zip(path_list, value_list):
|
|
|
|
vcd.set_net([topmod] + path, value)
|
2017-02-26 14:26:32 -06:00
|
|
|
if i in mem_trace_data:
|
|
|
|
for path, value in mem_trace_data[i]:
|
|
|
|
vcd.set_net([topmod] + path, value)
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
vcd.set_time(steps_stop)
|
2015-10-13 10:17:23 -05:00
|
|
|
|
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
def write_vlogtb_trace(steps_start, steps_stop, index):
|
|
|
|
filename = vlogtbfile.replace("%", index)
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Writing trace to Verilog testbench: %s" % (filename))
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2017-07-01 11:19:23 -05:00
|
|
|
vlogtb_topmod = topmod
|
|
|
|
vlogtb_state = "s@@step_idx@@"
|
|
|
|
|
|
|
|
if vlogtbtop is not None:
|
|
|
|
for item in vlogtbtop.split("."):
|
2018-03-05 05:08:41 -06:00
|
|
|
if item in smt.modinfo[vlogtb_topmod].cells:
|
|
|
|
vlogtb_state = "(|%s_h %s| %s)" % (vlogtb_topmod, item, vlogtb_state)
|
|
|
|
vlogtb_topmod = smt.modinfo[vlogtb_topmod].cells[item]
|
|
|
|
else:
|
|
|
|
print_msg("Vlog top module '%s' not found: no cell '%s' in module '%s'" % (vlogtbtop, item, vlogtb_topmod))
|
|
|
|
break
|
2017-07-01 11:19:23 -05:00
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
with open(filename, "w") as f:
|
2017-07-21 07:33:29 -05:00
|
|
|
print("`ifndef VERILATOR", file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
print("module testbench;", file=f)
|
|
|
|
print(" reg [4095:0] vcdfile;", file=f)
|
2017-07-21 07:33:29 -05:00
|
|
|
print(" reg clock;", file=f)
|
|
|
|
print("`else", file=f)
|
|
|
|
print("module testbench(input clock, output reg genclock);", file=f)
|
|
|
|
print(" initial genclock = 1;", file=f)
|
|
|
|
print("`endif", file=f)
|
|
|
|
|
|
|
|
print(" reg genclock = 1;", file=f)
|
2017-07-12 08:57:04 -05:00
|
|
|
print(" reg [31:0] cycle = 0;", file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
|
|
|
|
primary_inputs = list()
|
|
|
|
clock_inputs = set()
|
|
|
|
|
2017-07-01 11:19:23 -05:00
|
|
|
for name in smt.modinfo[vlogtb_topmod].inputs:
|
2016-08-20 11:43:39 -05:00
|
|
|
if name in ["clk", "clock", "CLK", "CLOCK"]:
|
|
|
|
clock_inputs.add(name)
|
2017-07-01 11:19:23 -05:00
|
|
|
width = smt.modinfo[vlogtb_topmod].wsize[name]
|
2016-08-20 11:43:39 -05:00
|
|
|
primary_inputs.append((name, width))
|
|
|
|
|
|
|
|
for name, width in primary_inputs:
|
|
|
|
if name in clock_inputs:
|
|
|
|
print(" wire [%d:0] PI_%s = clock;" % (width-1, name), file=f)
|
|
|
|
else:
|
|
|
|
print(" reg [%d:0] PI_%s;" % (width-1, name), file=f)
|
|
|
|
|
2017-07-01 11:19:23 -05:00
|
|
|
print(" %s UUT (" % vlogtb_topmod, file=f)
|
2016-09-02 03:02:19 -05:00
|
|
|
print(",\n".join(" .{name}(PI_{name})".format(name=name) for name, _ in primary_inputs), file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
print(" );", file=f)
|
|
|
|
|
2017-07-21 07:33:29 -05:00
|
|
|
print("`ifndef VERILATOR", file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
print(" initial begin", file=f)
|
|
|
|
print(" if ($value$plusargs(\"vcd=%s\", vcdfile)) begin", file=f)
|
|
|
|
print(" $dumpfile(vcdfile);", file=f)
|
|
|
|
print(" $dumpvars(0, testbench);", file=f)
|
|
|
|
print(" end", file=f)
|
2017-07-21 07:33:29 -05:00
|
|
|
print(" #5 clock = 0;", file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
print(" while (genclock) begin", file=f)
|
2017-07-21 07:33:29 -05:00
|
|
|
print(" #5 clock = 0;", file=f)
|
|
|
|
print(" #5 clock = 1;", file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
print(" end", file=f)
|
|
|
|
print(" end", file=f)
|
2017-07-21 07:33:29 -05:00
|
|
|
print("`endif", file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
|
|
|
|
print(" initial begin", file=f)
|
|
|
|
|
2017-07-01 11:19:23 -05:00
|
|
|
regs = sorted(smt.hiernets(vlogtb_topmod, regs_only=True))
|
|
|
|
regvals = smt.get_net_bin_list(vlogtb_topmod, regs, vlogtb_state.replace("@@step_idx@@", str(steps_start)))
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2017-07-21 07:33:29 -05:00
|
|
|
print("`ifndef VERILATOR", file=f)
|
2016-09-02 03:02:19 -05:00
|
|
|
print(" #1;", file=f)
|
2017-07-21 07:33:29 -05:00
|
|
|
print("`endif", file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
for reg, val in zip(regs, regvals):
|
|
|
|
hidden_net = False
|
|
|
|
for n in reg:
|
|
|
|
if n.startswith("$"):
|
|
|
|
hidden_net = True
|
|
|
|
print(" %sUUT.%s = %d'b%s;" % ("// " if hidden_net else "", ".".join(reg), len(val), val), file=f)
|
|
|
|
|
2017-07-01 11:19:23 -05:00
|
|
|
anyconsts = sorted(smt.hieranyconsts(vlogtb_topmod))
|
2017-06-07 05:30:24 -05:00
|
|
|
for info in anyconsts:
|
|
|
|
if info[3] is not None:
|
2017-07-01 11:19:23 -05:00
|
|
|
modstate = smt.net_expr(vlogtb_topmod, vlogtb_state.replace("@@step_idx@@", str(steps_start)), info[0])
|
2017-06-07 05:30:24 -05:00
|
|
|
value = smt.bv2bin(smt.get("(|%s| %s)" % (info[1], modstate)))
|
|
|
|
print(" UUT.%s = %d'b%s;" % (".".join(info[0] + [info[3]]), len(value), value), file=f);
|
|
|
|
|
2017-07-01 11:19:23 -05:00
|
|
|
mems = sorted(smt.hiermems(vlogtb_topmod))
|
2016-08-20 11:43:39 -05:00
|
|
|
for mempath in mems:
|
2017-12-13 20:05:20 -06:00
|
|
|
abits, width, rports, wports, asyncwr = smt.mem_info(vlogtb_topmod, mempath)
|
2016-08-21 08:56:22 -05:00
|
|
|
|
|
|
|
addr_expr_list = list()
|
2017-02-26 03:58:34 -06:00
|
|
|
data_expr_list = list()
|
2016-08-29 15:41:45 -05:00
|
|
|
for i in range(steps_start, steps_stop):
|
2017-02-24 11:24:53 -06:00
|
|
|
for j in range(rports):
|
2017-07-01 11:19:23 -05:00
|
|
|
addr_expr_list.append(smt.mem_expr(vlogtb_topmod, vlogtb_state.replace("@@step_idx@@", str(i)), mempath, "R%dA" % j))
|
|
|
|
data_expr_list.append(smt.mem_expr(vlogtb_topmod, vlogtb_state.replace("@@step_idx@@", str(i)), mempath, "R%dD" % j))
|
2016-08-21 08:56:22 -05:00
|
|
|
|
2017-02-26 03:58:34 -06:00
|
|
|
addr_list = smt.get_list(addr_expr_list)
|
|
|
|
data_list = smt.get_list(data_expr_list)
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2017-02-26 03:58:34 -06:00
|
|
|
addr_data = dict()
|
|
|
|
for addr, data in zip(addr_list, data_list):
|
|
|
|
addr = smt.bv2bin(addr)
|
|
|
|
data = smt.bv2bin(data)
|
|
|
|
if addr not in addr_data:
|
|
|
|
addr_data[addr] = data
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2017-02-26 03:58:34 -06:00
|
|
|
for addr, data in addr_data.items():
|
|
|
|
print(" UUT.%s[%d'b%s] = %d'b%s;" % (".".join(mempath), len(addr), addr, len(data), data), file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2017-07-12 08:57:04 -05:00
|
|
|
print("", file=f)
|
2017-07-01 11:19:23 -05:00
|
|
|
anyseqs = sorted(smt.hieranyseqs(vlogtb_topmod))
|
2017-06-07 05:30:24 -05:00
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
for i in range(steps_start, steps_stop):
|
2016-08-20 11:43:39 -05:00
|
|
|
pi_names = [[name] for name, _ in primary_inputs if name not in clock_inputs]
|
2017-07-01 11:19:23 -05:00
|
|
|
pi_values = smt.get_net_bin_list(vlogtb_topmod, pi_names, vlogtb_state.replace("@@step_idx@@", str(i)))
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2016-09-02 03:02:19 -05:00
|
|
|
print(" // state %d" % i, file=f)
|
2017-07-12 08:57:04 -05:00
|
|
|
|
2016-08-20 11:43:39 -05:00
|
|
|
if i > 0:
|
2017-07-12 08:57:04 -05:00
|
|
|
print(" if (cycle == %d) begin" % (i-1), file=f)
|
|
|
|
|
2016-08-20 11:43:39 -05:00
|
|
|
for name, val in zip(pi_names, pi_values):
|
2017-07-12 08:57:04 -05:00
|
|
|
if i > 0:
|
|
|
|
print(" PI_%s <= %d'b%s;" % (".".join(name), len(val), val), file=f)
|
|
|
|
else:
|
|
|
|
print(" PI_%s = %d'b%s;" % (".".join(name), len(val), val), file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2017-06-07 05:30:24 -05:00
|
|
|
for info in anyseqs:
|
|
|
|
if info[3] is not None:
|
2017-07-01 11:19:23 -05:00
|
|
|
modstate = smt.net_expr(vlogtb_topmod, vlogtb_state.replace("@@step_idx@@", str(i)), info[0])
|
2017-06-07 05:30:24 -05:00
|
|
|
value = smt.bv2bin(smt.get("(|%s| %s)" % (info[1], modstate)))
|
2017-07-12 08:57:04 -05:00
|
|
|
if i > 0:
|
|
|
|
print(" UUT.%s <= %d'b%s;" % (".".join(info[0] + [info[3]]), len(value), value), file=f);
|
|
|
|
else:
|
|
|
|
print(" UUT.%s = %d'b%s;" % (".".join(info[0] + [info[3]]), len(value), value), file=f);
|
|
|
|
|
|
|
|
if i > 0:
|
|
|
|
print(" end", file=f)
|
|
|
|
print("", file=f)
|
|
|
|
|
|
|
|
if i == 0:
|
|
|
|
print(" end", file=f)
|
|
|
|
print(" always @(posedge clock) begin", file=f)
|
2017-06-07 05:30:24 -05:00
|
|
|
|
2017-07-12 08:57:04 -05:00
|
|
|
print(" genclock <= cycle < %d;" % (steps_stop-1), file=f)
|
|
|
|
print(" cycle <= cycle + 1;", file=f)
|
2016-08-20 11:43:39 -05:00
|
|
|
print(" end", file=f)
|
|
|
|
|
|
|
|
print("endmodule", file=f)
|
|
|
|
|
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
def write_constr_trace(steps_start, steps_stop, index):
|
|
|
|
filename = outconstr.replace("%", index)
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Writing trace to constraints file: %s" % (filename))
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2017-08-04 10:09:08 -05:00
|
|
|
constr_topmod = topmod
|
|
|
|
constr_state = "s@@step_idx@@"
|
|
|
|
constr_prefix = ""
|
|
|
|
|
|
|
|
if smtctop is not None:
|
|
|
|
for item in smtctop[0].split("."):
|
|
|
|
assert item in smt.modinfo[constr_topmod].cells
|
|
|
|
constr_state = "(|%s_h %s| %s)" % (constr_topmod, item, constr_state)
|
|
|
|
constr_topmod = smt.modinfo[constr_topmod].cells[item]
|
|
|
|
if smtctop[1] != "":
|
|
|
|
constr_prefix = smtctop[1] + "."
|
|
|
|
|
|
|
|
if smtcinit:
|
|
|
|
steps_start = steps_stop - 1
|
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
with open(filename, "w") as f:
|
2016-08-22 09:48:46 -05:00
|
|
|
primary_inputs = list()
|
|
|
|
|
2017-08-04 10:09:08 -05:00
|
|
|
for name in smt.modinfo[constr_topmod].inputs:
|
|
|
|
width = smt.modinfo[constr_topmod].wsize[name]
|
2016-08-22 09:48:46 -05:00
|
|
|
primary_inputs.append((name, width))
|
|
|
|
|
2017-08-04 10:09:08 -05:00
|
|
|
if steps_start == 0 or smtcinit:
|
2016-08-29 15:41:45 -05:00
|
|
|
print("initial", file=f)
|
|
|
|
else:
|
|
|
|
print("state %d" % steps_start, file=f)
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2017-08-04 10:09:08 -05:00
|
|
|
regnames = sorted(smt.hiernets(constr_topmod, regs_only=True))
|
|
|
|
regvals = smt.get_net_list(constr_topmod, regnames, constr_state.replace("@@step_idx@@", str(steps_start)))
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2016-08-29 06:53:12 -05:00
|
|
|
for name, val in zip(regnames, regvals):
|
2017-08-04 10:09:08 -05:00
|
|
|
print("assume (= [%s%s] %s)" % (constr_prefix, ".".join(name), val), file=f)
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2017-08-04 10:09:08 -05:00
|
|
|
mems = sorted(smt.hiermems(constr_topmod))
|
2016-08-29 06:53:12 -05:00
|
|
|
for mempath in mems:
|
2017-12-13 20:05:20 -06:00
|
|
|
abits, width, rports, wports, asyncwr = smt.mem_info(constr_topmod, mempath)
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2016-08-29 06:53:12 -05:00
|
|
|
addr_expr_list = list()
|
2017-02-26 03:58:34 -06:00
|
|
|
data_expr_list = list()
|
2016-08-29 15:41:45 -05:00
|
|
|
for i in range(steps_start, steps_stop):
|
2017-02-24 11:24:53 -06:00
|
|
|
for j in range(rports):
|
2017-08-04 10:09:08 -05:00
|
|
|
addr_expr_list.append(smt.mem_expr(constr_topmod, constr_state.replace("@@step_idx@@", str(i)), mempath, "R%dA" % j))
|
|
|
|
data_expr_list.append(smt.mem_expr(constr_topmod, constr_state.replace("@@step_idx@@", str(i)), mempath, "R%dD" % j))
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2017-02-26 03:58:34 -06:00
|
|
|
addr_list = smt.get_list(addr_expr_list)
|
|
|
|
data_list = smt.get_list(data_expr_list)
|
2016-08-29 06:53:12 -05:00
|
|
|
|
2017-02-26 03:58:34 -06:00
|
|
|
addr_data = dict()
|
|
|
|
for addr, data in zip(addr_list, data_list):
|
|
|
|
if addr not in addr_data:
|
|
|
|
addr_data[addr] = data
|
2016-08-29 06:53:12 -05:00
|
|
|
|
2017-02-26 03:58:34 -06:00
|
|
|
for addr, data in addr_data.items():
|
2017-08-04 10:09:08 -05:00
|
|
|
print("assume (= (select [%s%s] %s) %s)" % (constr_prefix, ".".join(mempath), addr, data), file=f)
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
for k in range(steps_start, steps_stop):
|
2017-08-04 10:09:08 -05:00
|
|
|
if not smtcinit:
|
|
|
|
print("", file=f)
|
|
|
|
print("state %d" % k, file=f)
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2016-08-29 06:53:12 -05:00
|
|
|
pi_names = [[name] for name, _ in sorted(primary_inputs)]
|
2017-08-04 10:09:08 -05:00
|
|
|
pi_values = smt.get_net_list(constr_topmod, pi_names, constr_state.replace("@@step_idx@@", str(k)))
|
2016-08-22 09:48:46 -05:00
|
|
|
|
|
|
|
for name, val in zip(pi_names, pi_values):
|
2017-08-04 10:09:08 -05:00
|
|
|
print("assume (= [%s%s] %s)" % (constr_prefix, ".".join(name), val), file=f)
|
2016-08-22 09:48:46 -05:00
|
|
|
|
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
def write_trace(steps_start, steps_stop, index):
|
2016-08-20 11:43:39 -05:00
|
|
|
if vcdfile is not None:
|
2016-08-29 15:41:45 -05:00
|
|
|
write_vcd_trace(steps_start, steps_stop, index)
|
2016-08-20 11:43:39 -05:00
|
|
|
|
|
|
|
if vlogtbfile is not None:
|
2016-08-29 15:41:45 -05:00
|
|
|
write_vlogtb_trace(steps_start, steps_stop, index)
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2016-08-22 09:48:46 -05:00
|
|
|
if outconstr is not None:
|
2016-08-29 15:41:45 -05:00
|
|
|
write_constr_trace(steps_start, steps_stop, index)
|
2016-08-22 09:48:46 -05:00
|
|
|
|
2016-08-20 11:43:39 -05:00
|
|
|
|
2017-02-04 14:22:17 -06:00
|
|
|
def print_failed_asserts_worker(mod, state, path, extrainfo):
|
2016-08-17 13:10:02 -05:00
|
|
|
assert mod in smt.modinfo
|
2017-02-04 14:22:17 -06:00
|
|
|
found_failed_assert = False
|
2016-08-17 13:10:02 -05:00
|
|
|
|
2016-09-13 06:23:06 -05:00
|
|
|
if smt.get("(|%s_a| %s)" % (mod, state)) in ["true", "#b1"]:
|
2016-08-17 13:10:02 -05:00
|
|
|
return
|
|
|
|
|
|
|
|
for cellname, celltype in smt.modinfo[mod].cells.items():
|
2017-02-04 14:22:17 -06:00
|
|
|
if print_failed_asserts_worker(celltype, "(|%s_h %s| %s)" % (mod, cellname, state), path + "." + cellname, extrainfo):
|
|
|
|
found_failed_assert = True
|
2016-08-17 13:10:02 -05:00
|
|
|
|
|
|
|
for assertfun, assertinfo in smt.modinfo[mod].asserts.items():
|
2016-09-13 06:23:06 -05:00
|
|
|
if smt.get("(|%s| %s)" % (assertfun, state)) in ["false", "#b0"]:
|
2017-02-04 14:22:17 -06:00
|
|
|
print_msg("Assert failed in %s: %s%s" % (path, assertinfo, extrainfo))
|
|
|
|
found_failed_assert = True
|
2016-08-17 13:10:02 -05:00
|
|
|
|
2017-02-04 14:22:17 -06:00
|
|
|
return found_failed_assert
|
2016-08-17 13:10:02 -05:00
|
|
|
|
2017-02-04 14:22:17 -06:00
|
|
|
|
|
|
|
def print_failed_asserts(state, final=False, extrainfo=""):
|
2016-09-19 13:43:28 -05:00
|
|
|
if noinfo: return
|
2016-08-29 06:53:12 -05:00
|
|
|
loc_list, expr_list, value_list = get_constr_expr(constr_asserts, state, final=final, getvalues=True)
|
2017-02-04 14:22:17 -06:00
|
|
|
found_failed_assert = False
|
2016-08-29 06:53:12 -05:00
|
|
|
|
|
|
|
for loc, expr, value in zip(loc_list, expr_list, value_list):
|
|
|
|
if smt.bv2int(value) == 0:
|
2017-02-04 14:22:17 -06:00
|
|
|
print_msg("Assert %s failed: %s%s" % (loc, expr, extrainfo))
|
|
|
|
found_failed_assert = True
|
2016-08-29 06:53:12 -05:00
|
|
|
|
|
|
|
if not final:
|
2017-02-04 14:22:17 -06:00
|
|
|
if print_failed_asserts_worker(topmod, "s%d" % state, topmod, extrainfo):
|
|
|
|
found_failed_assert = True
|
|
|
|
|
|
|
|
return found_failed_assert
|
2016-08-29 06:53:12 -05:00
|
|
|
|
|
|
|
|
2016-08-30 12:27:42 -05:00
|
|
|
def print_anyconsts_worker(mod, state, path):
|
|
|
|
assert mod in smt.modinfo
|
|
|
|
|
|
|
|
for cellname, celltype in smt.modinfo[mod].cells.items():
|
|
|
|
print_anyconsts_worker(celltype, "(|%s_h %s| %s)" % (mod, cellname, state), path + "." + cellname)
|
|
|
|
|
|
|
|
for fun, info in smt.modinfo[mod].anyconsts.items():
|
2017-06-07 05:30:24 -05:00
|
|
|
if info[1] is None:
|
2018-02-23 12:33:30 -06:00
|
|
|
print_msg("Value for anyconst in %s (%s): %d" % (path, info[0], smt.bv2int(smt.get("(|%s| %s)" % (fun, state)))))
|
2017-06-07 05:30:24 -05:00
|
|
|
else:
|
|
|
|
print_msg("Value for anyconst %s.%s (%s): %d" % (path, info[1], info[0], smt.bv2int(smt.get("(|%s| %s)" % (fun, state)))))
|
2016-08-30 12:27:42 -05:00
|
|
|
|
|
|
|
|
|
|
|
def print_anyconsts(state):
|
2016-09-19 13:43:28 -05:00
|
|
|
if noinfo: return
|
2016-08-30 12:27:42 -05:00
|
|
|
print_anyconsts_worker(topmod, "s%d" % state, topmod)
|
|
|
|
|
|
|
|
|
2017-02-04 11:17:08 -06:00
|
|
|
def get_cover_list(mod, base):
|
|
|
|
assert mod in smt.modinfo
|
|
|
|
|
|
|
|
cover_expr = list()
|
|
|
|
cover_desc = list()
|
|
|
|
|
|
|
|
for expr, desc in smt.modinfo[mod].covers.items():
|
|
|
|
cover_expr.append("(ite (|%s| %s) #b1 #b0)" % (expr, base))
|
|
|
|
cover_desc.append(desc)
|
|
|
|
|
|
|
|
for cell, submod in smt.modinfo[mod].cells.items():
|
|
|
|
e, d = get_cover_list(submod, "(|%s_h %s| %s)" % (mod, cell, base))
|
|
|
|
cover_expr += e
|
|
|
|
cover_desc += d
|
|
|
|
|
|
|
|
return cover_expr, cover_desc
|
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
states = list()
|
|
|
|
asserts_antecedent_cache = [list()]
|
|
|
|
asserts_consequent_cache = [list()]
|
|
|
|
asserts_cache_dirty = False
|
|
|
|
|
|
|
|
def smt_state(step):
|
|
|
|
smt.write("(declare-fun s%d () |%s_s|)" % (step, topmod))
|
|
|
|
states.append("s%d" % step)
|
|
|
|
|
2018-02-26 04:58:44 -06:00
|
|
|
def smt_assert(expr):
|
|
|
|
if expr == "true":
|
|
|
|
return
|
|
|
|
|
|
|
|
smt.write("(assert %s)" % expr)
|
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
def smt_assert_antecedent(expr):
|
|
|
|
if expr == "true":
|
|
|
|
return
|
|
|
|
|
|
|
|
smt.write("(assert %s)" % expr)
|
|
|
|
|
|
|
|
global asserts_cache_dirty
|
|
|
|
asserts_cache_dirty = True
|
|
|
|
asserts_antecedent_cache[-1].append(expr)
|
|
|
|
|
|
|
|
def smt_assert_consequent(expr):
|
|
|
|
if expr == "true":
|
|
|
|
return
|
|
|
|
|
|
|
|
smt.write("(assert %s)" % expr)
|
|
|
|
|
|
|
|
global asserts_cache_dirty
|
|
|
|
asserts_cache_dirty = True
|
|
|
|
asserts_consequent_cache[-1].append(expr)
|
|
|
|
|
|
|
|
def smt_forall_assert():
|
|
|
|
if not smt.forall:
|
|
|
|
return
|
|
|
|
|
|
|
|
global asserts_cache_dirty
|
|
|
|
asserts_cache_dirty = False
|
|
|
|
|
2020-03-08 00:34:47 -06:00
|
|
|
assert (len(smt.modinfo[topmod].maximize) + len(smt.modinfo[topmod].minimize) <= 1)
|
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
def make_assert_expr(asserts_cache):
|
|
|
|
expr = list()
|
|
|
|
for lst in asserts_cache:
|
|
|
|
expr += lst
|
|
|
|
|
|
|
|
assert len(expr) != 0
|
|
|
|
|
|
|
|
if len(expr) == 1:
|
|
|
|
expr = expr[0]
|
|
|
|
else:
|
|
|
|
expr = "(and %s)" % (" ".join(expr))
|
|
|
|
return expr
|
|
|
|
|
|
|
|
antecedent_expr = make_assert_expr(asserts_antecedent_cache)
|
|
|
|
consequent_expr = make_assert_expr(asserts_consequent_cache)
|
|
|
|
|
|
|
|
states_db = set(states)
|
|
|
|
used_states_db = set()
|
|
|
|
new_antecedent_expr = list()
|
|
|
|
new_consequent_expr = list()
|
|
|
|
assert_expr = list()
|
|
|
|
|
|
|
|
def make_new_expr(new_expr, expr):
|
|
|
|
cursor = 0
|
|
|
|
while cursor < len(expr):
|
|
|
|
l = 1
|
|
|
|
if expr[cursor] in '|"':
|
|
|
|
while cursor+l+1 < len(expr) and expr[cursor] != expr[cursor+l]:
|
|
|
|
l += 1
|
|
|
|
l += 1
|
|
|
|
elif expr[cursor] not in '() ':
|
|
|
|
while cursor+l < len(expr) and expr[cursor+l] not in '|"() ':
|
|
|
|
l += 1
|
|
|
|
|
|
|
|
word = expr[cursor:cursor+l]
|
|
|
|
if word in states_db:
|
|
|
|
used_states_db.add(word)
|
|
|
|
word += "_"
|
|
|
|
|
|
|
|
new_expr.append(word)
|
|
|
|
cursor += l
|
|
|
|
|
|
|
|
make_new_expr(new_antecedent_expr, antecedent_expr)
|
|
|
|
make_new_expr(new_consequent_expr, consequent_expr)
|
|
|
|
|
|
|
|
new_antecedent_expr = ["".join(new_antecedent_expr)]
|
|
|
|
new_consequent_expr = ["".join(new_consequent_expr)]
|
|
|
|
|
|
|
|
if states[0] in used_states_db:
|
|
|
|
new_antecedent_expr.append("(|%s_ex_state_eq| %s %s_)" % (topmod, states[0], states[0]))
|
|
|
|
for s in states:
|
|
|
|
if s in used_states_db:
|
|
|
|
new_antecedent_expr.append("(|%s_ex_input_eq| %s %s_)" % (topmod, s, s))
|
|
|
|
|
|
|
|
if len(new_antecedent_expr) == 0:
|
|
|
|
new_antecedent_expr = "true"
|
|
|
|
elif len(new_antecedent_expr) == 1:
|
|
|
|
new_antecedent_expr = new_antecedent_expr[0]
|
|
|
|
else:
|
|
|
|
new_antecedent_expr = "(and %s)" % (" ".join(new_antecedent_expr))
|
|
|
|
|
|
|
|
if len(new_consequent_expr) == 0:
|
|
|
|
new_consequent_expr = "true"
|
|
|
|
elif len(new_consequent_expr) == 1:
|
|
|
|
new_consequent_expr = new_consequent_expr[0]
|
|
|
|
else:
|
|
|
|
new_consequent_expr = "(and %s)" % (" ".join(new_consequent_expr))
|
|
|
|
|
|
|
|
assert_expr.append("(assert (forall (")
|
|
|
|
first_state = True
|
|
|
|
for s in states:
|
|
|
|
if s in used_states_db:
|
|
|
|
assert_expr.append("%s(%s_ |%s_s|)" % ("" if first_state else " ", s, topmod))
|
|
|
|
first_state = False
|
|
|
|
assert_expr.append(") (=> %s %s)))" % (new_antecedent_expr, new_consequent_expr))
|
|
|
|
|
|
|
|
smt.write("".join(assert_expr))
|
|
|
|
|
2020-03-08 00:34:47 -06:00
|
|
|
if len(smt.modinfo[topmod].maximize) > 0:
|
|
|
|
for s in states:
|
|
|
|
if s in used_states_db:
|
|
|
|
smt.write("(maximize (|%s| %s))\n" % (smt.modinfo[topmod].maximize.copy().pop(), s))
|
|
|
|
break
|
|
|
|
|
|
|
|
if len(smt.modinfo[topmod].minimize) > 0:
|
|
|
|
for s in states:
|
|
|
|
if s in used_states_db:
|
|
|
|
smt.write("(minimize (|%s| %s))\n" % (smt.modinfo[topmod].minimize.copy().pop(), s))
|
|
|
|
break
|
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
def smt_push():
|
|
|
|
global asserts_cache_dirty
|
|
|
|
asserts_cache_dirty = True
|
|
|
|
asserts_antecedent_cache.append(list())
|
|
|
|
asserts_consequent_cache.append(list())
|
|
|
|
smt.write("(push 1)")
|
|
|
|
|
|
|
|
def smt_pop():
|
|
|
|
global asserts_cache_dirty
|
|
|
|
asserts_cache_dirty = True
|
|
|
|
asserts_antecedent_cache.pop()
|
|
|
|
asserts_consequent_cache.pop()
|
|
|
|
smt.write("(pop 1)")
|
|
|
|
|
|
|
|
def smt_check_sat():
|
|
|
|
if asserts_cache_dirty:
|
|
|
|
smt_forall_assert()
|
|
|
|
return smt.check_sat()
|
2017-02-04 11:17:08 -06:00
|
|
|
|
2015-10-13 17:18:38 -05:00
|
|
|
if tempind:
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "FAILED"
|
2015-12-20 02:58:54 -06:00
|
|
|
skip_counter = step_size
|
2015-10-13 18:27:55 -05:00
|
|
|
for step in range(num_steps, -1, -1):
|
2018-02-23 12:33:30 -06:00
|
|
|
if smt.forall:
|
|
|
|
print_msg("Temporal induction not supported for exists-forall problems.")
|
|
|
|
break
|
|
|
|
|
|
|
|
smt_state(step)
|
|
|
|
smt_assert_consequent("(|%s_u| s%d)" % (topmod, step))
|
|
|
|
smt_assert_antecedent("(|%s_h| s%d)" % (topmod, step))
|
|
|
|
smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, step))
|
|
|
|
smt_assert_consequent(get_constr_expr(constr_assumes, step))
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2015-10-13 18:27:55 -05:00
|
|
|
if step == num_steps:
|
2018-02-26 04:58:44 -06:00
|
|
|
smt_assert("(not (and (|%s_a| s%d) %s))" % (topmod, step, get_constr_expr(constr_asserts, step)))
|
2015-10-13 17:18:38 -05:00
|
|
|
|
|
|
|
else:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, step, step+1))
|
2018-02-26 04:58:44 -06:00
|
|
|
smt_assert("(|%s_a| s%d)" % (topmod, step))
|
|
|
|
smt_assert(get_constr_expr(constr_asserts, step))
|
2015-10-13 17:18:38 -05:00
|
|
|
|
2015-10-13 18:27:55 -05:00
|
|
|
if step > num_steps-skip_steps:
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Skipping induction in step %d.." % (step))
|
2015-10-13 17:18:38 -05:00
|
|
|
continue
|
|
|
|
|
2015-12-20 02:58:54 -06:00
|
|
|
skip_counter += 1
|
|
|
|
if skip_counter < step_size:
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Skipping induction in step %d.." % (step))
|
2015-12-20 02:58:54 -06:00
|
|
|
continue
|
|
|
|
|
|
|
|
skip_counter = 0
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Trying induction in step %d.." % (step))
|
2015-10-13 17:18:38 -05:00
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
if smt_check_sat() == "sat":
|
2015-10-13 17:18:38 -05:00
|
|
|
if step == 0:
|
2018-02-23 12:33:30 -06:00
|
|
|
print_msg("Temporal induction failed!")
|
2016-08-30 12:27:42 -05:00
|
|
|
print_anyconsts(num_steps)
|
2016-08-29 06:53:12 -05:00
|
|
|
print_failed_asserts(num_steps)
|
2016-08-29 15:41:45 -05:00
|
|
|
write_trace(step, num_steps+1, '%')
|
|
|
|
|
|
|
|
elif dumpall:
|
2016-08-30 12:27:42 -05:00
|
|
|
print_anyconsts(num_steps)
|
2016-08-29 15:41:45 -05:00
|
|
|
print_failed_asserts(num_steps)
|
|
|
|
write_trace(step, num_steps+1, "%d" % step)
|
2015-10-13 17:18:38 -05:00
|
|
|
|
|
|
|
else:
|
2018-02-23 12:33:30 -06:00
|
|
|
print_msg("Temporal induction successful.")
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "PASSED"
|
2015-10-13 17:18:38 -05:00
|
|
|
break
|
|
|
|
|
2017-02-04 11:17:08 -06:00
|
|
|
elif covermode:
|
|
|
|
cover_expr, cover_desc = get_cover_list(topmod, "state")
|
2017-02-04 14:10:24 -06:00
|
|
|
cover_mask = "1" * len(cover_desc)
|
2017-02-04 11:17:08 -06:00
|
|
|
|
|
|
|
if len(cover_expr) > 1:
|
|
|
|
cover_expr = "(concat %s)" % " ".join(cover_expr)
|
|
|
|
elif len(cover_expr) == 1:
|
|
|
|
cover_expr = cover_expr[0]
|
|
|
|
else:
|
|
|
|
cover_expr = "#b0"
|
|
|
|
|
|
|
|
coveridx = 0
|
|
|
|
smt.write("(define-fun covers_0 ((state |%s_s|)) (_ BitVec %d) %s)" % (topmod, len(cover_desc), cover_expr))
|
|
|
|
|
|
|
|
step = 0
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "FAILED"
|
2017-02-04 14:22:17 -06:00
|
|
|
found_failed_assert = False
|
2017-02-04 11:17:08 -06:00
|
|
|
|
|
|
|
assert step_size == 1
|
|
|
|
|
|
|
|
while step < num_steps:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_state(step)
|
|
|
|
smt_assert_consequent("(|%s_u| s%d)" % (topmod, step))
|
|
|
|
smt_assert_antecedent("(|%s_h| s%d)" % (topmod, step))
|
|
|
|
smt_assert_consequent(get_constr_expr(constr_assumes, step))
|
2017-02-04 11:17:08 -06:00
|
|
|
|
|
|
|
if step == 0:
|
2017-08-04 10:09:08 -05:00
|
|
|
if noinit:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, step))
|
2017-08-04 10:09:08 -05:00
|
|
|
else:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_assert_antecedent("(|%s_i| s0)" % (topmod))
|
|
|
|
smt_assert_antecedent("(|%s_is| s0)" % (topmod))
|
2017-02-04 11:17:08 -06:00
|
|
|
|
|
|
|
else:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, step-1, step))
|
|
|
|
smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, step))
|
2017-02-04 11:17:08 -06:00
|
|
|
|
2017-02-04 14:10:24 -06:00
|
|
|
while "1" in cover_mask:
|
2017-02-04 11:17:08 -06:00
|
|
|
print_msg("Checking cover reachability in step %d.." % (step))
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_push()
|
2018-02-26 04:58:44 -06:00
|
|
|
smt_assert("(distinct (covers_%d s%d) #b%s)" % (coveridx, step, "0" * len(cover_desc)))
|
2017-02-04 11:17:08 -06:00
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
if smt_check_sat() == "unsat":
|
|
|
|
smt_pop()
|
2017-02-04 11:17:08 -06:00
|
|
|
break
|
|
|
|
|
2017-02-25 16:41:40 -06:00
|
|
|
if append_steps > 0:
|
|
|
|
for i in range(step+1, step+1+append_steps):
|
|
|
|
print_msg("Appending additional step %d." % i)
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_state(i)
|
|
|
|
smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, i))
|
|
|
|
smt_assert_consequent("(|%s_u| s%d)" % (topmod, i))
|
|
|
|
smt_assert_antecedent("(|%s_h| s%d)" % (topmod, i))
|
|
|
|
smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, i-1, i))
|
|
|
|
smt_assert_consequent(get_constr_expr(constr_assumes, i))
|
2017-02-25 16:41:40 -06:00
|
|
|
print_msg("Re-solving with appended steps..")
|
2018-11-04 07:41:28 -06:00
|
|
|
if smt_check_sat() == "unsat":
|
|
|
|
print("%s Cannot appended steps without violating assumptions!" % smt.timestamp())
|
|
|
|
found_failed_assert = True
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "FAILED"
|
2018-11-04 07:41:28 -06:00
|
|
|
break
|
2017-02-25 16:41:40 -06:00
|
|
|
|
2017-02-04 11:17:08 -06:00
|
|
|
reached_covers = smt.bv2bin(smt.get("(covers_%d s%d)" % (coveridx, step)))
|
2017-02-04 14:10:24 -06:00
|
|
|
assert len(reached_covers) == len(cover_desc)
|
|
|
|
|
|
|
|
new_cover_mask = []
|
2017-02-04 11:17:08 -06:00
|
|
|
|
|
|
|
for i in range(len(reached_covers)):
|
|
|
|
if reached_covers[i] == "0":
|
2017-02-04 14:10:24 -06:00
|
|
|
new_cover_mask.append(cover_mask[i])
|
2017-02-04 11:17:08 -06:00
|
|
|
continue
|
|
|
|
|
2017-02-04 14:10:24 -06:00
|
|
|
print_msg("Reached cover statement at %s in step %d." % (cover_desc[i], step))
|
|
|
|
new_cover_mask.append("0")
|
2017-02-04 11:17:08 -06:00
|
|
|
|
2017-02-04 14:22:17 -06:00
|
|
|
cover_mask = "".join(new_cover_mask)
|
|
|
|
|
2017-02-26 04:06:26 -06:00
|
|
|
for i in range(step+1+append_steps):
|
2017-02-04 14:22:17 -06:00
|
|
|
if print_failed_asserts(i, extrainfo=" (step %d)" % i):
|
|
|
|
found_failed_assert = True
|
|
|
|
|
2017-02-25 16:41:40 -06:00
|
|
|
write_trace(0, step+1+append_steps, "%d" % coveridx)
|
2017-02-04 11:17:08 -06:00
|
|
|
|
2017-02-04 14:22:17 -06:00
|
|
|
if found_failed_assert:
|
|
|
|
break
|
2017-02-04 11:17:08 -06:00
|
|
|
|
2017-02-04 14:10:24 -06:00
|
|
|
coveridx += 1
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_pop()
|
2017-02-04 14:10:24 -06:00
|
|
|
smt.write("(define-fun covers_%d ((state |%s_s|)) (_ BitVec %d) (bvand (covers_%d state) #b%s))" % (coveridx, topmod, len(cover_desc), coveridx-1, cover_mask))
|
|
|
|
|
2017-02-04 14:22:17 -06:00
|
|
|
if found_failed_assert:
|
|
|
|
break
|
|
|
|
|
2017-02-04 14:10:24 -06:00
|
|
|
if "1" not in cover_mask:
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "PASSED"
|
2017-02-04 11:17:08 -06:00
|
|
|
break
|
|
|
|
|
|
|
|
step += 1
|
2016-08-22 10:27:43 -05:00
|
|
|
|
2017-02-04 14:10:24 -06:00
|
|
|
if "1" in cover_mask:
|
|
|
|
for i in range(len(cover_mask)):
|
|
|
|
if cover_mask[i] == "1":
|
|
|
|
print_msg("Unreached cover statement at %s." % cover_desc[i])
|
|
|
|
|
2017-02-04 11:17:08 -06:00
|
|
|
else: # not tempind, covermode
|
2015-12-20 02:58:54 -06:00
|
|
|
step = 0
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "PASSED"
|
2015-12-20 02:58:54 -06:00
|
|
|
while step < num_steps:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_state(step)
|
|
|
|
smt_assert_consequent("(|%s_u| s%d)" % (topmod, step))
|
|
|
|
smt_assert_antecedent("(|%s_h| s%d)" % (topmod, step))
|
|
|
|
smt_assert_consequent(get_constr_expr(constr_assumes, step))
|
2015-10-13 17:18:38 -05:00
|
|
|
|
|
|
|
if step == 0:
|
2017-08-04 10:09:08 -05:00
|
|
|
if noinit:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, step))
|
2017-08-04 10:09:08 -05:00
|
|
|
else:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_assert_antecedent("(|%s_i| s0)" % (topmod))
|
|
|
|
smt_assert_antecedent("(|%s_is| s0)" % (topmod))
|
2015-10-13 17:18:38 -05:00
|
|
|
|
|
|
|
else:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, step-1, step))
|
|
|
|
smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, step))
|
2015-10-13 17:18:38 -05:00
|
|
|
|
2015-10-13 18:27:55 -05:00
|
|
|
if step < skip_steps:
|
|
|
|
if assume_skipped is not None and step >= assume_skipped:
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Skipping step %d (and assuming pass).." % (step))
|
2018-02-26 04:58:44 -06:00
|
|
|
smt_assert("(|%s_a| s%d)" % (topmod, step))
|
|
|
|
smt_assert(get_constr_expr(constr_asserts, step))
|
2015-10-13 18:27:55 -05:00
|
|
|
else:
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Skipping step %d.." % (step))
|
2015-12-20 02:58:54 -06:00
|
|
|
step += 1
|
2015-10-13 18:27:55 -05:00
|
|
|
continue
|
|
|
|
|
2015-12-20 02:58:54 -06:00
|
|
|
last_check_step = step
|
|
|
|
for i in range(1, step_size):
|
|
|
|
if step+i < num_steps:
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_state(step+i)
|
|
|
|
smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, step+i))
|
|
|
|
smt_assert_consequent("(|%s_u| s%d)" % (topmod, step+i))
|
|
|
|
smt_assert_antecedent("(|%s_h| s%d)" % (topmod, step+i))
|
|
|
|
smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, step+i-1, step+i))
|
|
|
|
smt_assert_consequent(get_constr_expr(constr_assumes, step+i))
|
2015-12-20 02:58:54 -06:00
|
|
|
last_check_step = step+i
|
|
|
|
|
2016-08-24 15:09:50 -05:00
|
|
|
if not gentrace:
|
2017-07-06 19:47:30 -05:00
|
|
|
if presat:
|
|
|
|
if last_check_step == step:
|
|
|
|
print_msg("Checking assumptions in step %d.." % (step))
|
|
|
|
else:
|
|
|
|
print_msg("Checking assumptions in steps %d to %d.." % (step, last_check_step))
|
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
if smt_check_sat() == "unsat":
|
2019-10-03 07:59:07 -05:00
|
|
|
print("%s Assumptions are unsatisfiable!" % smt.timestamp())
|
|
|
|
retstatus = "PREUNSAT"
|
2017-07-06 19:47:30 -05:00
|
|
|
break
|
|
|
|
|
2016-08-27 15:04:15 -05:00
|
|
|
if not final_only:
|
|
|
|
if last_check_step == step:
|
2017-07-07 04:52:25 -05:00
|
|
|
print_msg("Checking assertions in step %d.." % (step))
|
2016-08-27 15:04:15 -05:00
|
|
|
else:
|
2017-07-07 04:52:25 -05:00
|
|
|
print_msg("Checking assertions in steps %d to %d.." % (step, last_check_step))
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_push()
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2018-02-26 04:58:44 -06:00
|
|
|
smt_assert("(not (and %s))" % " ".join(["(|%s_a| s%d)" % (topmod, i) for i in range(step, last_check_step+1)] +
|
2016-08-27 15:04:15 -05:00
|
|
|
[get_constr_expr(constr_asserts, i) for i in range(step, last_check_step+1)]))
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
if smt_check_sat() == "sat":
|
2016-08-27 15:04:15 -05:00
|
|
|
print("%s BMC failed!" % smt.timestamp())
|
2016-11-22 14:21:13 -06:00
|
|
|
if append_steps > 0:
|
|
|
|
for i in range(last_check_step+1, last_check_step+1+append_steps):
|
|
|
|
print_msg("Appending additional step %d." % i)
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_state(i)
|
|
|
|
smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, i))
|
|
|
|
smt_assert_consequent("(|%s_u| s%d)" % (topmod, i))
|
|
|
|
smt_assert_antecedent("(|%s_h| s%d)" % (topmod, i))
|
|
|
|
smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, i-1, i))
|
|
|
|
smt_assert_consequent(get_constr_expr(constr_assumes, i))
|
2019-03-13 13:27:17 -05:00
|
|
|
print_msg("Re-solving with appended steps..")
|
|
|
|
if smt_check_sat() == "unsat":
|
|
|
|
print("%s Cannot appended steps without violating assumptions!" % smt.timestamp())
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "FAILED"
|
2019-03-13 13:27:17 -05:00
|
|
|
break
|
2016-08-30 12:27:42 -05:00
|
|
|
print_anyconsts(step)
|
2016-08-29 06:53:12 -05:00
|
|
|
for i in range(step, last_check_step+1):
|
|
|
|
print_failed_asserts(i)
|
2016-11-22 14:21:13 -06:00
|
|
|
write_trace(0, last_check_step+1+append_steps, '%')
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "FAILED"
|
2016-08-27 15:04:15 -05:00
|
|
|
break
|
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_pop()
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2016-09-24 13:40:22 -05:00
|
|
|
if (constr_final_start is not None) or (last_check_step+1 != num_steps):
|
|
|
|
for i in range(step, last_check_step+1):
|
2018-02-26 04:58:44 -06:00
|
|
|
smt_assert("(|%s_a| s%d)" % (topmod, i))
|
|
|
|
smt_assert(get_constr_expr(constr_asserts, i))
|
2016-08-24 15:09:50 -05:00
|
|
|
|
2016-08-27 07:30:36 -05:00
|
|
|
if constr_final_start is not None:
|
|
|
|
for i in range(step, last_check_step+1):
|
|
|
|
if i < constr_final_start:
|
|
|
|
continue
|
|
|
|
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Checking final constraints in step %d.." % (i))
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_push()
|
2016-08-27 07:30:36 -05:00
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_assert_consequent(get_constr_expr(constr_assumes, i, final=True))
|
2018-02-26 04:58:44 -06:00
|
|
|
smt_assert("(not %s)" % get_constr_expr(constr_asserts, i, final=True))
|
2016-08-27 07:30:36 -05:00
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
if smt_check_sat() == "sat":
|
2016-08-27 07:30:36 -05:00
|
|
|
print("%s BMC failed!" % smt.timestamp())
|
2016-08-30 12:27:42 -05:00
|
|
|
print_anyconsts(i)
|
2016-08-29 06:53:12 -05:00
|
|
|
print_failed_asserts(i, final=True)
|
2016-08-29 15:41:45 -05:00
|
|
|
write_trace(0, i+1, '%')
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "FAILED"
|
2016-08-27 07:30:36 -05:00
|
|
|
break
|
|
|
|
|
2018-02-23 12:33:30 -06:00
|
|
|
smt_pop()
|
2016-08-27 07:30:36 -05:00
|
|
|
if not retstatus:
|
|
|
|
break
|
|
|
|
|
2016-09-02 05:09:09 -05:00
|
|
|
else: # gentrace
|
2016-08-27 07:30:36 -05:00
|
|
|
for i in range(step, last_check_step+1):
|
2018-02-26 04:58:44 -06:00
|
|
|
smt_assert("(|%s_a| s%d)" % (topmod, i))
|
|
|
|
smt_assert(get_constr_expr(constr_asserts, i))
|
2016-08-24 15:09:50 -05:00
|
|
|
|
2016-09-05 18:40:31 -05:00
|
|
|
print_msg("Solving for step %d.." % (last_check_step))
|
2018-02-23 12:33:30 -06:00
|
|
|
if smt_check_sat() != "sat":
|
2016-08-24 15:09:50 -05:00
|
|
|
print("%s No solution found!" % smt.timestamp())
|
2019-10-03 07:59:07 -05:00
|
|
|
retstatus = "FAILED"
|
2016-08-24 15:09:50 -05:00
|
|
|
break
|
2015-12-20 02:58:54 -06:00
|
|
|
|
2016-08-29 15:41:45 -05:00
|
|
|
elif dumpall:
|
2016-08-30 12:27:42 -05:00
|
|
|
print_anyconsts(0)
|
2016-08-29 15:41:45 -05:00
|
|
|
write_trace(0, last_check_step+1, "%d" % step)
|
|
|
|
|
2015-12-20 02:58:54 -06:00
|
|
|
step += step_size
|
2015-10-13 10:17:23 -05:00
|
|
|
|
2017-11-27 10:42:32 -06:00
|
|
|
if gentrace and retstatus:
|
2016-08-30 12:27:42 -05:00
|
|
|
print_anyconsts(0)
|
2016-08-29 15:41:45 -05:00
|
|
|
write_trace(0, num_steps, '%')
|
2016-08-24 15:09:50 -05:00
|
|
|
|
2015-10-13 10:17:23 -05:00
|
|
|
|
|
|
|
smt.write("(exit)")
|
|
|
|
smt.wait()
|
|
|
|
|
2019-10-03 07:59:07 -05:00
|
|
|
print_msg("Status: %s" % retstatus)
|
|
|
|
sys.exit(0 if retstatus == "PASSED" else 1)
|