caravel/gds
R. Timothy Edwards d882f42803
Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90)
* Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds.
This commit does the following:
(1) Corrects the xschem simple_por schematic to separate the 1.8V and 3.3V grounds.
(2) Corrects the xschem simple_por symbol to separate the 1.8V and 3.3V grounds.
(3) Corrects the xschem testbench to connect to both grounds of simple_por.
(4) Corrects the simple_por layout to remove the 1.8V logic from the
    3.3V ground and connect it instead to the 1.8V ground.
(5) Extends the top-level power routing of caravel and caravan to
    make a better connection to the simple_por 1.8V ground.
(6) Adds an LVS script to properly check the simple_por layout against the
    xschem-generated schematic netlist.

NOTE: None of these modifications change the function of any circuit.  The
1.8V and 3.3V ground nets are only logically separated in the netlists but
share the substrate.  This fix cleanly defines the 1.8V and 3.3V grounds
within the simple_por, where they were previously mingled.  It also ensures
that the full LVS for caravel and caravan can now include the simple_por at
the transistor level and still pass.

* Updated the GDS of simple_por (previously did not remove GDS_FILE
from the .mag file and so it just overwrote the original GDS file
with itself).

* Corrected a route to simple_por in the top level of both caravel
and caravan that was shorting to the extra metals put on top of
the substrate contact across the top (bottom, in the top level)
of the simple_por layout.
2022-05-08 22:51:29 -07:00
..
advSeal_6um_gen.gds.gz add files for seal ring 2021-12-01 22:35:39 -08:00
antenna_on_gds.tcl adding user_project_wrapper empty files -- gds & lef 2021-12-16 13:56:36 -08:00
caravan.gds.gz [DATA] Add caravan layout 2021-11-22 23:10:25 +02:00
caravel.gds.gz updates to top level caravel (#59) 2022-04-08 09:31:33 -07:00
caravel_clocking.gds.gz [DATA] Update caravel_clocking 2021-12-07 13:36:56 +02:00
chip_io.gds.gz [DATA] Update chip_io_alt.gds to match the mag view 2021-12-09 22:15:05 +02:00
chip_io_alt.gds.gz [DATA] Update chip_io_alt.gds to match the mag view 2021-12-09 22:15:05 +02:00
digital_pll.gds.gz [DATA] Update digital_pll 2021-12-07 13:19:02 +02:00
drc_on_gds.tcl adding user_project_wrapper empty files -- gds & lef 2021-12-16 13:56:36 -08:00
gds2mag-all.sh adding user_project_wrapper empty files -- gds & lef 2021-12-16 13:56:36 -08:00
gpio_control_block.gds.gz gpio_control_block constrains fix (#69) 2022-04-15 11:50:54 -07:00
gpio_logic_high.gds.gz Update gpio_control_block 2021-11-05 16:54:55 +02:00
housekeeping.gds.gz [DATA] Update caravel_clocking/digital_pll/housekeeping 2021-12-02 21:09:43 +02:00
mgmt_protect.gds.gz Mgmt protect update (#58) 2022-04-08 09:29:49 -07:00
mgmt_protect_hv.gds.gz [DATA] Update GDS views for the chip_io/chip_io_alt/mgmt_protect_hv/mgmt_protect to match the mag view 2021-12-07 14:28:29 +02:00
mprj2_logic_high.gds.gz [DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz 2021-11-15 15:50:43 +02:00
mprj_logic_high.gds.gz [DATA] Update mgmt_protect pin placement 2021-11-19 01:33:11 +02:00
simple_por.gds.gz Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) 2022-05-08 22:51:29 -07:00
spare_logic_block.gds.gz [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00
user_analog_project_wrapper.gds.gz [DATA] Add user_analog_project_wrapper and chip_io_alt gds/lef views 2021-11-22 23:08:25 +02:00
user_analog_project_wrapper_empty.gds.gz gpio_control_block constrains fix (#69) 2022-04-15 11:50:54 -07:00
user_project_wrapper.gds.gz [DATA] Add digital user project wrapper 2021-11-17 13:13:11 +02:00
user_project_wrapper_empty.gds.gz adding user_project_wrapper empty files -- gds & lef 2021-12-16 12:29:35 -08:00
xres_buf.gds.gz [DATA] Add views for xres_buf 2021-11-15 18:07:02 +02:00