manarabdelaty 8b1c5df909 [DATA] Update caravel_clocking module (timing clean)		2021-11-25 15:23:01 +02:00
..
caravan.v	Updated caravan with the same addition of four spare logic blocks	2021-11-24 17:10:05 -05:00
caravel.v	Added spare logic block to caravel layout and verilog GL, wired	2021-11-24 16:50:22 -05:00
caravel_clocking.v	[DATA] Update caravel_clocking module (timing clean)	2021-11-25 15:23:01 +02:00
chip_io.v	[DATA] Add chip_io views with the fixed clamped3 pad	2021-11-17 16:42:36 +02:00
digital_pll.v	[DATA] Update digital_pll pin placement to have it align with the HK	2021-11-19 01:28:40 +02:00
gpio_control_block.v	[DATA] Update gpio_control_block (li1 used 2um)	2021-11-20 14:43:20 +02:00
gpio_defaults_block.v	Update gpio_defaults_block to align the pins with the gpio_control_block	2021-11-05 23:27:32 +02:00
gpio_logic_high.v	harden gpio_control_block	2021-11-04 16:19:12 +02:00
housekeeping.v	[DATA] Update HK views (timing clean)	2021-11-25 12:54:22 +02:00
mgmt_protect.v	[DATA] Update mgmt_protect (removed all li1 routing )	2021-11-19 13:11:18 +02:00
mgmt_protect_hv.v	[DATA] Add views for the mgmt_protect	2021-11-15 13:21:52 +02:00
mprj2_logic_high.v	[DATA] Add views for the mgmt_protect	2021-11-15 13:21:52 +02:00
mprj_logic_high.v	[DATA] Add views for the mgmt_protect	2021-11-15 13:21:52 +02:00
spare_logic_block.v	[DATA] Add spare_logic_block	2021-11-24 20:36:23 +02:00
user_id_programming.v	[DATA] Add gds/lef/maglef/gl views for the user_id_programming block	2021-11-15 18:17:32 +02:00
xres_buf.v	[DATA] Add views for xres_buf	2021-11-15 18:07:02 +02:00