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riscv
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caravel
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https://github.com/efabless/caravel.git
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84c97b74b2
caravel
/
verilog
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Tim Edwards
84c97b74b2
Corrected the instance names in the layout so that they once again
...
correspond to what the script gen_gpio_defaults.py is looking for.
2021-11-29 19:57:33 -05:00
..
dv
Update storage testbench to work with one 2K block
2021-11-12 17:14:21 +02:00
gl
[DATA] Update caravel_clocking module (timing clean)
2021-11-25 15:23:01 +02:00
rtl
Corrected the instance names in the layout so that they once again
2021-11-29 19:57:33 -05:00
stubs
[DATA] Add spare_logic_block
2021-11-24 20:36:23 +02:00