caravel/openlane
manarabdelaty 581a22de6a [DATA] Update mgmt_protect (removed all li1 routing ) 2021-11-19 13:11:18 +02:00
..
caravel [DATA] Add initial caravel layout 2021-11-19 01:37:10 +02:00
caravel_clocking [DATA] Update caravel_clocking module floorplan 2021-11-19 01:26:29 +02:00
chip_io [DATA] Add chip_io views with the fixed clamped3 pad 2021-11-17 16:42:36 +02:00
digital_pll [DATA] Update digital_pll pin placement to have it align with the HK 2021-11-19 01:28:40 +02:00
gpio_control_block Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency 2021-11-05 18:36:43 +02:00
gpio_defaults_block Update gpio_defaults_block to align the pins with the gpio_control_block 2021-11-05 23:27:32 +02:00
gpio_logic_high harden gpio_control_block 2021-11-04 16:19:12 +02:00
housekeeping [DATA] Update HK pin placement 2021-11-19 01:30:14 +02:00
mgmt_protect [DATA] Update mgmt_protect (removed all li1 routing ) 2021-11-19 13:11:18 +02:00
mprj2_logic_high [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
mprj_logic_high [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
user_id_programming [DATA] Add gds/lef/maglef/gl views for the user_id_programming block 2021-11-15 18:17:32 +02:00
user_project_wrapper [DATA] Add digital user project wrapper 2021-11-17 13:13:11 +02:00
.gitignore [DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz 2021-11-15 15:50:43 +02:00
Makefile [DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz 2021-11-15 15:50:43 +02:00
chip_dimensions.txt [DATA] Add initial caravel layout 2021-11-19 01:37:10 +02:00