Passant
827044b4db
+ add timing models for caravel macros: `caravel_core` - `housekeeping` - `caravel_clocking`
2023-04-20 13:10:02 -07:00
Passant
13e89cccff
~ update `caravel_clocking` STA signoff
2023-04-20 12:57:22 -07:00
mo-hosni
77669e899e
reharden `caravel_clocking`.
2023-03-26 02:40:56 -07:00
mo-hosni
86612d1f08
reharden caravel_clocking.
2023-02-27 10:26:19 -08:00
jeffdi
a5e8b239aa
remove pt signoff reports from main due to size
2022-11-19 14:25:36 -08:00
kareem
7e3a33f9d7
chore: add self-review for 3 blocks:
...
* gpio_control_block
* digital_pll
* caravel_clocking
2022-11-01 06:24:08 -07:00
Marwan Abbas
1f17e7a03f
removed old csv and log files
2022-10-26 14:40:30 +02:00
passant5
e067e558a3
update `digital_pll` and `caravel_clocking` sdc pll clocks constraints ( #293 )
...
* update pll clocks period constraint to `11.76ns (85MHz)` instead of `6.6667ns (150 MHz)`
* update sdcs Rev and date
2022-10-21 07:45:56 -07:00
Passant
59cdcf471d
remove `./spef` and `./sdf` directories at the top-level
...
add them to `./signoff/openlane-signoff/` as they are generated from openlane
2022-10-19 14:59:36 -07:00
Passant
8297906630
add signoff results for `caravel_clocking`:
...
- signoff summary report
- DRC and LVS reports
- STA timing reports for all corners
- generated lib files for all corners
- generated sdf files for all corners
2022-10-19 07:03:39 -07:00
kareem
3bd586b50c
reharden: caravel_clocking
...
~ increase height for more spread decap insertion
+ add or cells to cell exclude
~ adjust pdn to have an offset half to pitch
~ change placement density in accordance to area
~ change padding to allow for space for decap insertion
2022-10-18 06:18:30 -07:00
passant5
df2cd63152
Re-implemented Macros generated libs ( #251 )
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* move `gpio_control_block` libs to `./signoff/<design_name>/standalone_pvr/primetime-signoff/lib/`
* add generated libs for `housekeeping`
* add generated lib for `caravel_clocking`
* add generated libs for `digital_pll`
* add generated libs for `mgmt_protect`
2022-10-15 18:30:46 -07:00
passant5
9e1b6610d1
Merge pull request #234 from efabless/openlane-runs-config
...
+ add caravel_clocking & digital_pl & gpio_control_block openlane runs config.tcl file
2022-10-14 23:47:44 +02:00
kareem
ea6badcd67
+ add caravel_clocking & digital_pl & gpio_control_block openlane run config.tcl file
2022-10-14 14:28:47 -07:00
Passant
f69a522f19
update script to get the signoff sdc from directory `./signoff/<design name>/<design name>.sdc`
2022-10-14 13:57:16 -07:00
kareem
aadfb57609
reharden: caravel_clocking
...
~ align pdn with top level
~ move spefs and sdfs output corners to signoff/*/openlane-signoff
2022-10-14 05:24:49 -07:00
kareem
c922241c3f
reharden: caravel_clocking
...
+ add custom interactive script to insert a buffer on user_clk output
and have a large buffer on core_clk
~ change pdn config to match top level
~ change sdc
~ change openlane configuration
2022-10-13 10:54:04 -07:00
Passant
78cec109cc
add signoff sdc dir
...
move sdc generated from openlane to signoff/<design name>/openlane-signoff
rearrange spef directory with RC corners spefs
2022-10-12 07:28:32 -07:00
manarabdelaty
bd88221d17
[DATA] Update caravel_clocking
2021-12-07 13:36:56 +02:00
manarabdelaty
aa766f9144
[DATA] Update caravel_clocking module
2021-12-05 19:44:28 +02:00
manarabdelaty
ef1019b62a
[DATA] Update caravel_clocking
2021-12-02 22:50:20 +02:00
manarabdelaty
0067bd5b7c
[DATA] Update caravel_clocking/digital_pll/housekeeping
2021-12-02 21:09:43 +02:00
manarabdelaty
8b1c5df909
[DATA] Update caravel_clocking module (timing clean)
2021-11-25 15:23:01 +02:00
manarabdelaty
1c18c1dae9
[DATA] Update caravel
2021-11-20 17:28:59 +02:00
manarabdelaty
37fb2d6766
[DATA] update caravel_clocking module (removed long li1 routes, in total it used 8um from li1)
2021-11-20 13:07:23 +02:00
manarabdelaty
64bdd6230d
[DATA] Update caravel_clocking module floorplan
2021-11-19 01:26:29 +02:00
manarabdelaty
72b2c724c9
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00