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caravel
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400 Commits

Author SHA1 Message Date
Marwan Abbas bbb6bf775c
Caravel redesign new top (#300) 
* reharden: caravel

~ shift caravel_clocking due to change in size
~ change the pr boundary of caravel_power_routing mag file
~ regenarate lef of caravel_power_routing

* update pdn for `caravel_clocking` & `digital_pll`

* added script to update and generate the power routing views

* ~ run update_power_routing_views from the caravel root with prboundary

* fix output message

* added power routing lef, mag and gds

* fix update_power_routing_views saving wrong cell name

* reharden: caravel

~ incorperate pdn changes
~ re-extract spefs

* fix caravel_power_routing views

* fix abs path in maglef views

* fix abs path in mag views
add substcut layers in gpio_control_block and mgmt_protect

* generate a new chip_io gds

* regenerate gpio_control_block due to mag and gds not in sync

* reharden: caravel

~ change config to pass clean routing
~ use updated views of macros

* lvs clean views

* add caravel top-level generated sdf for all corners

* fix absolute path for mgmt_core_wrapper

Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: Bassant Hassan <bassant.hassan@efabless.com>
 2022-10-18 17:24:07 -07:00
M0stafaRady 9d1e4b35d7
Merge pull request #298 from efabless/cocotb-dev 
cocotb - update script to store git info in the run git_show.log
 2022-10-19 00:45:09 +02:00
M0stafaRady 340f776e46 cocotb - update script to store git info in the run git_show.log 2022-10-18 12:27:42 -07:00
Marwan Abbas 4b9df5271b
Merge pull request #287 from efabless/cocotb-dev 
cocotb - ziping passed waves instead of removing them and fix bug at debug test
 2022-10-18 17:15:50 +02:00
Marwan Abbas 38902bde45
Merge pull request #292 from efabless/caravel-redesign-digital_pll-decaps 
reharden: digital_pll
 2022-10-18 16:35:49 +02:00
Marwan Abbas 4cbf8ca4f6
Merge pull request #291 from efabless/caravel-redesign-clocking-decaps 
reharden: caravel_clocking
 2022-10-18 16:35:26 +02:00
kareem 68063ddadc reharden: digital_pll 
~ increase width for more spread decaps
+ add or cells to cell exclude
~ change placement density in accordance to area
~ change padding to allow for space for decaps
 2022-10-18 07:07:32 -07:00
kareem fdeb6003f3 Merge branch 'caravel_redesign-digital_pll-no-or' into caravel_redesign 2022-10-18 06:31:00 -07:00
kareem 3bd586b50c reharden: caravel_clocking 
~ increase height for more spread decap insertion
+ add or cells to cell exclude
~ adjust pdn to have an offset half to pitch
~ change placement density in accordance to area
~ change padding to allow for space for decap insertion
 2022-10-18 06:18:30 -07:00
mo-hosni 1110ae2fe8 update housekeeping views and openlane configuration 2022-10-18 04:07:27 -07:00
M0stafaRady 2a05ee19ae cocotb - fix bug at debug test for gate level 2022-10-18 03:49:45 -07:00
M0stafaRady d444c279b0 Merge branch 'caravel_redesign' into cocotb-dev 2022-10-18 03:46:47 -07:00
M0stafaRady 13c2f299d0 cocotb - update script to keep the test log when test pass 2022-10-18 03:12:58 -07:00
M0stafaRady c7df730c0a cocotb - ziping passed waves instead of removing them 2022-10-18 02:56:31 -07:00
kareem 712b784e16 reharden!: digital_pll 
~ disable or gate
+ add nosynth list file
 2022-10-17 12:33:25 -07:00
Mohamed Shalan 3fbc52ecbf
Merge pull request #276 from efabless/caravel_redesign-digital_pll-fanout 
reharden!: digital_pll
 2022-10-17 20:50:01 +02:00
mo-hosni 2d147966b9 Update housekeeping views and openlane configuration 2022-10-17 11:37:24 -07:00
kareem e5d9788a43 reharden!: digital_pll 
~ enable synth buffering to fix fanout
~ add *buf_1* to no synth list
~ add attribute (* keep *) to the oscillator as dont
touch for yosys

!need to verify that the oscillator remains untouched
 2022-10-17 10:56:01 -07:00
Passant 9c3fea9a4d update caravel top-level rtl to not buffer `porb_h` through the `mgmt_core_wrapper` 2022-10-17 10:46:31 -07:00
M0stafaRady 0f174d897f
Merge pull request #269 from efabless/cocotb 
cocotb - fix debug test
 2022-10-17 18:01:24 +02:00
M0stafaRady cf1519b929 cocotb - add debug test to regression lists 2022-10-17 08:57:20 -07:00
M0stafaRady b5234b269f fix debug test 2022-10-17 08:29:39 -07:00
M0stafaRady 4bbf9938c9
Merge pull request #266 from efabless/cocotb-dev 
Cocotb - add delay at the test mgmt_gpio_bidir test
 2022-10-17 16:47:11 +02:00
M0stafaRady 55eaf936b0 Cocotb - add delay at the test mgmt_gpio_bidir test 2022-10-17 04:35:29 -07:00
kareem a8794dff4b reharden: caravel 
~ reharden with updated pdn
~ add stubs for non functional blocks
 2022-10-17 03:59:28 -07:00
M0stafaRady de11170ab2 fix syntax error at gl/gpio_signal_buffering.v 2022-10-17 00:55:12 -07:00
marwaneltoukhy 2d28c973ee added views for caravel with power routing 2022-10-16 19:08:56 -07:00
marwaneltoukhy 7ec1eeb010 Merge branch 'caravel_redesign' into caravel_redesign-top-level 2022-10-16 18:39:39 -07:00
Marwan Abbas 35ec52aa72
Merge pull request #260 from efabless/fix_top_buffers_again 
More changes to the GPIO buffer cell
 2022-10-17 03:35:25 +02:00
Tim Edwards 9f54b2ecec Added a gate-level version of gpio_signal_buffering derived from 
the RTL, but cleaned up for macro definitions;  this can be used
for LVS.  The decap cells were hand-edited in because there is
no way to devine them from the RTL source.
 2022-10-16 21:20:12 -04:00
Tim Edwards 69d353f65c Corrected the verilog and the layout for the caravan version of the 
signal buffering (verilog was missing one of the buffers, and the
layout had some of the labels at the top accidentally erased).
 2022-10-16 21:06:27 -04:00
Marwan Abbas 37d2a9d463 connected rest of buffers to power 2022-10-17 01:15:46 +02:00
kareem 2409207178 reharden: caravel 
~ add non functional blocks - like caravel_motto
 2022-10-16 15:44:27 -07:00
Marwan Abbas 04a55c695f
Merge pull request #252 from efabless/fix_top_buffers_again 
Adjustments to the top level buffering cells
 2022-10-16 23:38:13 +02:00
kareem 704f19b6c7 reharden: caravel 
~ correct placement for spare_logic_block
~ add changes from buffering macro
 2022-10-16 12:56:41 -07:00
Marwan Abbas 4a7031c479
Merge pull request #258 from efabless/cocotb 
Cocotb tests and script updates
 2022-10-16 19:10:49 +02:00
kareem 2a3493ed65 Merge branch 'fix_top_buffers_again' into caravel_redesign-top-level 2022-10-16 10:03:54 -07:00
M0stafaRady 0542485ae9 remove file buff_flash_clkrst.nl.v 2022-10-16 09:57:54 -07:00
M0stafaRady 8526aadd4a Revert "remove unpowered netlist" 
This reverts commit dd482cb099.
 2022-10-16 09:56:24 -07:00
Tim Edwards c5e7c67d60 Once again. . . Rewrote the RTL verilog so that only signals 
being buffered pass through the buffer macros.  Removed the
straight-through signals from the layout, and renumbered the
vectors in the buffer cells, which no longer match the numbering
at the top level (unfortunately).
 2022-10-16 12:49:44 -04:00
kareem fc0701003c reharden: caravel 
- based on second iteration of the buffer macro
- change config with updated placement of spare logic macros
and power routing cell
 2022-10-16 06:58:46 -07:00
M0stafaRady 8aaeb5bad8 rearrange testlist to test most number of features as quickly as possible 2022-10-16 05:43:04 -07:00
mo-hosni 22dde425ac add mgmt_protect views and openlane files 2022-10-16 03:14:55 -07:00
M0stafaRady 55671cded1 fix bug at bit bang tests 2022-10-15 18:10:33 -07:00
Passant dd482cb099 remove unpowered netlist 2022-10-15 13:46:21 -07:00
M0stafaRady aac5408dfe initial version of debug test 2022-10-15 11:40:39 -07:00
M0stafaRady fb1259dd56 Fix gpio control block access in gatelevel 2022-10-15 09:30:11 -07:00
kareem 5d5d019ea1 Revert "add buff_flash_clkrst" 
This reverts commit 2675487322.
 2022-10-15 08:47:02 -07:00
mo-hosni 2675487322 add buff_flash_clkrst 2022-10-15 06:38:42 -07:00
M0stafaRady 2794932853 Merge branch 'caravel_redesign' into cocotb 2022-10-15 04:37:47 -07:00