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caravel
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459 Commits

Author SHA1 Message Date
mo-hosni 725698014a reharden caravel_core after fixing an issue in the RTL of RAM256. 2023-02-28 05:51:06 -08:00
mo-hosni 7fdcd0d930 add missing GLs. 2023-02-27 11:44:04 -08:00
mo-hosni 7c6e956221 reharden caravel using the modified chip_io. 2023-02-27 11:19:33 -08:00
mo-hosni 25e96c9d62 reharden caravel. 2023-02-27 10:39:51 -08:00
mo-hosni 9be48c6a7b implementation of caravel_core. 2023-02-27 10:38:06 -08:00
mo-hosni e560b56db5 reharden spare_logic_block. 2023-02-27 10:37:00 -08:00
mo-hosni 3f29ea49e7 harden mprj_io_buffer. 2023-02-27 10:33:48 -08:00
mo-hosni 5f8e954d95 reharden gpio_logic_high. 2023-02-27 10:29:46 -08:00
mo-hosni 86612d1f08 reharden caravel_clocking. 2023-02-27 10:26:19 -08:00
mo-hosni 7067304fd9 Added manual_power_connections. 2023-02-27 08:15:35 -08:00
mo-hosni 0952575c9d Add empty_macro which acts as a placement obstruction. 2023-02-27 08:14:55 -08:00
mo-hosni 8d6cfe6e2b reharden gpio_defaults_block. Changed the power stripes to be on Metal3. 2023-02-27 07:34:33 -08:00
mo-hosni 50a762407b re-implementation of housekeeping. Fixed maximum transition and antenna violations. 2023-02-27 07:30:03 -08:00
Passant b463e533ec update caravel rtl/hierarchy: 
+ add `mprj_io_buffer` module that is used to guide the router and buffer signals going to the IOs far from the housekeeping
+ add `caravel_core` rtl that includes all the macros of caravel
~ restructure caravel to `caravel_core` and `chip_io` that includes the padframe
~ update `caravel_clocking` rtl to include `porb` input reset signal from power-on-reset
~ update `gpio_control_block` rtl to buffer `serial_clock` and `serial_load` siganls
 2023-02-26 13:43:37 +02:00
Jeff DiCorpo bde8c9ef5e
Merge pull request #391 from efabless/fix_housekeeping_serial_fsm 
Update serial configuration fsm to reset the transfer bit
 2023-01-05 22:19:18 -08:00
Anton Blanchard 25e5e27f9d Fix issues with port definitions 
Caravel fails to build with recent Icarus Verilog versions because some of
the port definitions are not valid.
 2023-01-05 20:53:17 +11:00
M0stafaRady c23af382ae Update serial configuration fsm to reset the transfer bit 2022-11-20 04:27:40 -08:00
Tim Edwards d1f47cc451 Fixes the user defines configuration values for pullup and pulldown 
modes to match the correct ones that are in defs.h in the management
SoC LiteX repository.  See caravel issue #380.
 2022-11-16 09:36:01 -05:00
Jeff DiCorpo 748fbed12e
Merge pull request #377 from d-m-bailey/gpio_doc_fix 
fixed documentation for gpio's used in caravan
 2022-11-15 12:26:11 -08:00
D. Mitch Bailey 2c099c099e fixed documentation for gpio's used in caravan 2022-11-11 08:22:20 -08:00
Kareem Farid 44ffff2811 bugfix: remove extra comma after the last port in the decaps declaration 2022-11-07 13:00:00 +02:00
Kareem Farid d14035d8a2 gpio_signal_buffering rtl decaps 
+ add sky130_ef_sc_hd__decap_12 decaps in the rtl of gpio_signal_buffering
+ add sky130_ef_sc_hd__decap_12 stub file for openlane; there is no
yosys-parseable verilog model for sky130_ef_sc_hd__decap_12
~ change config of gpio_signal_buffering* to add sky130_ef_sc_hd__decap_12
~ regenerate the gl netlist based on the above changes
 2022-11-01 19:16:53 +02:00
M0stafaRady 0da9e78e57 Update cocotb README file to include PDK export requirements 2022-10-30 01:47:46 -07:00
M0stafaRady 1e385b6e23 Merge branch 'main' into cocotb 2022-10-30 01:36:41 -07:00
marwaneltoukhy c824608e25 Merge branch 'main' into caravel_redesign-2 2022-10-28 13:33:35 -07:00
mo-hosni b5010be8a7 Update Openlane views 2022-10-27 09:53:45 -07:00
mo-hosni 2d61e593aa Decreased distances from pins to and gates in mgmt_protect 2022-10-27 08:20:57 -07:00
M0stafaRady 6f92625192 cocotb - update bitbang tests for caravan 2022-10-25 16:30:42 -07:00
M0stafaRady 4bd0f5bec1 Adding bitbang tests to caravan regression 2022-10-25 14:21:18 -07:00
M0stafaRady 693c9e5538 Merge branch 'caravan-signoff' into cocotb 2022-10-25 08:03:15 -07:00
M0stafaRady 745b3e3e2c cocotb - skip write and read from xfer 
because the write reg is diffrent than the read one
 2022-10-25 08:00:51 -07:00
M0stafaRady 83a2e0d6c2 cocotb - remove pll and clock_redirect tests from caravan regression 
because gpio 15 and 16 are used as analog bins and tests used them for redirect
increase the timeout for mgmt_gpio_bidir test
 2022-10-24 13:16:38 -07:00
Marwan Abbas 18d779f5cd removed caravel-eco.v gl netlist and added the eco for porb_h_in in caravel.v 2022-10-24 17:58:50 +02:00
M0stafaRady add686f220 cocotb add gl and sdf regression for caravan 2022-10-24 08:27:27 -07:00
M0stafaRady 655232b37d merge with main 2022-10-24 07:51:16 -07:00
M0stafaRady a507c7ddd3 cocotb - update verify_cocotb to run caravan with vcs 2022-10-24 07:46:33 -07:00
M0stafaRady 45978f5304 cocotb - Adding cpu_reset test 2022-10-24 06:39:34 -07:00
M0stafaRady 425b59249d cocotb - Fix timeout of all tests 2022-10-24 04:59:04 -07:00
M0stafaRady 0d30276afa cocotb - fix include of vcs rtl code to enable the coverage for RTL 2022-10-23 08:13:17 -07:00
M0stafaRady 523fa3a5bb
cooctb- update gpio tests for caravan (#341) 
* update gpio tests for caravan

* cocotb - Add gpio caravan tests
 2022-10-22 12:14:25 -07:00
R. Timothy Edwards 30d35947f1
Added decap cells to the gate-level verilog for the (#343) 
gpio_signal_buffering_alt cell (caravan chip).  This was
previously done for gpio_signal_buffering (caravel chip) but
the same thing had not previously been done for caravan.
 2022-10-22 12:12:06 -07:00
M0stafaRady 8051e22ad2 cocotb - Add gpio caravan tests 2022-10-22 11:09:23 -07:00
M0stafaRady 900e66a804 update gpio tests for caravan 2022-10-22 11:04:04 -07:00
marwaneltoukhy 66b7293817 signoff views for caravan 2022-10-22 07:01:29 -07:00
kareem 0be31a26c1 reharden: caravan 
~ reimplement after rtl changes
 2022-10-22 02:52:02 -07:00
R. Timothy Edwards d9260dc533
Fixes to caravan for LVS and ERC (#330) 
* Corrected missing part of porb_h route in the caravan chip_io_alt
layout.  Correcting the indexing of the "mprj_io_one" connections
to "mgmt_io_oeb" on the left-hand side of caravan, as they were
connecting back to the right side and making a mess of wiring,
instead of being wired locally directly to the nearest I/O.

* Apply automatic changes to Manifest and README.rst

* Corrected the unconnected mgmt_io_in inputs to housekeeping on
the caravan chip (which correspond to the GPIOs that do not exist
in caravan) by connecting them to the "zero" outputs of the
closest GPIO control blocks.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
 2022-10-21 14:28:53 -07:00
Marwan Abbas 7db65f3e32
Added gl netlists for chip_io_alt and gpio_signal_buffering_alt (#327) 2022-10-21 12:06:20 -07:00
passant5 0c9e3a08fd
update caravel with tying `porb_h_in` with `por_l_in` (#326) 
* update caravel with tying `porb_h_in` with `por_l_in` at the `mgmt_core_wrapper` in the top-level layout:
- `porb_h_in` shouldn't be left floating as it is an input to `clkbuf_16`

* add caravel-eco.gds (same as caravel.gds)
 2022-10-21 11:52:00 -07:00
R. Timothy Edwards 5029d71df6
Syntax changes that are non-functional from a synthesis perspective. (#324) 
* Syntax changes that are non-functional from a synthesis perspective.
There are a few errors that are caught by commercial tools and halt
synthesis, which are handled more gracefully by the open source
tool flow.  In housekeeping.v:  Some wires declared after they are
used.  In housekeeping_spi.v:  A non-blocking "=" assignment used
where a blocking "<-" assignment was intended.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
 2022-10-21 10:10:20 -07:00
M0stafaRady 096f5035f5
cocotb - updates related to enable simulating caraval using iverilog (#320) 
* cocotb - updates related to enable simulating caraval using iverilog

* Apply automatic changes to Manifest and README.rst

Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>
 2022-10-21 07:43:34 -07:00