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SOFA
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594 Commits 16 Branches 1 Tag 1.8 GiB
Commit Graph

39 Commits

Author SHA1 Message Date
Lalit Sharma 4128f4cd1b Enabling custom yosys script only for and gate design, will enable later for other designs when yosys submodule is updated 2021-01-07 01:15:41 -08:00
Lalit Sharma 847d0ec8f6 Adding io_reg related simple design 2021-01-06 23:24:34 -08:00
Lalit Sharma 9b3cd1f5ff Updating task template file by calling synth_quicklogic inside yosys 2021-01-06 23:19:20 -08:00
Tarachand Pagarani 1a4b1bc6b4 Disable generation of formal verification testbench due to disk space 
limitation on github actions.
Disable testcase not fitting on 32x32 device
 2021-01-05 19:44:08 -08:00
Tarachand Pagarani cbe50535ca further changes in architecture to make io interfaces routable 2020-12-28 08:35:17 -08:00
Tarachand Pagarani 353207693a 1. added 32x32 fabric key\n 2. disable shift register packing due to routability failure\n 3. Disable IIR design due to routabiity failure in shift register mode\n 4. revert changes to QLSOFA architecture 2020-12-26 23:29:13 -08:00
Tarachand Pagarani 1aa0ef68e4 incoporated changes based on feedback from xifan 2020-12-24 23:05:47 -08:00
Tarachand Pagarani 01fabc65cc added a new architecture with LUT4, Soft adder and cross local routing with 24 clb inputs and feedback 2020-12-21 07:13:38 -08:00
Tarachand Pagarani 8d5036f108 commented/corrected failing benchmarks 2020-12-17 05:46:30 -08:00
Tarachand Pagarani c264ee0ddd add more benchmark tests 2020-12-17 02:17:20 -08:00
Tarachand Pagarani b556cf452c add tasks for 32x32 configuration 2020-12-17 01:40:19 -08:00
tangxifan 930f7ec486 [Script] Remove task run for redundant architectures 2020-12-02 17:56:58 -07:00
tangxifan 147dd8d606 [Script] Add task run for custom cell FPGA architectures 2020-12-01 20:22:16 -07:00
tangxifan 0eb1b68bee [Script] Increase routing chan width from 40 to 60 for version 1.2 2020-12-01 10:17:47 -07:00
tangxifan 6a12cdbad1 [Script] Add task run for the architecture with both reset and soft adders 2020-11-27 18:15:05 -07:00
tangxifan e5a66dd47f [Script] Add task run for softadder architecture 2020-11-27 16:14:14 -07:00
tangxifan 28c8dba87b [Script] Bug fix in task configuration files 2020-11-27 15:05:35 -07:00
tangxifan 91edfb8e02 [Script] Add task run for the architecture with reset 2020-11-27 14:45:00 -07:00
tangxifan e8abcc64bb [Script] Add and2_or2 benchmark to the testbench generation script for 12x12 HD FPGA 2020-11-22 13:34:53 -07:00
tangxifan a5a92d719a [Script] Remove benchmarks which cannot fit from task-run 2020-11-20 15:44:30 -07:00
tangxifan ce188bbe2c [Script] Add benchmarks to openfpga testbench generator task-run 2020-11-20 15:35:57 -07:00
tangxifan b07a156432 [Script] Deploy more testing benchmarks to the OpenFPGA testbench generation task 2020-11-20 15:10:29 -07:00
tangxifan 86bb530709 [Script] Update openfpga task-run script to use the adhoc simulation settings tuned for Caravel SoC 2020-11-17 15:03:10 -07:00
tangxifan 0e2ee8a0cc [Script] Add benchmarks to OpenFPGA task run 2020-11-17 14:01:48 -07:00
tangxifan 39aa11c42c [Script] Update OpenFPGA task run configuration for pre-pnr files 2020-11-17 13:46:25 -07:00
tangxifan efda8e0f73 [Script] Update task run configuration in output directory 2020-11-17 13:21:26 -07:00
tangxifan 46171472a7 [Script] Rename output directory for netlsit generation 2020-11-13 17:47:38 -07:00
tangxifan 6344bb420d [Script] Remove out-of-data task run 2020-11-13 09:47:32 -07:00
tangxifan d3ae847f43 [Script] Add openfpga task for 12x12 fabric fit caravel SoC 2020-11-11 15:20:01 -07:00
tangxifan 72db7fc7c0 [Script] Adapt openfpga task-run configuration to use the fabric key scripts 2020-11-08 11:47:08 -07:00
tangxifan bbdd13ac16 [Script] Add openfpga task run for caravel architecture 2020-11-05 10:25:23 -07:00
tangxifan 0958d9c50f [Script] Add openfpga task run for embedded architecture 2020-11-02 20:09:35 -07:00
tangxifan 163108c2c5 [Script] Add openfpga task for non-adder k4 arch 2020-10-24 11:49:41 -06:00
tangxifan b466a1394d [Script] Add openfpga task run scripts for new architecture 2020-10-14 09:24:00 -06:00
tangxifan 28b56d2462 [Script] Update openfpga shell script and tasks for customized fabric netlist location 2020-10-12 14:43:50 -06:00
tangxifan 0d031cf868 [Script] Add openfpga task for sdc generation and nda sclib FPGA 2020-10-10 20:20:44 -06:00
tangxifan 241221959a [Script] Bug fix in task config file 2020-10-10 11:41:51 -06:00
tangxifan 3479502ab7 [Script] Update task template for testbench generation 2020-10-10 11:32:52 -06:00
tangxifan abe56ce2c2 [Script] Rename openfpga task directory to avoid name conflicts in OpenFPGA task directory 2020-10-10 11:06:28 -06:00