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add more benchmark tests

This commit is contained in:
Tarachand Pagarani 2020-12-17 02:17:20 -08:00
parent cfdaedcdd0
commit c264ee0ddd
1 changed files with 27 additions and 1 deletions
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28
SCRIPT/skywater_openfpga_task/k4_N8_reset_softadder_caravel_cc_fdhd_32x32/generate_testbench/config/task_template.conf
View File

@ -39,6 +39,19 @@ bench5=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/rs_decoder/rtl/rs_decoder.v
bench6=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/simon_bit_serial/rtl/*.v
bench7=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/and2_or2/and2_or2.v
bench8=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/cavlc_top/rtl/*.v
bench9=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/cf_fft_256_8/rtl/*.v
bench10=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/counter120bitx5/rtl/*.v
bench11=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/counter_16bit/rtl/*.v
bench12=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/dct_mac/rtl/*.v
bench13=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/des_perf/rtl/*.v
bench14=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/diffeq_f_systemC/rtl/*.v
bench15=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/i2c_master_top/rtl/*.v
bench16=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/iir/rtl/*.v
bench17=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/jpeg_qnr/rtl/*.v
bench18=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/multi_enc_decx2x4/rtl/*.v
bench19=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/sdc_controller/rtl/*.v
bench20=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/sha256/rtl/*.v
bench21=${SKYWATER_OPENFPGA_HOME}/BENCHMARK/unsigned_mult_80/rtl/*.v
[SYNTHESIS_PARAM]
bench0_top = and2
@ -50,7 +63,20 @@ bench4_top = routing_test
bench5_top = rs_decoder_top
bench6_top = top_module
bench7_top = and2_or2
bench7_top = cavlc_top
bench8_top = cavlc_top
bench9_top = cf_fft_256_8
bench10_top = counter120bitx5
bench11_top = top
bench12_top = dct_mac
bench13_top = des_perf
bench14_top = diffeq_f_systemC
bench15_top = i2c_master_top
bench16_top = iir
bench17_top = jpeg_qnr
bench18_top = multi_enc_decx2x4
bench19_top = sdc_controller
bench20_top = sha256
bench21_top = unsigned_mult_80
[SCRIPT_PARAM_MIN_ROUTE_CHAN_WIDTH]
#end_flow_with_test=