OpenFPGA/openfpga/src/base
tangxifan 0bee70bee6 finish memory bank configuration protocol support. 2020-06-11 19:31:13 -06:00
..
basic_command.cpp add read_openfpga_arch to OpenFPGA shell 2020-01-23 19:10:53 -07:00
basic_command.h add read_openfpga_arch to OpenFPGA shell 2020-01-23 19:10:53 -07:00
io_location_map.cpp build io location map 2020-02-26 19:58:18 -07:00
io_location_map.h add io location map data structure and start porting verilog testbench generator 2020-02-26 17:10:57 -07:00
netlist_manager.cpp plug in netlist manager and now the include_netlist appears in one unique file 2020-04-23 20:42:11 -06:00
netlist_manager.h plug in netlist manager and now the include_netlist appears in one unique file 2020-04-23 20:42:11 -06:00
netlist_manager_fwd.h add netlist manager data structure 2020-04-23 18:59:09 -06:00
openfpga_bitstream.cpp add fabric bitstream data structure and deploy it to Verilog testbench generation 2020-06-11 19:31:10 -06:00
openfpga_bitstream.h add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_bitstream_command.cpp add fabric bitstream writer 2020-04-21 12:02:10 -06:00
openfpga_bitstream_command.h start working on repack 2020-02-17 17:57:43 -07:00
openfpga_build_fabric.cpp add frame-based memory module builder 2020-06-11 19:31:09 -06:00
openfpga_build_fabric.h add fabric hierarchy writer 2020-06-11 19:31:04 -06:00
openfpga_context.h add fabric bitstream data structure and deploy it to Verilog testbench generation 2020-06-11 19:31:10 -06:00
openfpga_flow_manager.cpp fix bugs in flow manager on default compress routing problems 2020-03-22 15:26:15 -06:00
openfpga_flow_manager.h fix bugs in flow manager on default compress routing problems 2020-03-22 15:26:15 -06:00
openfpga_interconnect_types.h make grid module builder online; basic support on physical tiles 2020-02-13 15:27:16 -07:00
openfpga_link_arch.cpp add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_link_arch.h add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_lut_truth_table_fixup.cpp add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_lut_truth_table_fixup.h add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_naming.cpp finish memory bank configuration protocol support. 2020-06-11 19:31:13 -06:00
openfpga_naming.h finish memory bank configuration protocol support. 2020-06-11 19:31:13 -06:00
openfpga_pb_pin_fixup.cpp add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_pb_pin_fixup.h add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_read_arch.cpp add advanced check in configurable memories 2020-06-11 19:31:09 -06:00
openfpga_read_arch.h add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_repack.cpp Critical patch on repacking about wire LUT support. 2020-04-19 16:42:31 -06:00
openfpga_repack.h add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_reserved_words.h add configuration protocol ports to top module for memory bank organization 2020-06-11 19:31:13 -06:00
openfpga_sdc.cpp add verbose output option to configure port disable timing writer 2020-06-11 19:31:07 -06:00
openfpga_sdc.h use constant openfpga context in SDC generator 2020-06-11 19:31:07 -06:00
openfpga_sdc_command.cpp add verbose output option to configure port disable timing writer 2020-06-11 19:31:07 -06:00
openfpga_sdc_command.h bring pnr sdc generator online and fixed minor bugs in bitstream writing 2020-02-28 11:14:50 -07:00
openfpga_setup_command.cpp add --depth option to fabric hierarchy writer 2020-06-11 19:31:04 -06:00
openfpga_setup_command.h add read_openfpga_arch to OpenFPGA shell 2020-01-23 19:10:53 -07:00
openfpga_title.cpp fix memory leakage in openfpga title 2020-04-07 16:14:41 -06:00
openfpga_title.h fix memory leakage in openfpga title 2020-04-07 16:14:41 -06:00
openfpga_verilog.cpp add fast configuration option to fpga_verilog to speed up full testbench simulation 2020-06-11 19:31:12 -06:00
openfpga_verilog.h add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_verilog_command.cpp add fast configuration option to fpga_verilog to speed up full testbench simulation 2020-06-11 19:31:12 -06:00
openfpga_verilog_command.h bring fpga verilog create directory online 2020-02-15 20:38:45 -07:00
openfpga_write_gsb.cpp add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00
openfpga_write_gsb.h add exit codes to command execution in shell context 2020-04-08 16:18:05 -06:00