riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

make grid module builder online; basic support on physical tiles

This commit is contained in:
tangxifan 2020-02-13 15:27:16 -07:00
parent 59d579425e
commit 072965cd64
10 changed files with 1173 additions and 55 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
openfpga/src/base/openfpga_build_fabric.cpp
View File

@ -61,6 +61,7 @@ void build_fabric(OpenfpgaContext& openfpga_context,
const Command& cmd, const CommandContext& cmd_context) {
CommandOptionId opt_compress_routing = cmd.option("compress_routing");
CommandOptionId opt_duplicate_grid_pin = cmd.option("duplicate_grid_pin");
CommandOptionId opt_verbose = cmd.option("verbose");
if (true == cmd_context.option_enable(cmd, opt_compress_routing)) {
@ -70,7 +71,8 @@ void build_fabric(OpenfpgaContext& openfpga_context,
VTR_LOG("\n");
openfpga_context.mutable_module_graph() = build_device_module_graph(g_vpr_ctx.device(),
const_cast<const OpenfpgaContext&>(openfpga_context));
const_cast<const OpenfpgaContext&>(openfpga_context),
cmd_context.option_enable(cmd, opt_duplicate_grid_pin));
}
} /* end namespace openfpga */

7
openfpga/src/base/openfpga_interconnect_types.h
View File

@ -10,6 +10,13 @@ enum e_pin2pin_interc_type {
NUM_PIN2PIN_INTERC_TYPES
};
enum e_circuit_pb_port_type {
CIRCUIT_PB_PORT_INPUT,
CIRCUIT_PB_PORT_OUTPUT,
CIRCUIT_PB_PORT_CLOCK,
NUM_CIRCUIT_PB_PORT_TYPES
};
} /* end namespace openfpga */
#endif

42
openfpga/src/base/openfpga_naming.cpp
View File

@ -11,6 +11,7 @@
#include "openfpga_side_manager.h"
#include "pb_type_utils.h"
#include "circuit_library_utils.h"
#include "openfpga_reserved_words.h"
#include "openfpga_naming.h"
/* begin namespace openfpga */
@ -1116,7 +1117,9 @@ std::string generate_grid_block_instance_name(const std::string& prefix,
}
/*********************************************************************
* Generate the module name of a physical block
* Generate the module name of a logical block type (pb_type)
* Since the logical block does not carry any physical attributes,
* this logical block will have a common prefix 'logical_type'
* To ensure a unique name for each physical block inside the graph of complex blocks
* (pb_graph_nodes), this function trace backward to the top-level node
* in the graph and add the name of these parents
@ -1126,8 +1129,7 @@ std::string generate_grid_block_instance_name(const std::string& prefix,
* TODO: to make sure the length of this name does not exceed the size of
* chars in a line of a file!!!
**********************************************************************/
std::string generate_physical_block_module_name(const std::string& prefix,
t_pb_type* physical_pb_type) {
std::string generate_physical_block_module_name(t_pb_type* physical_pb_type) {
std::string module_name(physical_pb_type->name);
t_pb_type* parent_pb_type = physical_pb_type;
@ -1164,7 +1166,7 @@ std::string generate_physical_block_module_name(const std::string& prefix,
}
/* Add the prefix */
module_name = prefix + module_name;
module_name = LOGICAL_MODULE_NAME_PREFIX + module_name;
return module_name;
}
@ -1173,37 +1175,9 @@ std::string generate_physical_block_module_name(const std::string& prefix,
/*********************************************************************
* Generate the instance name for physical block with a given index
**********************************************************************/
std::string generate_physical_block_instance_name(const std::string& prefix,
t_pb_type* pb_type,
std::string generate_physical_block_instance_name(t_pb_type* pb_type,
const size_t& index) {
std::string instance_name = generate_physical_block_module_name(prefix, pb_type);
/* Add index to the name */
instance_name += std::string("_");
instance_name += std::to_string(index);
return instance_name;
}
/*********************************************************************
* This function is a wrapper for the function generate_physical_block_module_name()
* which can automatically decode the io_side and add a prefix
**********************************************************************/
std::string generate_grid_physical_block_module_name(const std::string& prefix,
t_pb_type* pb_type,
const e_side& border_side) {
std::string module_name_prefix = generate_grid_block_prefix(prefix, border_side);
return generate_physical_block_module_name(module_name_prefix, pb_type);
}
/*********************************************************************
* Generate the instance name for physical block in Grid with a given index
**********************************************************************/
std::string generate_grid_physical_block_instance_name(const std::string& prefix,
t_pb_type* pb_type,
const e_side& border_side,
const size_t& index) {
std::string module_name_prefix = generate_grid_block_prefix(prefix, border_side);
std::string instance_name = generate_physical_block_module_name(module_name_prefix, pb_type);
std::string instance_name = generate_physical_block_module_name(pb_type);
/* Add index to the name */
instance_name += std::string("_");
instance_name += std::to_string(index);

16
openfpga/src/base/openfpga_naming.h
View File

@ -219,23 +219,11 @@ std::string generate_grid_block_instance_name(const std::string& prefix,
const e_side& io_side,
const vtr::Point<size_t>& grid_coord);
std::string generate_physical_block_module_name(const std::string& prefix,
t_pb_type* physical_pb_type);
std::string generate_physical_block_module_name(t_pb_type* physical_pb_type);
std::string generate_physical_block_instance_name(const std::string& prefix,
t_pb_type* pb_type,
std::string generate_physical_block_instance_name(t_pb_type* pb_type,
const size_t& index);
std::string generate_grid_physical_block_module_name(const std::string& prefix,
t_pb_type* pb_type,
const e_side& border_side);
std::string generate_grid_physical_block_instance_name(const std::string& prefix,
t_pb_type* pb_type,
const e_side& border_side,
const size_t& index);
e_side find_grid_border_side(const vtr::Point<size_t>& device_size,
const vtr::Point<size_t>& grid_coordinate);

4
openfpga/src/base/openfpga_reserved_words.h
View File

@ -10,9 +10,13 @@
/* begin namespace openfpga */
namespace openfpga {
/* IO PORT */
/* Prefix of global input, output and inout ports of FPGA fabric */
constexpr char* GIO_INOUT_PREFIX = "gfpga_pad_";
/* Grid naming constant strings */
constexpr char* GRID_MODULE_NAME_PREFIX = "grid_";
constexpr char* LOGICAL_MODULE_NAME_PREFIX = "logical_tile_";
/* Memory naming constant strings */
constexpr char* GRID_MEM_INSTANCE_PREFIX = "mem_";

14
openfpga/src/fabric/build_device_module.cpp
View File

@ -14,7 +14,7 @@
#include "build_lut_modules.h"
#include "build_wire_modules.h"
#include "build_memory_modules.h"
//#include "build_grid_modules.h"
#include "build_grid_modules.h"
//#include "build_routing_modules.h"
//#include "build_top_module.h"
#include "build_device_module.h"
@ -27,7 +27,8 @@ namespace openfpga {
* for a FPGA fabric
*******************************************************************/
ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
const OpenfpgaContext& openfpga_ctx) {
const OpenfpgaContext& openfpga_ctx,
const bool& duplicate_grid_pin) {
vtr::ScopedStartFinishTimer timer("Build fabric module graph");
/* Module manager to be built */
@ -67,9 +68,12 @@ ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
openfpga_ctx.arch().config_protocol.type());
/* Build grid and programmable block modules */
//build_grid_modules(module_manager, arch.spice->circuit_lib, mux_lib,
// arch.sram_inf.verilog_sram_inf_orgz->type, sram_model,
// TRUE == vpr_setup.FPGA_SPICE_Opts.duplicate_grid_pin);
build_grid_modules(module_manager, vpr_device_ctx,
openfpga_ctx.vpr_device_annotation(),
openfpga_ctx.arch().circuit_lib,
openfpga_ctx.mux_lib(),
openfpga_ctx.arch().config_protocol.type(),
sram_model, duplicate_grid_pin);
//if (TRUE == vpr_setup.FPGA_SPICE_Opts.compact_routing_hierarchy) {
// build_unique_routing_modules(module_manager, L_device_rr_gsb, arch.spice->circuit_lib,

3
openfpga/src/fabric/build_device_module.h
View File

@ -15,7 +15,8 @@
namespace openfpga {
ModuleManager build_device_module_graph(const DeviceContext& vpr_device_ctx,
const OpenfpgaContext& openfpga_ctx);
const OpenfpgaContext& openfpga_ctx,
const bool& duplicate_grid_pin);
} /* end namespace openfpga */

1
openfpga/src/fabric/build_grid_module_duplicated_pins.cpp
View File

@ -157,6 +157,7 @@ void add_grid_module_net_connect_duplicated_pb_graph_pin(ModuleManager& module_m
*/
size_t grid_pin_index = pb_graph_pin->pin_count_in_cluster
+ child_instance * grid_type_descriptor->num_pins / grid_type_descriptor->capacity;
int pin_width = grid_type_descriptor->pin_height_offset[grid_pin_index];
int pin_height = grid_type_descriptor->pin_height_offset[grid_pin_index];
for (const e_side& side : grid_pin_sides) {

1107
openfpga/src/fabric/build_grid_modules.cpp Normal file
View File

File diff suppressed because it is too large Load Diff

30
openfpga/src/fabric/build_grid_modules.h Normal file
View File

@ -0,0 +1,30 @@
#ifndef BUILD_GRID_MODULES_H
#define BUILD_GRID_MODULES_H
/********************************************************************
* Include header files that are required by function declaration
*******************************************************************/
#include "vpr_context.h"
#include "vpr_device_annotation.h"
#include "module_manager.h"
#include "mux_library.h"
/********************************************************************
* Function declaration
*******************************************************************/
/* begin namespace openfpga */
namespace openfpga {
void build_grid_modules(ModuleManager& module_manager,
const DeviceContext& device_ctx,
const VprDeviceAnnotation& device_annotation,
const CircuitLibrary& circuit_lib,
const MuxLibrary& mux_lib,
const e_config_protocol_type& sram_orgz_type,
const CircuitModelId& sram_model,
const bool& duplicate_grid_pin);
} /* end namespace openfpga */
#endif