Baudouin Chauviere
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4f386de2ef
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gen_xxx functions create mem-leaks because the mem is dynamically allocated inside and not freed. TBD later everywhere
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2019-05-06 17:25:29 -06:00 |
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Baudouin Chauviere
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7ddfe60721
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Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
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2019-05-06 16:12:52 -06:00 |
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Baudouin Chauviere
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3b62f8e024
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Conversion from s to ns for the loop breaking delays
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2019-05-06 16:12:30 -06:00 |
BaudouinChauviere
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cd4dc8b2e8
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Delete read_xml_arch_file.c
Already present in SRC
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2019-05-06 12:55:18 -06:00 |
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Baudouin Chauviere
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a5a1a376ab
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Modified code for cleaner delay naming convention
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2019-05-06 12:52:49 -06:00 |
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Baudouin Chauviere
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e7b1d89985
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Change syntax name for loop_breaker_delay_before/after which is more explicit
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2019-05-06 12:25:26 -06:00 |
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Baudouin Chauviere
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7c257ebda7
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Fix on the makefile which was not targetting the right folder
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2019-05-06 12:21:53 -06:00 |
tangxifan
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43af38d150
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Fixing travis for MacOS
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2019-05-03 23:43:46 -06:00 |
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tangxifan
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324056e3e6
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keep fixing travis
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2019-05-03 23:32:39 -06:00 |
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tangxifan
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b04c6b8c31
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bug fix on Makefile and travis
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2019-05-03 23:24:08 -06:00 |
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tangxifan
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c5ef99f6d4
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update travis
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2019-05-03 23:18:31 -06:00 |
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tangxifan
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6e6ae1cc3d
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fixed bugs in CMakeLists.txt and Makefile
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2019-05-03 23:03:04 -06:00 |
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tangxifan
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ab32773464
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Update CMakelist for yosys to support -j
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2019-05-03 21:13:00 -06:00 |
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tangxifan
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e5a18b7cca
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Add CMakeSupport, TODO: create CMAKE support for yosys
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2019-05-03 19:04:02 -06:00 |
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tangxifan
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4e3487b691
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Add latest abc and update ace dependence
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2019-05-03 18:56:03 -06:00 |
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tangxifan
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70b66e0799
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Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
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2019-05-03 14:22:20 -06:00 |
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Baudouin Chauviere
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7860042276
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added before after loop breaker constraining
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2019-05-03 14:00:06 -06:00 |
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tangxifan
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11cf30b239
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Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
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2019-05-03 11:54:35 -06:00 |
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tangxifan
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5a97e3e602
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update Makefile t
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2019-05-03 11:48:41 -06:00 |
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Baudouin Chauviere
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4e330ee463
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Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
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2019-05-03 10:43:22 -06:00 |
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Baudouin Chauviere
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921b694400
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Bug fix sdc breaking loop of edges outside current interconnect
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2019-05-03 10:42:35 -06:00 |
AurelienUoU
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42f20eda60
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Add the user matching for internal register in formal verification script generation
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2019-05-03 10:24:02 -06:00 |
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tangxifan
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974af5a2ae
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Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
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2019-04-30 14:30:38 -06:00 |
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tangxifan
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42daadee2f
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critical bug fixing
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2019-04-30 14:30:17 -06:00 |
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Baudouin Chauviere
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1ab4688339
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Create no segment constraint in loop_breaker if none is given by user
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2019-04-30 12:30:07 -06:00 |
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tangxifan
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c46c0fc97d
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bug fixing for SDC generator
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2019-04-26 14:07:44 -06:00 |
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tangxifan
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46d44fa42a
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Update VPR7 X2P with new engine
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2019-04-26 12:23:47 -06:00 |
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tangxifan
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e2e4a9287d
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keep bug fixing in Makefiles and remove parallism in Make
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2019-04-10 16:10:19 +08:00 |
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tangxifan
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7c42119481
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Keep bug fixing for travis
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2019-04-10 16:00:03 +08:00 |
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tangxifan
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d10c329c8a
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Correct .travis.yml typos
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2019-04-10 15:34:39 +08:00 |
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tangxifan
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f1290ff7b9
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correct travis errors
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2019-04-10 15:29:39 +08:00 |
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tangxifan
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5c46e4aabf
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add missing files for Travis
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2019-04-10 15:24:37 +08:00 |
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tangxifan
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8eeb144f32
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Streamline Makefile and Travis for Mac OS
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2019-04-10 15:22:20 +08:00 |
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tangxifan
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b330fb4bb7
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Add Travis support for Mac OS Mojave
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2019-04-10 11:51:12 +08:00 |
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BaudouinChauviere
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cb34ac0243
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Update sc_flow.rst
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2019-04-01 16:30:31 -06:00 |
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BaudouinChauviere
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361bbc13e3
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Update func_verify.rst
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2019-04-01 16:29:42 -06:00 |
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BaudouinChauviere
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a176bf3a19
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Update file_organization.rst
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2019-04-01 16:28:48 -06:00 |
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BaudouinChauviere
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01371ce54d
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Update customize_subckt.rst
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2019-04-01 16:27:06 -06:00 |
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BaudouinChauviere
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1ea7ec3265
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Update spice_simulation.rst
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2019-04-01 16:26:02 -06:00 |
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BaudouinChauviere
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cfdc072164
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Update file_organization.rst
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2019-04-01 16:25:09 -06:00 |
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BaudouinChauviere
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fcc3bf0967
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Update command_line_usage.rst
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2019-04-01 16:23:24 -06:00 |
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BaudouinChauviere
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f4b72bd4e1
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Update link_circuit_modules.rst
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2019-04-01 16:21:59 -06:00 |
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BaudouinChauviere
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ce300c196c
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Update circuit_modules.rst
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2019-04-01 16:13:23 -06:00 |
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BaudouinChauviere
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6e065ef3b3
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Update tech_lib.rst
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2019-04-01 16:09:31 -06:00 |
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BaudouinChauviere
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aed779ca3d
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Update spice_sim_setting.rst
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2019-04-01 16:08:00 -06:00 |
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BaudouinChauviere
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4900caaed9
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Update generality.rst
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2019-04-01 16:04:17 -06:00 |
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BaudouinChauviere
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33df25366c
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Update eda_flow.rst
Correction fix
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2019-04-01 16:02:47 -06:00 |
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BaudouinChauviere
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d6261f1f59
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Update motivation.rst
Typo and better explanations correction
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2019-04-01 15:57:04 -06:00 |
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Baudouin Chauviere
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39f7b0b9a2
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Update of the doc for better fit with the current version
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2019-04-01 11:55:28 -06:00 |
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Baudouin Chauviere
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c4b42726c4
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fixes easing thehandling by the user.
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2019-03-31 07:55:05 -06:00 |