tangxifan
|
687f03fd77
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[test] add a new test to validate clock network on module named by index
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2024-07-30 14:06:53 -07:00 |
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tangxifan
|
b6ff69faac
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[test] reworking the testcase to validate clock network with internal drivers
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2024-07-10 11:36:22 -07:00 |
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tangxifan
|
ad5795bece
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[test] add extra options to route clock rr_graph command in examples
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2024-06-28 13:39:41 -07:00 |
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tangxifan
|
9bb076d892
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[test] fixed a bug on pin mapping of tetbenche
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2024-06-21 20:29:21 -07:00 |
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tangxifan
|
292f4a9273
|
[test] fixed a bug where ace is no required
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2024-06-21 18:43:25 -07:00 |
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tangxifan
|
8d7dba2d57
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[test] add a new testcase to programmable clock network on supporting reset signals
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2024-06-21 18:13:37 -07:00 |
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tangxifan
|
372e386330
|
[test] add new tests to verify rr graph preloading in two file formats
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2024-05-09 23:10:45 -07:00 |
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tangxifan
|
13f8dd096e
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[test] create a new example script for fixed routing W case
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2024-05-07 10:24:15 -07:00 |
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tangxifan
|
00f39d55ab
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[test] now use fixed routing channel width
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2024-05-06 23:32:27 -07:00 |
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tangxifan
|
c334a0a792
|
[test] fixed a bug and add golden outputs
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2024-05-02 22:07:22 -07:00 |
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tangxifan
|
98006608c2
|
[test] add fabric hierarchy file to golden outputs
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2024-05-02 22:03:23 -07:00 |
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tangxifan
|
4e3bbbe45e
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[test] add options to write fabric hierarchy file
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2024-05-02 22:00:47 -07:00 |
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tangxifan
|
9b0a491819
|
[test] now validate no time stamp file for fabric pin physical location
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2024-04-11 15:16:34 -07:00 |
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tangxifan
|
0c680ec426
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[test] now test regex as module name for fabric pin physical location
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2024-04-11 15:01:19 -07:00 |
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tangxifan
|
4dedee4011
|
[test] add a new test case to basic reg test to validate write_fabric_pin_physical_location command
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2024-04-11 12:59:13 -07:00 |
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tangxifan
|
20386945bd
|
[test] add a new testcase to validate dump waveform
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2024-03-29 11:53:55 -07:00 |
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tangxifan
|
5c839c1858
|
[test] debug
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2023-12-08 13:52:52 -08:00 |
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tangxifan
|
8e875f3453
|
[test] add a new test case to validate the new feature
|
2023-11-02 21:08:36 -07:00 |
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tangxifan
|
7d83fc914c
|
[core] ad a new test case
|
2023-10-06 18:31:54 -07:00 |
|
tangxifan
|
5aa206e616
|
[core] fixed some bugs
|
2023-09-25 22:27:24 -07:00 |
|
tangxifan
|
60b8c396dc
|
[test] add a new test
|
2023-09-25 21:25:21 -07:00 |
|
tangxifan
|
0ef1e0bde5
|
[test] add a new test to validate renaming rules
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2023-09-17 13:29:12 -07:00 |
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tangxifan
|
559fa45d89
|
[test] add a new test to validate module renaming using index
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2023-09-16 17:55:52 -07:00 |
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tangxifan
|
253d5fa26c
|
[core] a new test to validate the L shape in homo geneous fpga
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2023-08-11 13:05:46 -07:00 |
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tangxifan
|
0e9cf6e909
|
[test] added a new testcase to validate heterogeneous fpga using group config block
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2023-08-06 22:11:38 -07:00 |
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tangxifan
|
3e33f262bc
|
[test] added a new test to validate group_config_block support when fpga_core wrapper is enabled
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2023-08-06 18:59:24 -07:00 |
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tangxifan
|
b7048d3dc8
|
[test] adding new tests to validate group config block
|
2023-08-03 22:30:41 -07:00 |
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tangxifan
|
65995d7c13
|
[test] add a new testcase to validate the heterogeneous fpga fabric when using tile modules
|
2023-07-27 17:03:02 -07:00 |
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tangxifan
|
46e58a56cb
|
[test] added a new test case to validate clock network when using the tile modules
|
2023-07-27 16:39:48 -07:00 |
|
tangxifan
|
81d699a723
|
[test] added a new testcase to validate carry chain connections in tile modules
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2023-07-27 16:18:30 -07:00 |
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tangxifan
|
e9f2adf3f9
|
[test] add a new testcase to validate carry chain connections when using tile modules
|
2023-07-27 16:06:43 -07:00 |
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tangxifan
|
1ea8a33d4b
|
[test] add a new testcase to validate global tile connections on tile modules
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2023-07-27 15:57:38 -07:00 |
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tangxifan
|
5685fbd5e8
|
[test] adding a new test case to validate the tile modules on 4x4 fabric
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2023-07-26 22:17:39 -07:00 |
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tangxifan
|
0db4ef62e8
|
[test] add a new test for tile-based fabric: using preconfig testbenches
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2023-07-25 15:48:14 -07:00 |
|
tangxifan
|
523cf83cc9
|
[test] disable pnr writer in test cases
|
2023-07-25 15:39:25 -07:00 |
|
tangxifan
|
82fe63297a
|
[test] add a new test for top-left tile grouping
|
2023-07-19 11:22:36 -07:00 |
|
tangxifan
|
270d6f933b
|
[test] add a new testcase to validate mock wrapper
|
2023-06-26 15:26:50 -07:00 |
|
tangxifan
|
919d6d8608
|
[test] added more testcases to validate the dut module option; fixing bugs on preconfigured testbenches
|
2023-06-25 22:49:51 -07:00 |
|
tangxifan
|
962ba67e36
|
[test] adding new tests to validate fpga core wrapper naming rules
|
2023-06-23 14:47:21 -07:00 |
|
tangxifan
|
fd8f371d85
|
[test] add missing file
|
2023-06-19 16:44:11 -07:00 |
|
tangxifan
|
efc9bf9907
|
[test] added new test case to validate bitstream generation
|
2023-06-19 12:40:37 -07:00 |
|
tangxifan
|
97b089ae3c
|
[test] added new testcases to validate fpga core wrapper
|
2023-06-18 21:01:37 -07:00 |
|
tangxifan
|
ac31a20376
|
[test] now bypass clock routing in default example
|
2023-06-08 13:44:22 -07:00 |
|
tangxifan
|
27b8007d1b
|
[test] rework pcf support testcase for mock wrapper
|
2023-05-27 12:45:29 -07:00 |
|
tangxifan
|
b6c90eb99a
|
[core] fixed several bugs which causes bgf and pcf support in mock wrapper failed
|
2023-05-27 12:13:16 -07:00 |
|
tangxifan
|
e1feebc96d
|
[core] fixing bugs on pcf and bgf support for mock efpga wrapper
|
2023-05-26 21:54:08 -07:00 |
|
tangxifan
|
77be053966
|
[test] mock wrapper does not need bitstream forcing
|
2023-05-26 18:50:54 -07:00 |
|
tangxifan
|
7fbe567d4c
|
[test] add more testcases
|
2023-05-25 20:24:02 -07:00 |
|
tangxifan
|
7da7d03db5
|
[script] add example script for mock wrapper
|
2023-05-25 19:59:14 -07:00 |
|
tangxifan
|
40598d25a3
|
[core] fixed a bug which causes multi-clock programmable network failed in routing
|
2023-04-20 15:05:45 +08:00 |