tangxifan
|
dfe1db996a
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[Tool] Remove the hardcoded factor when computing simulation timing; There should be no hidden parameters impacting simulation time
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2021-06-29 09:56:04 -06:00 |
tangxifan
|
87446a14c3
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[Tool] Bug fix for the option ``--embed_bitstream none``
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2021-06-27 19:45:06 -06:00 |
tangxifan
|
991062e9bf
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[Tool] Bug fix
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2021-06-25 15:22:42 -06:00 |
tangxifan
|
90163fab6c
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[Tool] Replace option '--support_icarus_simulator' with a new one '--preload_bitstream <string>'
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2021-06-25 15:06:07 -06:00 |
tangxifan
|
2bb514c51a
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[Tool] Support time unit in writing simulation information file
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2021-06-25 10:33:29 -06:00 |
tangxifan
|
bcc16d732c
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[Tool] Add new option 'testbench_type' so that simulation task can write different information for different testbenches
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2021-06-25 10:10:16 -06:00 |
tangxifan
|
67dec810eb
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[Tool] Remove icarus simulator flag; Reduce the file size of preconfigured fabric wrapper by only output the necessary force/deposit HDL codes
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2021-06-24 17:27:32 -06:00 |
tangxifan
|
549657e1fb
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[Tool] Remove out-of-date flag: INITIAL_SIMULATION from code base
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2021-06-24 17:13:36 -06:00 |
tangxifan
|
5364d8104f
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[Tool] Add signal_init option to preconfigured fabric wrapper writer
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2021-06-24 17:07:41 -06:00 |
tangxifan
|
21d1519658
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[Tool] Remove signal initialization flag; Now the HDL codes will not be outputted unless specified in the option
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2021-06-24 16:56:28 -06:00 |
tangxifan
|
ce3c80f499
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Merge branch 'master' into dev
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2021-06-23 09:15:03 -06:00 |
tangxifan
|
cbbf601edc
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[Tool] Fix a compiler warning due to uninitialized data structure
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2021-06-18 16:20:13 -06:00 |
tangxifan
|
fed975c52a
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[Tool] Add postfix removal support in write_io_mapping command
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2021-06-18 16:13:50 -06:00 |
tangxifan
|
d9d57aad42
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[Tool] Added default net type options to verilog testbench generator command
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2021-06-14 11:37:49 -06:00 |
tangxifan
|
7ade48343c
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[Tool] Deprecate command 'write_verilog_testbench'
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2021-06-09 17:06:01 -06:00 |
tangxifan
|
2299ce3157
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[Tool] Preconfigured testbench writer now supports icarus simulator
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2021-06-09 13:49:25 -06:00 |
tangxifan
|
3bc8e760db
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[Tool] Add '--fabric_netlist' option to 'write_preconfigured_testbench' command
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2021-06-09 11:14:45 -06:00 |
tangxifan
|
89fb672631
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[Tool] Fine-tune the options of 'write_simulation_task_info' to be straightforward to use
|
2021-06-09 10:49:00 -06:00 |
tangxifan
|
97396eda2b
|
[Tool] Add a new command 'write_simulation_task_info'
|
2021-06-08 22:10:02 -06:00 |
tangxifan
|
d2275b971d
|
[Tool] Add a new command 'write_preconfigured_testbench'
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2021-06-08 21:53:51 -06:00 |
tangxifan
|
85679c0fe2
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[Tool] Bug fix in the top testbench switch due to fast configuration
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2021-06-08 21:32:26 -06:00 |
tangxifan
|
8db19c7af9
|
[Tool] Add a new command 'write_preconfigured_fabric_wrapper'
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2021-06-08 21:28:16 -06:00 |
tangxifan
|
5075c68418
|
[Tool] Remove duplicated codes on fast configuration
|
2021-06-08 20:58:04 -06:00 |
tangxifan
|
4aef9d5c96
|
[Tool] Remove redundant codes
|
2021-06-07 21:54:01 -06:00 |
tangxifan
|
366dcff75d
|
[Tool] Now 'write_full_testbench' supports flatten(vanilla) configuration protocol
|
2021-06-07 21:49:31 -06:00 |
tangxifan
|
9808b61b36
|
[Tool] Bug fix on the unfit vector size of bit index register in Verilog testbench in some cases
|
2021-06-07 20:06:39 -06:00 |
tangxifan
|
ba75c18378
|
[Tool] Now 'write_full_testbench' supports memory bank configuration protocol
|
2021-06-07 17:40:07 -06:00 |
tangxifan
|
1a5902ca74
|
[Tool] Bug fix in finding pruned bitstream for frame-based protocol when fast configuration is enabled
|
2021-06-07 14:32:56 -06:00 |
tangxifan
|
af298de121
|
[Tool] Patch bugs in the full testbench writing using external bitstream file for frame-based configuration protocol
|
2021-06-07 13:53:32 -06:00 |
tangxifan
|
d644b8f22d
|
[Tool] Support external bitstream file when generating full testbench for frame-based decoder
|
2021-06-07 11:55:11 -06:00 |
tangxifan
|
618b04568f
|
[Tool] Remove unnecessary new line in bitstream file
|
2021-06-04 20:07:42 -06:00 |
tangxifan
|
cf7addb1a6
|
[Tool] Add heads to bitstream plain text file
|
2021-06-04 19:48:48 -06:00 |
tangxifan
|
70fb3a85dc
|
[Tool] Patch fast configuration in bitstream writing
|
2021-06-04 17:23:10 -06:00 |
tangxifan
|
d98be9f87b
|
[Tool] Remove icarus requirement on vcd writing in Verilog testbenches; Since vcd writing commands are standard Verilog
|
2021-06-04 16:45:00 -06:00 |
tangxifan
|
6e69c2d70a
|
[Tool] Patch fast configuration in full Verilog testbench generator
|
2021-06-04 16:34:55 -06:00 |
tangxifan
|
061f832429
|
[Tool] Enable fast configuration when writing fabric bitstream
|
2021-06-04 16:23:40 -06:00 |
tangxifan
|
81048d3698
|
[Tool] Add option '--fast_configuration' to 'write_full_testbench' command
|
2021-06-04 11:26:39 -06:00 |
tangxifan
|
98308133c1
|
[Tool] Add configuration skip capability to top testbench which loads external bitstream file
|
2021-06-04 11:24:05 -06:00 |
tangxifan
|
adb18d28b8
|
[Tool] Remove unused arguments
|
2021-06-04 10:37:28 -06:00 |
tangxifan
|
67485269d3
|
Merge branch 'master' into testbench_external_bitstream
|
2021-06-03 15:46:25 -06:00 |
tangxifan
|
ae6a46cd60
|
[Tool] Add a new command write_full_testbench which outputs self-testable full testbench which loads external bitstream file; Currently only support configuration chain without fast configuration technique
|
2021-06-03 15:41:11 -06:00 |
tangxifan
|
1fd399736d
|
[Tool] Patch FPGA-SDC to consider time unit in global port timing constraints
|
2021-05-27 10:26:20 -06:00 |
tangxifan
|
c4ecc9ee7c
|
[Tool] Patch data type of report bitstream distribution command-line option
|
2021-05-07 11:44:01 -06:00 |
tangxifan
|
db9bb9124e
|
[Tool] Add report bitstream distribution command to openfpga shell
|
2021-05-07 11:41:25 -06:00 |
tangxifan
|
8728fd9561
|
[Tool] Typo fix to resolve clang errors
|
2021-04-27 15:06:07 -06:00 |
tangxifan
|
c5d36757c6
|
[Tool] Fix typo in io mapping writing
|
2021-04-27 14:39:57 -06:00 |
tangxifan
|
43c1e052ef
|
[Tool] Add a writer to output I/O mapping information to XML files
|
2021-04-27 14:30:16 -06:00 |
tangxifan
|
148da80869
|
[Tool] Add new syntax about physical_pb_port_rotate_offset to support fracturable heterogeneous block mapping between operating modes and physical modes
|
2021-04-24 14:53:29 -06:00 |
tangxifan
|
0709e5bb81
|
[Tool] Fixed a bug in the routing trace finder for direct connections inside repacker
|
2021-04-24 13:27:44 -06:00 |
tangxifan
|
56948244bc
|
[Tool] Patch a critical bug in pb pin fixup
|
2021-04-22 16:19:54 -06:00 |