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[Tool] Bug fix for the option ``--embed_bitstream none``

This commit is contained in:
tangxifan 2021-06-27 19:45:06 -06:00
parent 30027b8c15
commit 87446a14c3
1 changed files with 2 additions and 3 deletions
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5
openfpga/src/fpga_verilog/verilog_preconfig_top_module.cpp
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@ -385,9 +385,8 @@ void print_verilog_preconfig_top_module_load_bitstream(std::fstream &fp,
print_verilog_preconfig_top_module_assign_bitstream(fp, module_manager, top_module,
bitstream_manager,
output_datab_bits);
} else {
/* Use deposit syntax for other simulators */
VTR_ASSERT(EMBEDDED_BITSTREAM_HDL_MODELSIM == embedded_bitstream_hdl_type);
/* Use deposit syntax for other simulators */
} else if (EMBEDDED_BITSTREAM_HDL_MODELSIM == embedded_bitstream_hdl_type) {
print_verilog_preconfig_top_module_deposit_bitstream(fp, module_manager, top_module,
bitstream_manager,
output_datab_bits);