[Tool] Add postfix removal support in write_io_mapping command

This commit is contained in:
tangxifan 2021-06-18 16:13:50 -06:00
parent a07859b567
commit fed975c52a
6 changed files with 28 additions and 7 deletions

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@ -59,6 +59,9 @@ constexpr char* DEFAULT_LB_DIR_NAME = "lb/";
constexpr char* DEFAULT_RR_DIR_NAME = "routing/";
constexpr char* DEFAULT_SUBMODULE_DIR_NAME = "sub_module/";
constexpr char* VPR_BENCHMARK_OUT_PORT_PREFIX = "out:";
constexpr char* OPENFPGA_BENCHMARK_OUT_PORT_PREFIX = "out_";
} /* end namespace openfpga */
#endif

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@ -10,6 +10,7 @@
/* Headers from openfpgautil library */
#include "openfpga_digest.h"
#include "openfpga_reserved_words.h"
/* Headers from fpgabitstream library */
#include "read_xml_arch_bitstream.h"
@ -153,6 +154,11 @@ int write_io_mapping(const OpenfpgaContext& openfpga_ctx,
ModuleId top_module = openfpga_ctx.module_graph().find_module(top_module_name);
VTR_ASSERT(true == openfpga_ctx.module_graph().valid_module_id(top_module));
/* VPR added a prefix to the output ports, remove them here */
std::vector<std::string> prefix_to_remove;
prefix_to_remove.push_back(std::string(VPR_BENCHMARK_OUT_PORT_PREFIX));
prefix_to_remove.push_back(std::string(OPENFPGA_BENCHMARK_OUT_PORT_PREFIX));
IoMap io_map = build_fpga_io_mapping_info(openfpga_ctx.module_graph(),
top_module,
g_vpr_ctx.atom(),
@ -160,7 +166,8 @@ int write_io_mapping(const OpenfpgaContext& openfpga_ctx,
openfpga_ctx.io_location_map(),
openfpga_ctx.vpr_netlist_annotation(),
std::string(),
std::string());
std::string(),
prefix_to_remove);
status = write_io_mapping_to_xml_file(io_map,
cmd_context.option_value(cmd, opt_file),

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@ -37,7 +37,8 @@ IoMap build_fpga_io_mapping_info(const ModuleManager& module_manager,
const IoLocationMap& io_location_map,
const VprNetlistAnnotation& netlist_annotation,
const std::string& io_input_port_name_postfix,
const std::string& io_output_port_name_postfix) {
const std::string& io_output_port_name_postfix,
const std::vector<std::string>& output_port_prefix_to_remove) {
IoMap io_map;
/* Only mappable i/o ports can be considered */
@ -129,7 +130,18 @@ IoMap build_fpga_io_mapping_info(const ModuleManager& module_manager,
benchmark_io_port.set_width(1);
} else {
VTR_ASSERT(AtomBlockType::OUTPAD == atom_ctx.nlist.block_type(atom_blk));
benchmark_io_port.set_name(std::string(block_name + io_output_port_name_postfix));
/* VPR may have added a prefix to the output ports, remove them here */
std::string output_block_name = block_name;
for (const std::string& prefix_to_remove : output_port_prefix_to_remove) {
if (!prefix_to_remove.empty()) {
if (0 == output_block_name.find(prefix_to_remove)) {
output_block_name.erase(0, prefix_to_remove.length());
break;
}
}
}
benchmark_io_port.set_name(std::string(output_block_name + io_output_port_name_postfix));
benchmark_io_port.set_width(1);
}

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@ -26,7 +26,8 @@ IoMap build_fpga_io_mapping_info(const ModuleManager& module_manager,
const IoLocationMap& io_location_map,
const VprNetlistAnnotation& netlist_annotation,
const std::string& io_input_port_name_postfix,
const std::string& io_output_port_name_postfix);
const std::string& io_output_port_name_postfix,
const std::vector<std::string>& output_port_prefix_to_remove);
} /* end namespace openfpga */

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@ -16,6 +16,7 @@
/* Headers from openfpgautil library */
#include "openfpga_port.h"
#include "openfpga_digest.h"
#include "openfpga_reserved_words.h"
#include "openfpga_atom_netlist_utils.h"
#include "simulation_utils.h"

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@ -23,9 +23,6 @@
/* begin namespace openfpga */
namespace openfpga {
constexpr char* VPR_BENCHMARK_OUT_PORT_PREFIX = "out:";
constexpr char* OPENFPGA_BENCHMARK_OUT_PORT_PREFIX = "out_";
void print_verilog_testbench_fpga_instance(std::fstream& fp,
const ModuleManager& module_manager,
const ModuleId& top_module,