Commit Graph

96 Commits

Author SHA1 Message Date
Ganesh Gore e845b62322 Update regession tasks 2022-05-05 01:46:19 -06:00
tangxifan 5beefda3bd [Test] Add a new test case to validate the fix_pins option 2022-04-13 15:55:21 +08:00
tangxifan 576b9c2d8f [Script] Disable SDC writer in multiclock examples 2022-03-20 11:05:29 +08:00
tangxifan c897a64ad5 [Script] Add a new example script to test full testbenches using bus group features 2022-02-18 15:37:42 -08:00
tangxifan a4d5172b7c [Test] Fixed bugs that causes VPR failed 2022-02-18 12:31:29 -08:00
tangxifan 73e6ee964d [Script] Add a new example script showing how to use bus group features 2022-02-18 12:25:34 -08:00
tangxifan 074811a612 [Script] Now counter benchmarks should pass on the implicit verilog test case 2022-02-15 16:47:14 -08:00
tangxifan 1370be0817 [Script] Fixing bugs 2022-02-15 16:44:51 -08:00
tangxifan 8be0868a3b [Test] Update test case which uses counter benchmarks: adding pin constraints 2022-02-15 16:29:06 -08:00
tangxifan d0fe8d96fa [Test] Update template scripts and assoicated test cases by offering more options 2022-02-14 16:03:48 -08:00
tangxifan 2fb1df11bb [Script] Add a new example script 2022-02-14 15:54:07 -08:00
tangxifan 1d3c9ff192 [Script] Adapt python scripts to support include directory 2022-02-01 13:55:25 -08:00
tangxifan 35c7968c98 [Script] Add a new example openfpga shell script 2022-02-01 13:40:22 -08:00
tangxifan 09ef516de8 [Script] Tune OpenFPGA shell script to enable testing on relative paths 2022-01-31 14:23:13 -08:00
tangxifan da8fc0f5d4 [Test] Add a new test case to validate ``--use_relative_path`` 2022-01-31 13:02:19 -08:00
tangxifan e59ea91ad6 [Script] Fixed a bug which causes errors 2022-01-26 11:49:32 -08:00
tangxifan f8ef3df560 [Test] Now use 4x4 fabric in testing write_rr_gsb commands 2022-01-26 11:41:48 -08:00
tangxifan 5db049522d [Script] Add an example script about write GSB 2022-01-26 11:22:23 -08:00
tangxifan fedb1bd2e3 [Test] Add new testcases to validate correctness of the testbenches/Verilog netlists without time stamp 2022-01-25 16:41:36 -08:00
tangxifan e4cfa2222f [Script] Add an example script to test option ``--no_time_stamp`` 2022-01-25 16:16:39 -08:00
tangxifan ff264c00a2 Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into upstream 2021-10-31 11:51:34 -07:00
tangxifan 335347a74f [Test] Bug fix 2021-10-30 15:48:25 -07:00
tangxifan 40d11a45d9 [Test] Disable ACE2 in implicit verilog test cases due to Yosys upgrade 2021-10-30 14:49:56 -07:00
tangxifan 16de60e943 [Test] Turn off ACE2 run in bitstream generation only flows 2021-10-30 12:31:14 -07:00
tangxifan 4add9781d5 [Script] Add a new openfpga shell script for don't care bits outputting 2021-10-05 19:13:50 -07:00
tangxifan f32ffb6d61 [Test] Bug fix 2021-06-29 18:51:28 -06:00
tangxifan 56b0428eba [Misc] Bug fix 2021-06-29 18:48:19 -06:00
tangxifan c6089385b0 [Misc] Bug fix 2021-06-29 18:34:41 -06:00
tangxifan 5f5a03f17f [Misc] Bug fix on test cases that were generating both full testbench and preconfigured testbenches 2021-06-29 18:28:38 -06:00
tangxifan 4fb34642ca [Script] Add a new example script for global tile clock running full testbench 2021-06-29 17:53:56 -06:00
tangxifan 9655bc35cb [Script] Bug fix due to the full testbench generation changes 2021-06-29 17:04:19 -06:00
tangxifan 20faf82e64 [Script] Rename example script 2021-06-29 16:02:35 -06:00
tangxifan 01391fd81e [Script] Added example scripts that use OpenFPGA to generate testbenches without self checking features 2021-06-29 15:56:33 -06:00
tangxifan 4a623bec79 [Script] Add example openfpga shell script to generate preconfigured fabric wrapper 2021-06-27 19:55:40 -06:00
tangxifan fae5e1dfdf [Script] Upgrade openfpga shell script with the new option '--embed_bitstream' 2021-06-25 15:16:37 -06:00
tangxifan b2c30e3103 [Test] Bug fix in mcnc openfpga shell script 2021-06-22 16:40:24 -06:00
tangxifan 96cb3081ab
Update fix_device_route_chan_width_example_script.openfpga 2021-06-18 09:51:16 -06:00
tangxifan d40cf98c48 [Test] Update test cases by using default net type in testbench generator 2021-06-14 11:47:28 -06:00
tangxifan d545069aac [Script] Bug fix 2021-06-09 14:50:37 -06:00
tangxifan 4e3f589810 [Script] Patch openfpga shell script to use the new option '--support_icarus_simulator' for 'write_preconfigured_testbench' 2021-06-09 13:53:28 -06:00
tangxifan f9404dc97d [Script] Patch openfpga shell script due to missing a mandatory option in 'write_full_testbench' 2021-06-09 11:55:25 -06:00
tangxifan 9adf94bfd3 [Script] Update all the openshell scripts to deprecate 'write_verilog_testbench' 2021-06-09 11:18:52 -06:00
tangxifan be26c06673 [Script] Update an example script to use 'write_preconfigured_fabric_wrapper' and 'write_preconfigured_testbench' in place of 'write_verilog_testbench' 2021-06-09 10:41:22 -06:00
tangxifan e9fa44cc25 [Tool] Add fast configuration to the write bitstream command in example shell script 2021-06-04 16:24:56 -06:00
tangxifan f5e90c9467 [Script] Update openfpga shell script with fast configuration option 2021-06-04 11:28:10 -06:00
tangxifan 8fc90637e0 [Script] Update write_full_testbench example script to support custom device layout in VPR 2021-06-03 17:08:08 -06:00
tangxifan 51ca62a464 [Script] Add example script for write_full_testbench command 2021-06-03 15:48:59 -06:00
tangxifan 7dc7c1b4f5 [Script] Add example openfpga shell script showing how to use 'report_bitstream_distribution' command 2021-05-07 12:05:47 -06:00
tangxifan f9fd444b86 [Script] Add an write I/O mapping example script for openfpga shell 2021-04-27 14:40:26 -06:00
tangxifan 09cc7f0007 [Script] Enable constant net routing for heterogeneous FPGAs 2021-04-23 20:44:36 -06:00