Commit Graph

445 Commits

Author SHA1 Message Date
Thomas Koeller 14a25cd6de DM36x: Set OSCDIV divider
The ability to set up the OSCDIV divider was missing.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:04 +02:00
Thomas Koeller 4ed89e4e42 DM36x: Disable unused SYSCLKs
Clear the enable bits for all clocks that are not set explicitly.
This is done to increase robustness by removing pre-existing
state.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:03 +02:00
Thomas Koeller 98d2579c61 DM36x: Use enable bit for PLL pre-divider
The PLL pre- and postdividers seem to have enable bits, although
these are not mentioned in the chip documentation.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:02 +02:00
Øyvind Harboe 8f779cf66b tcl: remove silly ocd_ prefix to array2mem and mem2array
ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 17:24:55 +02:00
Øyvind Harboe ba951aede3 config scripts: remove useless reference to OpenOCD docs
clutters config scripts.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 10:53:54 +02:00
Ben Gardiner 91305bfa7f cfg: add omapl138 support and da850evm preliminary support
This patch adds support for the omapl138 target and preliminary support for the da850evm. The
target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file.

I have performed limited testing with this setup. I am posting this patch in the interest of
sharing cfg files and in the hopes that the experts on this list can correct errors I have made or
point out enhancements.

The testing I have performed is debugging uboot with gdb where I also use the following local.cfg
and gdbinit files. Debugging appears to work in so much as 'ni' works.

local.cfg:
gdb_memory_map disable

gdbinit:
target remote localhost:3333
set remote hardware-breakpoint-limit 2
set remote hardware-watchpoint-limit 2
monitor poll on

Comments welcome.

Best Regards,
Ben Gardiner
2010-08-10 09:43:30 +02:00
Øyvind Harboe d1638abd6a lpc1768: even if rclk "works", it isn't necessarily the correct clk
rclk = 4MHz oon lpc1768, the correct JTAG clk is 666MHz(4MHz/6).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 13:21:21 +02:00
Peter Stuge 8772355bbd Remove srst_pulls_trst from LPC2148 target
srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact
which is already documented in doc/openocd.texi, so it shouldn't be
set unconditionally in the target tcl.

This patch was needed to reflash when an Abort exception occured very
early after reset, before OpenOCD tried to halt the CPU.
2010-08-01 09:10:47 +02:00
Øyvind Harboe f4c1f08f16 lpc7168: make flash available upon reset init
set user mode to avoid ROM being mapped at address
0 rather than flash.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-30 22:36:00 +02:00
David Brownell 2fdc1db304 lm3s811-ek uses generic stellaris target config
There's no point in an lm3s811-specific target file,
so remove it in favor of the generic "stellaris.cfg".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-07-17 02:59:23 -04:00
Spencer Oliver 1619facb5e cfg: add Avalue RSC-W910 config
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-13 14:17:00 +01:00
Olaf Lüke 2986320cde at91sam3s* support
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-25 21:37:53 +02:00
Thomas Koeller c9e2d13cf9 DM36x: pll & clock setup
Added a function 'pll_v03_setup' to set up PLLs and clock
dividers on DM365 and DM368.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 10:40:05 +02:00
michal smulski bf3410fcc7 arm1136 scripts
Here is a patch to fix a startup in C100 (arm1136). Basically make sure
that UART is configured before using it.

Michal

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 07:39:59 +02:00
Spencer Oliver 94dc7c0a93 cfg: add pic32 virtual banks
make use of the new virtual bank flash driver.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-26 11:10:15 +01:00
Freddie Chopin f1c1bed39a There are no variants of arm7tdmi target
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:40 +01:00
Freddie Chopin e2c9518eda All LPC2xxx chips are little endian and that cannot be changed - update config scripts
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:30 +01:00
Freddie Chopin 9c3b4cfc5d add correct CPUTAPID value for LPC2129
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:18 +01:00
Freddie Chopin 0e4f4bacdc Update "flash bank" helper comments for LPC2xxx chips
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:08 +01:00
Freddie Chopin 06df4664a9 LPC23xx and LPC24xx after reset run on internal 4MHz RC oscillator, so "flash bank" parameter should be 4000 (not 12000)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:20:43 +01:00
Øyvind Harboe 2e1eaaae35 at91sam9260: use RCLK
It might be possible to get this target going without
RCLK, but it would require more careful analysis and
usage of the reset events.

Enable fast memory accesses.

Tested on an at91sam9260 custom board w/external DRAM
and flash.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-21 14:00:11 +02:00
Marc Pignat e92b203a76 at91rm9200 : reset_config should go to the board config file
Let other boards do other things with srst and trst.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18 11:48:47 +02:00
Spencer Oliver 215a5f7442 scripts: update flash bank names
As the flash bank name is now unique update the scripts to suit.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-13 20:44:08 +01:00
michal smulski c6cd253ae1 telo: update configuration scripts to matched master branch
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-24 16:51:34 +02:00
Antonio Borneo 27b98c2fa5 TCL scripts: update to current "flash bank" syntax
While "flash bank" syntax has been changed long ago,
several tcl script are still not fully update.

Fix following cases related with "cfi" driver:
- syntax error: the mandatory <name> parameter is missing
- warning: the <target> parameter is a number, instead of
  the target name
- the comment line above the command does not report
  actual syntax

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-26 08:42:58 +01:00
Spencer Oliver 82f44a4708 PIC32: add Microchip Explorer16 cfg
- add Microchip Explorer16 cfg using PIC32MX360F512L PIM.
 - remove reset config from PIC32 target cfg.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-16 10:10:20 +00:00
David Brownell 1bd3ae3986 rename jtag_nsrst_assert_width as adapter_nsrst_assert_width
Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width",
and move it out of the "jtag" command group ...  it needs to be used with
non-JTAG transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:42:26 -07:00
David Brownell b559b273b5 rename jtag_nsrst_delay as adapter_nsrst_delay
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ...  it needs to be used with non-JTAG
transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:41:30 -07:00
David Brownell 96f9790279 rename jtag_khz as adapter_khz
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag"
command group ...  it needs to be used with non-JTAG transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.  (We may want to
update it to include a nag message too.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:37:43 -07:00
Spencer Oliver de761e350b PIC32MX: update cfg script
The default config script will now dynamically setup the BMX registers
in the reset init script.
This will also work if the user overrides the default working area.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-15 09:38:46 +00:00
Spencer Oliver 257a764582 PIC32: add flash algorithm support
Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
 - without fastload: 60secs
 - with fastload: 45secs
 - with fastload and algorithm: 2secs.

Add new devices to supported list.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 21:03:22 +00:00
David Brownell 53b3d4dd53 LPC1768 updates, IAR board support
Fix some issues with the generic LPC1768 config file:

 - Handle the post-reset clock config:  4 MHz internal RC, no PLL.
   This affects flash and JTAG clocking.

 - Remove JTAG adapter config; they don't all support trst_and_srst

 - Remove the rest of the bogus "reset-init" event handler.

 - Allow explicit CCLK configuration, instead of assuming 12 MHz;
   some boards will use 100 Mhz (or the post-reset 4 MHz).

 - Simplify: rely on defaults for endianness and IR-Capture value

 - Update some comments too

Build on those fixes to make a trivial config for the IAR LPC1768
kickstart board (by Olimex) start working.

Also, add doxygen to the lpc2000 flash driver, primarily to note a
configuration problem with driver: it wrongly assumes the core clock
rate never changes.  Configs that are safe for updating flash after
"reset halt" will thus often be unsafe later ... e.g. for LPC1768,
after switching to use PLL0 at 100 MHz.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 15:02:01 -08:00
Mariano Alvira e4a40d257d Add target/mc13224v.cfg
The MC13224V is a FreeScale ARM7TDMI based IEEE802.15.4 platform for
Zigbee and similar low-power wireless applications. Using PIP
(Platform In Package) technology, it integrates: an RF balun and
matching network; a buck converter (only an external inductor is
necessary); 96KB of SRAM; and 128KB of non-volatile memory.

It has an integrated bootloader and can boot from a variety of sources:
external SPI or I2C non-volatile memory, an image loaded over UART1,
or the internal non-volatile memory. The image loaded from one of these
sources is executed directly from SRAM starting at location 0x00400000.

Open source development code at http://mc1322x.devl.org

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-27 22:51:41 -08:00
David Brownell 5869992314 LPC1768.cfg -- partial fixes for bogus reset-init handler
Cortex-M targets don't support ARM instructions.

Leave the NVIC.VTOR setup alone, but comment how the whole
routine looks like one big bug...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-15 13:39:16 -08:00
Viktar Palstsiuk 32188c5004 target library: configuration files for openocd tested with Atmel SAM-ICE V6 JTAG.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-11 21:10:51 +01:00
Spencer Oliver f899c2aa97 str730.cfg: fix incorrect mem regions
- update str73x mem regions to correct values.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-09 14:49:47 +00:00
Ethan Eade 8b049fdba5 scripts: Phytec/LPC2350 config scripts
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-04 10:25:44 +01:00
Harald Kipp 18969466c9 AT91R40008/Ethernut 3 configuration
Moved board specific settings from target/at91r40008.cfg to a new
file board/ethernut3.cfg.

Set correct CPUTAPID.  Reset delay increased, see MIC2775 data sheet.
Increased work area size from 16k to 128k.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-02 11:09:53 -08:00
Edgar Grimberg cc440ca1d4 tcl/str7x: Reset init unlocks the flash
For STR7x flash, the device cannot be queried for the protect status.
The solution is to remove the protection on reset init. The driver
also initialises the sector protect field to unprotected.

[dbrownell@users.sourceforge.net: line length shrinkage]

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-02 09:30:33 -08:00
Edgar Grimberg 503f6139c7 flash/str7x: After reset init the flash is unlocked
The default state of the STR7 flash after a reset init is unlocked.
The information in the flash driver now reflects this.

The information about the lock status cannot be read from the
flash chip, so the user is informed that flash info might not
contain accurate information.

[dbrownell@users.sourceforge.net: line length shrinkage]

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-02 09:30:33 -08:00
Michael Grzeschik d036f17001 tcl/target/at91sam3u4e.cfg: changed case in dependent file
openocd does not start with the target configfile due to the case in the
dependent config file.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-20 10:32:53 -08:00
Spencer Oliver ba96fc3e9d PIC32: enable ram execution
add reset-init script to allow ram execution from reset, this is required for ejtag fastdata access.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-05 19:54:37 +00:00
Spencer Oliver 3616b93eee target.cfg: update to use new flash configuration syntax
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2009-12-17 11:39:09 +00:00
David Brownell 4a2f4e3433 more tcl/{board,target} cleanup
Remove more remnants of the old "jtag_device" syntax.

Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity.

Remove various non-supported "-variant" target options; they're not
needed often at all.

Flag some of the board files as needing to have and use target files
for the TAP and target declarations.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-15 14:45:26 -08:00
David Brownell 80a757d82e testing/examples/.../*cfg: rm jtag_device calls
That syntax has been obsolete forever and is now gone; remove a few
remaining references.  Shows how seldom this stuff gets used.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-15 14:45:26 -08:00
mkdorg@users.sourceforge.net 646ce814b4 target: add basic dsp563xx support 2009-12-15 18:38:52 +01:00
Øyvind Harboe d6aff79f1a imx31: move srst delay into config script
reset init/run now works again.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-15 07:55:20 +01:00
David Brownell c86a64dff7 lm3748: use new Stellaris config file
Use the new file, and remove the old target/lm3s3748.cfg one.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-14 16:29:53 -08:00
Yegor Yefremov a1009509fb Common target file for Stellaris chips
Common target.cfg file for LM3S CPU family

[dbrownell@users.sourceforge.net: rename, generalize more]

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-14 16:29:31 -08:00
David Brownell ecd709fa55 OMAP2420: define reset-assert event
Behave like OMAP3530:  force global software reset.  Given the
patch to teach ARM11 how to use these events, and use VCR to
catch the reset vector, this works better than either the
current reset logic or than using SRST.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07 14:57:43 -08:00
David Brownell a65e75ea34 Tcl and doc: update to match new 'arm mcr ...' etc
Make them match the C code.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 01:10:19 -08:00
Øyvind Harboe 48edd58c39 target: at91eb40a.cfg is a board, not a target.
Also updated to use target name when creating flash
and set jtag_khz to 16000.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-01 10:06:40 +01:00
Marek Vasut 8c2846ed45 create target/pxa3xx.cfg
[dbrownell@users.sourceforge.net; remove pxa255 comment]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-29 12:57:05 -08:00
David Brownell ddce517e3a omap3530.cfg: use new "reset-assert" event
Replaces previous "reset-assert-pre" workaround.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-27 18:50:31 -08:00
David Brownell ac06d41fc7 omap3530.cfg: yes we have SRAM!
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-25 16:19:53 -08:00
David Brownell 7b77b3c5d1 target.cfg: TAP id for Hilscher netX 500
Based on email from "Martin Kaul <martin.kaul@leuze.de>".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-20 12:21:00 -08:00
Zachary T Welch 2dfa5e9c84 update 'flash bank' usage in scripts
Sets $_FLASHNAME to "$_CHIPNAME.flash" and passes it as the
first argument to 'flash bank'.
2009-11-19 13:39:41 -08:00
David Brownell f86137066a ARM: "armv4_5" command prefix becomes "arm"
Rename the "armv4_5" command prefix to straight "arm" so it makes
more sense for newer cores.  Add a simple compatibility script.

Make sure all the commands give the same "not an ARM" diagnostic
message (and fail properly) when called against non-ARM targets.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-16 16:36:09 -08:00
David Brownell ecab0cfe25 ARM11: ETM + ETB support
Kick in ETM (and ETB) support for ARM11.  Tested on OMAP 2420,
so update that configuration.  (That's an ARM1136ejs, ETB,
OpenGL ES1.1, C55x DSP, etc.)

Also update the other ARM11 ETM + ETB targets in the tree
to set up these modules.  (Not tested.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-13 16:58:14 -08:00
David Brownell 44d6a531f7 iMX2* + ETB targets: hook up ETM and ETB
ARM9 cores with an ETB will have a matching ETM.
Hook them both up by default.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-13 16:56:11 -08:00
David Brownell 38e8d60f79 target.cfg: label ETBs correctly
Various cores with an ETB have its TAP misnamed ... either as a
boundary scan TAP or as the iMX "Secure JTAG Controller" (which
is, among other things, a JRC that could be used to shorten
scan chains).

Use the correct name for these TAPs, which we can recognize since
their IDs were assigned by ARM and these chips all document the
presence of an ETB.  The 0x2b900f0f is ETB11; the 0x1b900f0f
is an older module, just called "ETB".

Also shrink the ETB's IR configuration; the default IR-Capture
value is fine, and the mask can specify that all four bits are
safe to check (per ARM documentation).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-13 13:44:50 -08:00
David Brownell 6881c1b6d6 target.cfg: (re)move some bogus reset_config lines
General rule, this is all board-specific and doesn't belong
in target config files.  Some of these were just cosmetic.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-10 09:25:26 -08:00
Thomas Kindler 85944d4144 stm32.cfg: remove reset_config
Here's a patch for the double-reset problem on STM32.  I've tested
downloading and debugging with GDB and Eclipse, and everything seems
to work fine.

This effectively sets reset_config to none. trst_only would also
be ok, but that's better left to a board configuration file since
not all boards wire it up.

The NVIC is used to trigger reset, which at least on this chip also
pulses nSRST so the whole system does get rest -- exactly once.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-10 09:16:12 -08:00
Øyvind Harboe c202ba7d34 ARM11: remove old mrc/mcr commands
Switch to new commands in config scripts

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-11-10 13:13:13 +01:00
Øyvind Harboe 1f357869c1 telo.cfg: fix search paths
Add the missing "target/" prefix for scripts in the
target folder.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-11-10 13:11:17 +01:00
David Brownell 3e6f9e8d1e target.cfg: remove "-work-area-virt 0"
The semantics of "-work-area-virt 0" (or phys) changed with
the patch to require specifying physical or virtrual work
area addresses.  Specifying zero was previously a NOP.  Now
it means that address zero is valid.

This patch addresses three related issues:

 - MMU-less processors should never specify work-area-virt;
   remove those specifications.  Such processors include
   ARM7TDMI, Cortex-M3, and ARM966.

 - MMU-equipped processors *can* specify work-area-virt...
   but zero won't be appropriate, except in mischievous
   contexts (which hide null pointer exceptions).

   Remove those specs from those processors too.  If any of
   those mappings is valid, someone will need to submit a
   patch adding it ... along with a comment saying what OS
   provides the mapping, and in which context.  Example,
   say "works with Linux 2.6.30+, in kernel mode".  (Note
   that ARM Linux doesn't map kernel memory to zero ...)

 - Clarify docs on that "-virt" and other work area stuff.

Seems to me work-area-virt is quite problematic; not every
operating system provides such static mappings; if they do,
they're not in every MMU context...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-08 08:52:40 -08:00
Freddie Chopin 2120231afd remove "-ircapture 0x1 -irmask 0x1" from stm32.cfg
Gets rid of the runtime warning "stm32.bs: nonstandard IR mask"

[dbrownell@users.sourceforge.net: line lengths, note issue, section ref]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-01 07:02:23 -08:00
Freddie Chopin 0da0bfd40a target.cfg: use $_TARGETNAME for flash
This gets rid of runtime warnings from the use of numbers.
STM32 and LPC2103 were tested.  Other LPC updates are the
same, and so are safe.  The CFI updates match other tested
changes now in the tree.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-31 11:13:10 -07:00
David Brownell 4a26390eec PXA255: force reset config
These chips need both SRST and TRST when debugging,
and SRST doesn't gate JTAG.
2009-10-26 22:59:46 -07:00
David Brownell 4a91b070ff omap3530: target reset/init improvements
Now I can issue "reset halt" and have everything act smoothly;
the vector_catch hardware is obviously not kicking in, but the
rest of the reset sequence acts sanely.

 - TAP "setup" event enables the DAP, not omap3_dbginit
   (resolving a chicken/egg bug I noted a while back)
 - Remove stuff from omap3_dbginit which should never be
   used in event handlers
 - Cope better with slow clocking during reset

Also, stop hard-wiring the target name: use the input params in
the standard way, and set up $_TARGETNAME as an output param.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-26 22:53:18 -07:00
Øyvind Harboe a07422c26c fix syntax of mww phys. 2009-10-25 22:15:57 +01:00
Øyvind Harboe fcf1301e52 mww_phys retired. Replaced by generic mww phys in target.c 2009-10-21 22:25:33 +02:00
Øyvind Harboe 79e257a209 Added the faux flash driver and target. Used for testing. 2009-10-20 12:23:56 +02:00
David Brownell c70073ef67 davinci: add watchdog reset method
Lightly tested on dm365.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-19 22:50:51 -07:00
Øyvind Harboe 44e9200d0a iMX target config script's ported from Freescale BSP. 2009-10-14 11:04:44 +02:00
David Brownell 7afc181e42 omap2420.cfg updates
Remove ircapture/mask attributes.  Add "srst_nogate".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-14 02:00:34 -07:00
Øyvind Harboe f8cd850c4d arm11 seems to gate JTAG when srst is asserted 2009-10-13 12:10:23 +02:00
Øyvind Harboe 026559068d Merge commit 'origin/master' 2009-10-12 09:28:56 +02:00
Øyvind Harboe b23b096c8e Supply default reset_config statement to make target scripts useful standalone and provide sensible default 2009-10-12 09:25:08 +02:00
Wookey 456ec36795 Fix reset delays and tinker with ID's 2009-10-10 09:08:06 +02:00
David Brownell 60e24aa597 make PXA255 targets enumerate sort-of-OK
Startup now mostly works, except that the initial target state
is "unknown" ... previously, it refused to even start.

Getting that far required fixing the ircapture value (which
can never have been correct!) and the default JTAG clock rate,
then providing custom reset script.

The "reset" command is still iffy.  DCSR updates, and loading
the debug handler, report numerous DR/IR capture failures.
But once that's done, "poll" reports that the CPU is halted
(which it shouldn't be, this was "reset run"!), due to the
rather curious reason "target-not-halted".

Summary:  you still can't debug these parts, but it's closer.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-08 23:51:50 -07:00
David Brownell 6efaa95c44 make OMAP5912 resets more reliable
Without some extra delay after releasing SRST, we seemed to
be trying to talk to the TAP before it was ready to respond.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07 23:29:18 -07:00
John Rigby 37e9f65f5a iMX25 target support
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07 21:49:36 -07:00
dbrownell 7d78021efa Dragonite target script
From: Nicolas Pitre <nico@fluxnic.net>


git-svn-id: svn://svn.berlios.de/openocd/trunk@2806 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06 22:55:04 +00:00
dbrownell 7c7467b34f Add a new JTAG "setup" event; use for better DaVinci ICEpick support.
The model is that this fires after scanchain verification, when it's
safe to call "jtag tapenable $TAPNAME".  So it will fire as part of
non-error paths of "init" and "reset" command processing.  However it
will *NOT* trigger during "jtag_reset" processing, which skips all
scan chain verification, or after verification errors.

ALSO:
 - switch DaVinci chips to use this new mechanism
 - log TAP activation/deactivation, since their IDCODEs aren't verified
 - unify "enum jtag_event" scripted event notifications
 - remove duplicative JTAG_TAP_EVENT_POST_RESET


git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:20:28 +00:00
dbrownell c6b24fb4f0 Get rid of needless OMAP and Davinci target config options
so they provide better examples and are easier to maintain.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2797 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:13:00 +00:00
mlu f87985b614 Updated reset event handling in omap3530 cfg
git-svn-id: svn://svn.berlios.de/openocd/trunk@2796 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-02 16:52:02 +00:00
dbrownell 32599fab1a Remove annoying EOL whitespace (again, sigh).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2781 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 23:02:15 +00:00
oharboe 54c16fc56e strip gdb config options
git-svn-id: svn://svn.berlios.de/openocd/trunk@2779 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 05:40:40 +00:00
oharboe 642519649e michal smulski <michal.smulski@ooma.com> reset now works
git-svn-id: svn://svn.berlios.de/openocd/trunk@2778 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 05:37:32 +00:00
dbrownell fbbd3066ff Don't provide invalid OMAP5912 IR capture value/mask attributes
git-svn-id: svn://svn.berlios.de/openocd/trunk@2762 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-27 07:59:10 +00:00
dbrownell ad43374c7f Update DM355 target config to know about ICEpick.
Still defaults to nonstandard EMU0/EMU1 settings.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2757 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-25 17:02:59 +00:00
oharboe 43b3807878 Michael Hasselberg <mh@open-engineering.de> target configuration files for Toshiba TX09 familiy
git-svn-id: svn://svn.berlios.de/openocd/trunk@2756 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-25 16:48:15 +00:00
dbrownell 71af49ca7f Remove annoying end-of-line whitespace from tcl/* files
git-svn-id: svn://svn.berlios.de/openocd/trunk@2743 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 18:48:22 +00:00
dbrownell 108028112f Ensure that DaVinci chips can't start with a too-fast JTAG clock.
It can be sped up later, once it's known the PLLs are active.

Note that modern tools from TI all use adaptive clocking; and
that if that's done with OpenOCD, "too fast" is also a non-issue.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 00:37:58 +00:00
mlu 01735c515f Reduced sleep time after reset
git-svn-id: svn://svn.berlios.de/openocd/trunk@2732 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-19 14:47:53 +00:00
mlu 7b3be0e21e Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.c
git-svn-id: svn://svn.berlios.de/openocd/trunk@2728 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-18 15:11:46 +00:00
oharboe 9542318312 Rolf Meeser <rolfm_9dq@yahoo.de> adds flash support for NXP's LPC2900 family (ARM968E).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-16 12:38:26 +00:00
oharboe 772d8d06ea Magnus Lundin <lundin@mlu.mine.nu> Disable poll while core register initialization
git-svn-id: svn://svn.berlios.de/openocd/trunk@2703 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-13 20:07:13 +00:00
oharboe 40f361dd94 David Brownell <david-b@pacbell.net>
Update the board config for the DaVinci DM355 EVM so the reset-init
event handler does the rest of the work it should do:

 - minor PLL setup bugfixes
 - initialize the DDR2 controller
 - probe both NAND banks
 - initialize UART0
 - enable the icache


git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-12 08:11:45 +00:00
oharboe 4f7761828c tap post reset event added. Allows omap3530 to send 100 runtest idle tickle's after a TAP_RESET.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2696 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 18:34:15 +00:00
oharboe 6dd8f37e6d syntax error fix
git-svn-id: svn://svn.berlios.de/openocd/trunk@2689 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11 06:08:51 +00:00
oharboe b4acbee47f michal smulski <michal.smulski@ooma.com> telo target/board scripts
git-svn-id: svn://svn.berlios.de/openocd/trunk@2683 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-10 08:06:22 +00:00
oharboe 0b11e4dbb4 use "armv4_5 core_state arm" instead of soft_reset_halt, fewer side effects
git-svn-id: svn://svn.berlios.de/openocd/trunk@2672 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04 11:03:26 +00:00
oharboe 2e29131f2b set ARM mode using explicit command rather than soft_reset_halt which has lots of side effects.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2669 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04 08:23:24 +00:00
oharboe ce89c7bf65 David Brownell <david-b@pacbell.net> "set _TARGETNAME ..." cleanup
git-svn-id: svn://svn.berlios.de/openocd/trunk@2665 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04 05:17:03 +00:00
oharboe 76b78feef1 David Claffey <dnclaffey@gmail.com> get rid of reset recursion
git-svn-id: svn://svn.berlios.de/openocd/trunk@2664 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-04 05:14:32 +00:00
oharboe 3878b12793 David Claffey <dnclaffey@gmail.com> tested with the Atheros reference design "PB44"
git-svn-id: svn://svn.berlios.de/openocd/trunk@2662 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-02 17:34:35 +00:00
oharboe 14f2189e1a Ferdinand Postema <ferdinand@postema.eu> increase reset delay to fix regression from 2600 to 2604
git-svn-id: svn://svn.berlios.de/openocd/trunk@2614 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-25 07:12:57 +00:00
oharboe 9df861b0c0 use cortex_a8 instead of cortex_m3
git-svn-id: svn://svn.berlios.de/openocd/trunk@2610 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-25 06:59:42 +00:00
oharboe 6336ebb05c Pieter Conradie <Pieter.Conradie@psitek.com> shuffle things around to the right spots. Should have been done in previous commit.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2604 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-21 11:23:24 +00:00
oharboe 7b4428df97 David Brownell <david-b@pacbell.net> Cleanup the Stellaris target configs:
- remove endianness options; these chips hard-wire "little"
 - $_TARGETNAME updates:
    * don't pass $_TARGETNAME where a TAP label is required
    * flash config uses $_TARGETNAME (it might not be target #0)
    * simplify one $_TARGETNAME construction
 - update work area setup:
    * remove VM spec; these chips have no VM!
    * fix some wrong sizes (0x4000 == 16K, not 4K)
    * simplify: take defaults
 - comment fixups


git-svn-id: svn://svn.berlios.de/openocd/trunk@2589 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-18 10:27:24 +00:00
oharboe 1d96a84f06 Xiaofan Chen <xiaofanc@gmail.com> Split LM3S811 config file into target file and board file
git-svn-id: svn://svn.berlios.de/openocd/trunk@2584 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-16 12:08:35 +00:00
oharboe ad23cb97b2 michal smulski <michal.smulski@ooma.com> arm11 target config files
git-svn-id: svn://svn.berlios.de/openocd/trunk@2583 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-16 11:58:40 +00:00
oharboe 2a0e491d9a Xiaofan Chen <xiaofanc@gmail.com> Add config file for TI-Luminary LM3S1968 chip and EK-LM3S1968 board
git-svn-id: svn://svn.berlios.de/openocd/trunk@2582 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-16 11:54:56 +00:00
ntfreak 59b295dbbe Audrius Urmanavičius [didele.deze@gmail.com]:
Add flash programming support for NXP LPC1700 cortex_m3 based family


git-svn-id: svn://svn.berlios.de/openocd/trunk@2579 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-08-13 13:54:53 +00:00
oharboe a7a1ae032b Stefano Voulaz <s.voulaz@projecktstudio.com> first cut samsung_s3c2450
git-svn-id: svn://svn.berlios.de/openocd/trunk@2556 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-22 14:25:56 +00:00
oharboe e4cff09137 David Brownell <david-b@pacbell.net> split EK board support out
from the target CPU support .

git-svn-id: svn://svn.berlios.de/openocd/trunk@2504 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-10 07:21:12 +00:00
oharboe 3ce038baa3 sharpen reset_config for imx27 - use both trst & srst. srst pulls trst.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2493 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-08 06:32:27 +00:00
oharboe b80f6f96d3 srst pulls trst according to Freescale docs for i.mx27
git-svn-id: svn://svn.berlios.de/openocd/trunk@2492 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-07 16:50:28 +00:00
oharboe 42115c0997 David Brownell <david-b@pacbell.net> Update docs to say that "arm7_9 dbgrq enable" is the default
on ARM9 cores, and update the DaVinci config files so they
no longer explicitly specify it.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2484 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-06 21:16:11 +00:00
oharboe c946358a06 Xiaofan Chen <xiaofanc@gmail.com> With this patch, OpenOCD can talk to my
Analog Device Eval-ADuC7060 eval board.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2459 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-02 17:47:10 +00:00
zwelch f1f54a0fc5 Remove vim editor commands from TCL files.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2455 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-02 11:17:04 +00:00
zwelch 6d08c1800c David Brownell <david-b@pacbell.net>:
Prepare the DaVinci PLL code to support the version 0x0E module
used in newer chips (e.g. dm365):  rename the original code so
it's specific to version 0x02 PLL modules, and update the dm355evm
code to use that new name.

Fix two minor bugs in that version 2 code:  sysclk3 setup used
the sysclk2 divider address (affecting video processing on dm355,
no worry for now) and sysclk2 setup had a syntax error.

Also minor fixups to dm355evm, mostly to permit use of RTCK.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2447 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-02 04:55:35 +00:00
ntfreak 917f92f052 - add stm32 connectivity line tapid to stm32.cfg
git-svn-id: svn://svn.berlios.de/openocd/trunk@2440 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-01 10:29:10 +00:00
zwelch ad50a99d6a Add svn:eol-style native property to TCL files that are missing it.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2433 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-30 20:44:21 +00:00
zwelch 2eff86ab23 Remove executable bits from at91sam3 configuration files.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2432 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-30 20:39:02 +00:00
oharboe d3c77fdbb2 freddie_chopin@op.pl fix handling of workarea
git-svn-id: svn://svn.berlios.de/openocd/trunk@2431 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-30 11:50:04 +00:00
zwelch f130f95d45 Marcel Jost <marcel.jost@bfh.ch>:
This patch adds support for the Luminary Micro LM3S9B90 target and
LM3S9B92 Evaluation Kit.  These kits include a new ft2232 adapter, the
Luminary In-Circuit Debug Interface (ICDI) Board, so this is added as a
new ft2232 layout called "luminary_icdi".


git-svn-id: svn://svn.berlios.de/openocd/trunk@2429 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-30 09:09:30 +00:00
oharboe f8cc725e0e Kevin Bortis <stm32@bortis.ch> fix worksize
git-svn-id: svn://svn.berlios.de/openocd/trunk@2419 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-29 22:08:34 +00:00
zwelch 3d9551241b David Brownell <david-b@pacbell.net>:
Minor bugfix ... previous version was tested *with* ICEpick active.
The "-disable" can swap with "-enable"; but not with an empty string.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2418 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-29 20:04:21 +00:00
zwelch 95da247b40 David Brownell <david-b@pacbell.net>:
Improve the PXA255 target config:  move all that board-specific
setup to the pxa255_sst board.cfg, to which it evidently belongs
(it's the only PXA255 board now included).

Provide the PXA255 JTAG id from Intel docs, and add a comment
about how this chip is now EOL'd (last orders taken).

Note that I still can't get my old PXA255 board to work.  There's
something broken in the reset sequence, which is preventing the
TAP from coming up at all.  Old mailing list posts suggest this
is a longstanding bug...


git-svn-id: svn://svn.berlios.de/openocd/trunk@2416 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-29 20:04:08 +00:00
duane 0ace4d24db Add support for ATMEL AT91SAM3U - CortexM3 Family
git-svn-id: svn://svn.berlios.de/openocd/trunk@2383 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-24 02:01:14 +00:00
oharboe 974d5f8391 fix eol native
git-svn-id: svn://svn.berlios.de/openocd/trunk@2353 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-22 19:22:10 +00:00
oharboe 26807d1935 David Brownell <david-b@pacbell.net> target config file for newish DM365 chip. Think of this as
an improved DM355, integrating much better HD video support,
Ethernet, and other goodies.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2351 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-22 17:31:12 +00:00
oharboe bc9df17e42 Paulius Zaleckas <paulius.zaleckas@gmail.com> Add config for CS351x CPUs
git-svn-id: svn://svn.berlios.de/openocd/trunk@2349 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-21 21:06:23 +00:00
oharboe 1a400f8b8e Freddie Chopin <freddie_chopin@op.pl> makes lpc2478.cfg file more "standard" and - what is most important - correct (it's working [; ). I've also added some comments which try to clarify the meaning of all that's in there.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2269 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-17 20:49:55 +00:00
zwelch d727e31af9 David Brownell <david-b@pacbell.net>:
Update the Beagle setup:

 - OMAP3530 updates:
    * split ICEpick TAP enable support to its own file, for
      reuse and eventually for storing other utility code
      like emulation reset
    * clean up, including labeling the tap as for DAP not
      for the Cortex-A8 and making endianness non-variable
    * add a few FIXMEs

 - BeagleBoard cleanup:  there's no SRST, "endstate" is gone, etc

I'm not sure I'd say it's further than "barely limping" just yet.
Key issues remain lack of Cortex-A8 support, and more complete
support for resetting.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2267 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-17 06:44:29 +00:00
zwelch 10e435c961 David Brownell <david-b@pacbell.net>:
DM6446 config updates:

 - List two more TAPs, as disabled, mostly for doc purposes
 - Included basic ICEpick support, still disabled by default
 - Shorten line lengths
 - Use $_TARGETNAME to configure the ETM and ETB
 - This ARM core don't support endianness overriding

For now, boards that can't jumper EMU0/EMU1 will need to tweak
a variable's setting.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2265 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-17 06:40:58 +00:00
zwelch 1ac220df71 David Brownell <david-b@pacbell.net>:
Add another board ... OMAP2420 "H4" board.  This won't be very widely
used with OpenOCD, but with mainline support in both U-Boot and Linux
it at least makes for a more complete set (and another testcase).

This is incomplete support in several respects.  The ARM11 support is
not very deep yet; most registers aren't available, and the ETM can't
be hooked up.  Plus, there's no script for OMAP-specific stuff like
setting up the SDRAM controller.  Eventually the same NAND controller
driver should work with OMAP2 and OMAP3.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2242 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-15 23:54:09 +00:00
zwelch ec274b2707 Revert changes from r2134 that snuck into the commit. Mea culpa.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2135 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-09 01:01:13 +00:00
zwelch 594abeb82b David Brownell <david-b@pacbell.net>:
Add configuration for an old AT91rm9200 board, the Cogent CSB 337.
Worth noting from the OpenOCD perspective:

 - It got a real hardware trace port connector; wired up here as
   much as we can, lacking inexpensive trace-aware dongles.

 - This is the first in-tree use of the "arm920t cp15" command.
   It adjusts the CPU clocking and enables i-cache, which gives
   more than 4x speedup after booting Linux; it's visible even
   just running U-Boot.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2134 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-09 00:58:23 +00:00
oharboe f92b104d8d David Brownell <david-b@pacbell.net> target/at91rm9200.cfg cleanup
git-svn-id: svn://svn.berlios.de/openocd/trunk@2075 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-05 08:35:24 +00:00
zwelch 878d0cb043 David Brownell <david-b@pacbell.net>:
Split out OSK5912 board support from the omap5912 target config, and make
it pass sanity checks on my (Rev C/original) hardware:

 - Fix syntax error ("-irlen" not "irlen")
 - Provide real TAP ids for the ARM926ejs and the C55x dsp
 - Label both CPUs appropriately (DSP, ARM)
 - List both flash chips

The scan chain looks like this (note truncated DSP instruction code):

      TapName            | Enabled |   IdCode      Expected    IrLen IrCap  IrMask Instr
 ---|--------------------|---------|------------|------------|------|------|------|---------
  0 | omap5912.dsp       |    Y    | 0x03df1d81 | 0x03df1d81 | 0x26 | 0x00 | 0x00 | 0xffffffff
  1 | omap5912.arm       |    Y    | 0x0692602f | 0x0692602f | 0x04 | 0x01 | 0x00 | 0x0c
  2 | omap5912.unknown   |    Y    | 0x00000000 | 0x00000000 | 0x08 | 0x00 | 0x00 | 0xff

I still don't know what that third TAP is; maybe an early version of
an ICEpick JTAG router.


git-svn-id: svn://svn.berlios.de/openocd/trunk@1974 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-01 03:05:59 +00:00
zwelch dbbc9c41f7 Move TCL script files -- Step 2 of 2:
- Move src/tcl to tcl/.
- Update top Makefile.am to use new path name.


git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-27 06:49:24 +00:00