michal smulski <michal.smulski@ooma.com> arm11 target config files
git-svn-id: svn://svn.berlios.de/openocd/trunk@2583 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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# c100 config
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#
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#jtag_nsrst_delay 5000
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#jtag_ntrst_delay 3000
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#reset_config none
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reset_config trst_and_srst separate
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#reset_config srst_only srst_pulls_trst
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME c100
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x27b3645b
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}
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if { [info exists DSPTAPID ] } {
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set _DSPTAPID $DSPTAPID
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} else {
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set _DSPTAPID 0x27b3645b
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}
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jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_DSPTAPID
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# Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
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# C100's ARAM 64k SRAM
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$_TARGETNAME configure -work-area-phys 0x0a000000 -work-area-size 0x10000 -work-area-backup 0
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proc power_restore {} { puts "Sensed power restore. No action." }
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proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
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# issue telnet: reset init
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# issue gdb: monitor reset init
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$_TARGETNAME configure -event reset-init {
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# Force target into ARM state.
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# soft_reset_halt # not implemented on ARM11
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puts "Halting C100.CPU"
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halt
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}
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$_TARGETNAME configure -event reset-deassert-post {
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# Force target into ARM state.
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# soft_reset_halt # not implemented on ARM11
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puts "Detected SRSRT asserted on C100.CPU"
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}
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# Valid events: old-gdb_program_config, old-pre_resume, early-halted, halted, resumed, resume-start, resume-end, gdb-start, gdb-end, reset-start, reset-assert-pre, reset-assert-post, reset-deassert-pre, reset-deassert-post, reset-halt-pre, reset-halt-post, reset-wait-pre, reset-wait-post, reset-init, reset-end, examine-start, examine-end, debug-halted, debug-resumed, gdb-attach, gdb-detach, gdb-flash-write-start, gdb-flash-write-end, gdb-flash-erase-start, gdb-flash-erase-end, resume-start, resume-ok, or resume-end
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source [find c100.cfg]
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# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
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# it's really 16MB but the upper 8mb is controller via gpio?
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flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
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#
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gdb_memory_map enable
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