Commit Graph

9688 Commits

Author SHA1 Message Date
Tim Newsome e8379cda32 Make it build again.
Change-Id: I851cfb8811d8e5d25760c9fddaeb99d7af1fdf6f
Signed-off-by: Tim Newsome <tim@sifive.com>
2020-10-15 15:06:28 -07:00
Tim Newsome 7a933ea7ad Merge branch 'master' into from_upstream_histogram
Used histogram diff strategy, which was much better than the default.

Conflicts:
	doc/openocd.texi
	src/flash/nor/fespi.c
	src/jtag/drivers/libjaylink
	src/rtos/rtos.c
	src/target/riscv/batch.c
	src/target/riscv/encoding.h
	src/target/riscv/riscv-011.c
	src/target/riscv/riscv-013.c
	src/target/riscv/riscv.c
	src/target/riscv/riscv.h
	src/target/target.c
	tcl/target/gd32vf103.cfg

Change-Id: I1321f62ba719419e58f93b2195f2540bd62f50d2
2020-10-15 12:32:45 -07:00
Antonio Borneo 4fc61a2f9d riscv: fix compile error
The commit b68674a1da ("Upstream tons of RISC-V changes.") was
proposed well before commit 3ac010bb9f ("Fix debug prints when
loading to flash"), but the merge got in different order.
After latest merge, the master branch fails to compile.

Fix the compile error.

Change-Id: Ia3bd21d970d589343a3b9b2d58c89e0c49f30015
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5856
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
2020-10-14 11:05:22 +01:00
Tim Newsome b68674a1da Upstream tons of RISC-V changes.
These are all the changes from https://github.com/riscv/riscv-openocd
(approximately 91dc0c0c) made just to src/target/riscv/*. Some of the
new code is disabled because it requires some other target-independent
changes which I didn't want to include here.

Built like this, OpenOCD passes:
* All single-RV32 tests against spike.
* All single-RV64 tests against spike.
* Enough HiFive1 tests. (I suspect the failures are due to the test
suite rotting.)
* Many dual-RV32 (-rtos hwthread) against spike.
* Many dual-RV64 (-rtos hwthread) against spike.

I suspect this is an overall improvement compared to what's in mainline
right now, and it gets me a lot closer to getting all the riscv-openocd
work upstreamed.

Change-Id: Ide2f80c9397400780ff6780d78a206bc6a6e2f98
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/5821
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2020-10-14 05:43:05 +01:00
Benedikt-Alexander Mokroß fc7edd57ac flash/nor/at91sam4: ATSAMG55x19 Rev.B
Add support for ATSAMG55x19 Rev.B.
Both chips have nearly the same cidr, however, Rev.B has an incremented version.

Change-Id: I5939c41fa5d54c4d3bfb850964974b878f709d13
Signed-off-by: Benedikt-Alexander Mokroß <mokross@gessler.de>
Reviewed-on: http://openocd.zylin.com/5825
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-10-14 05:40:27 +01:00
Tobias Kaiser fb477376da
Do not throw error if RISC-V tselect unimplemented (#542)
* Do not throw error if RISC-V tselect unimplemented

A RISC-V hart without Trigger Module may not implement any of the
associated CSRs such as tselect according to the specification.
riscv_enumerate_triggers previously threw an error in this case, but
only on the first invocation due to r->triggers_enumerated being set
regardless of this. Due to the propagation of this error condition to
disable_triggers and riscv_openocd_step, such a hart would remain
halted after the first 'step' (or 'continue') of a debug session.

This problem can be reproduced with the Ibex RISC-V CPU when
the DbgTriggerEn parameter is set to zero.

This commit changes the behavior of riscv_enumerate_triggers to
return ERROR_OK when tselect was not readable. This fixes the
described malfunction.

Change-Id: Ie813cb119b03702fe708801b5f3581f9bf337243
Signed-off-by: Tobias Kaiser <kaiser@tu-berlin.de>

* Add debug message if RISC-V tselect not readable

Change-Id: Ic3ad5bff9de5c50142cad983f351ce0099cec5c8
Signed-off-by: Tobias Kaiser <kaiser@tu-berlin.de>

* RISC-V triggers: continue if tselect is unreadable

In riscv_enumerate_triggers, even if for one hart tselect cannot be
accessed, other harts might provide trigger support. For this reason,
"continue;" is the appropriate action on a read failure of tselect,
which indicates that triggers are not implemented, instead of
"return ERROR_OK;".

Change-Id: Ied56f3e237b76195a15bfde159532eda9d347d21
Signed-off-by: Tobias Kaiser <kaiser@tu-berlin.de>
2020-10-12 09:16:12 -07:00
Antonio Borneo 3ffa14b043 target/aarch64: fix use of 'target->private_config'
The function adiv5_jim_configure() casts the void pointer
'target->private_config' to a struct adiv5_private_config pointer.
This is tricky in case of aarch64, where the private data are in a
struct aarch64_private_config that has as first element the struct
adiv5_private_config.

While the current solution is working fine, it's not clean and
requires special attention for any further code development.

Override 'target->private_config' to the correct pointer while
calling adiv5_jim_configure().

Change-Id: Ic2fc047dd1e57013943d96e6d5879a919d1eb7b3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5847
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-10-11 15:53:52 +01:00
Kevin Yang 63d3640add target/aarch64: Use apnum setting
Change aarch64 to use ap-num setting if provided. Fall back to original
behavior of using first AP when ap-num is invalid.

Change-Id: I0d3624f75c86ba5fd5a322ac60856dbbb6e71eaf
Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5831
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-11 15:53:43 +01:00
Tim Newsome 6c1bd05088
Add memory sample feature (#541)
* Add memory sampling feature.

Currently only gets 10 samples per second, but the overall scaffolding
looks like it works.

Change-Id: I25a2bbcba322f2101c3de598c225f83c902680fa

* Basic memory sample speed-ups.

977 samples/second.

Change-Id: I6ea874f25051aca1cbe3aa2918567a4ee316c4be

* Add base64 dumping of sample buffer.

We can't just dump raw data, because the API we use to get data to the
"user" uses NULL-terminated strings.

Change-Id: I3f33faaa485a74735c13cdaad685e336c1e2095f

* WIP on optimizing PC sampling.

1k samples per second on my laptop, which is roughly double what it was.

Change-Id: I6a77df8aa53118e44928f96d22210df84be45eda

* WIP

Change-Id: I4300692355cb0cf997ec59ab5ca71543b295abb0

* Use small batch to sample memory.

5k samples/second. No error checking.

Change-Id: I8a7f08e49cb153699021e27f8006beb0e6db70ee

* Collect memory samples near continuously.

Rewrite OpenOCD's core loop to get rid of the fixed 100ms delay.
Now collecting 15k samples/second.

Change-Id: Iba5e73e96e8d226a0b5777ecac19453c152dc634

* Fix build.

Change-Id: If2fe7a0c77e0d6545c93fa0d4a013c50a9b9d896

* Fix the mess I left after resolving conflicts.

Change-Id: I96abd47a7834bf8f5e005ba63020f0a0cc429548

* Support 64-bit address in memory sampling.

* Support sampling 64-bit values.

* Better error reporting. WIP on 64-bit support.

* Speed up single 32-bit memory sample.

21k samples/second.

* WIP on review feedback.

Change-Id: I00e453fd685d173b0206d925090beb06c1f057ca

* Make memory sample buffers/config per-target.

Change-Id: I5c2f5997795c7a434e71b36ca4c712623daf993c

* Document, and add bucket clear option.

Change-Id: I922b883adfa787fb4f5a894db872d04fda126cbd
Signed-off-by: Tim Newsome <tim@sifive.com>

* Fix whitespace.

Change-Id: Iabfeb0068d7138d9b252ac127d1b1f949cf19632
Signed-off-by: Tim Newsome <tim@sifive.com>

* Document sample buffer full behavior.

Change-Id: Ib3c30d34b1f9f30cf403afda8fdccb850bc8b4df
Signed-off-by: Tim Newsome <tim@sifive.com>

* Actually clear the sample buffer in dump_sample_buf.

Change-Id: Ifda22643f1e58f69a6382abc90474659d7330ac5
Signed-off-by: Tim Newsome <tim@sifive.com>

* Use compatible string formatting.

Change-Id: Ia5e5333e036c1dbe457bc977fcee41983b9a9b77
Signed-off-by: Tim Newsome <tim@sifive.com>
2020-10-07 14:31:36 -07:00
Antonio Borneo 9a877a83a1 drivers/jlink: fix (again) calculate_swo_prescaler formula
The prescaler computation should round at the nearest integer
value, not to the next integer value.

Change-Id: I957e0774421211f3c4ba4b312738b1c67b87c4a2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 051e80812b ("drivers/jlink: fix calculate_swo_prescaler formula")
Reviewed-on: http://openocd.zylin.com/5846
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2020-10-03 11:23:22 +01:00
Andreas Fritiofson 87d2651edc Update user dir config file search path
Search in XDG_CONFIG_HOME as per XDG Base Directory Specification
in addition to $HOME/.openocd.

On Darwin, search in ~/Library/Preferences/org.openocd/ which
appears to be one of the conventional locations.

Make $OPENOCD_SCRIPTS highest priority on all platforms, previously
it was only higher on WIN32.

Update the documentation to reflect the search order.

Change-Id: Ibaf4b59b51fdf452712d91b47ea2b5312bb5ada9
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3890
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:23:12 +01:00
Karl Palsson 2ff1824a87 FreeRTOS: strip duplicate line returns
Log lines already print a new line, so these superfluous \r\n result in
blank lines being printed in the log.  Remove per review comment
request.

Change-Id: I8f5b20776634cf70ce4490fc4f732c916130928a
Signed-off-by: Karl Palsson <karlp@etactica.com>
Reviewed-on: http://openocd.zylin.com/5843
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-10-03 11:22:52 +01:00
Karl Palsson 4dade98c44 FreeRTOS: properly read on big endian systems.
Remember, don't cast your pointers between types of different sizes!

While the FreeRTOS handlers attempt to account for different pointer and
list widths, the types used are always fixed, so this will _remain_
broken if/when someone targets FreeRTOS on 8/16/64 bit targets. (Note
that this patch does not _change_ that, it was fixed to 32bit before as
well)

In the meantime, this properly handles 32bit reads on a mips BE system
(ath79) as well as remaining fully functional on x86_64.

Change-Id: I677bb7130e25dccb7c1bee8fabaee27371494d00
Signed-off-by: Karl Palsson <karlp@etactica.com>
Reviewed-on: http://openocd.zylin.com/5842
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-10-03 11:22:06 +01:00
Kevin Burke cbbec2dce5 ARM|Driver: Add DPI Driver for emulation
This driver provides support for Cadence JTAG BFM

The "jtag_dpi" driver implements a JTAG driver acting as a client for the
SystemVerilog Direct Programming Interface (DPI) for JTAG devices.
DPI allows OpenOCD to connect to the JTAG interface of a hardware model
written in SystemVerilog, for example, on an emulation model of
target hardware.

Tested on Ampere emulation with Altra and Altra Max models

Change-Id: Iaef8ba5cc1398ee2c888f39a606e8cb592484625
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5573
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:21:51 +01:00
Daniel Trnka 87b95ab212 target/cortex_m.c: vector_catch command checks if a target is examined
If a target is not examined, command vector_catch crashes while accessing
the debug_ap NULL pointer.

maskisr and reset_config commands don't require this check.

Change-Id: I949b6f6e8b983327dd98fbe403735141f8f0b5d6
Signed-off-by: Daniel Trnka <daniel.trnka@gmail.com>
Reviewed-on: http://openocd.zylin.com/5813
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:21:33 +01:00
Mete Balci d7d70c2719 target/aarch64: a64 disassembler
Add A64 (AArch64) Disassembler using Capstone framework.

Change-Id: Ia92b57001843b11a818af940a468b131e42a03fd
Signed-off-by: Mete Balci <metebalci@gmail.com>
[Antonio Borneo: Rebased on current HEAD]
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5004
Tested-by: jenkins
2020-10-03 11:21:15 +01:00
Ulrich-Lorenz Schlüter a31e579e87 tcl: board/dp_busblaster_v4 Busblaster v4.1a by Seed Studio added
Change-Id: I53141d7f6f022f9dee641858f5fb0e0b70c049f8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Ulrich-Lorenz Schlüter <audiomobster@gmail.com>
Reviewed-on: http://openocd.zylin.com/5549
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:20:59 +01:00
Jan Kowalewski 1593e4a47e tcl/board: Add QuickLogic QuickFeather configuration
Add configuration for QuickLogic QuickFeather development kit.

Change-Id: I39120714bf0bcafa86e0071c38da84a7d9f12a0d
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Reviewed-on: http://openocd.zylin.com/5803
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-10-03 11:20:43 +01:00
Jan Kowalewski c3166b43e4 tcl/target: Add QuickLogic EOS S3 MCU configuration
Add configuration for QuickLogic EOS S3 MCU target.

Change-Id: I375057ff387a826e632f194843dbd92148b0c5dd
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Reviewed-on: http://openocd.zylin.com/5802
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:20:30 +01:00
Tom Hebb e2cfd4e063
Improve support for GD32VF103 MCU (#538)
* riscv: work around buggy hart states during reset in some DMs

As described in the comment this change adds, the GD32VF103 DM reports
that the hart is in more than one state while it is resetting. Because
of this, the current code acknowledges resets before they actually
complete. This sometimes prevents havereset from getting cleared as
intended, leading to a spurious "Hart 0 unexpectedly reset!" message the
next time riscv_is_halted() gets called.

To work around this, check for the absence of the unavailable state
rather than the presence of the running or halted states. This behavior
is also arguably more true to the spec than what exists now: Section 3.2
states that "The system may take an arbitrarily long time to come out of
reset, as reported by allunavail, anyunavail."

Change-Id: I34e90a16233125608bce8e4c2414dbead637600e
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>

* riscv: support custom reset-assert scripts

The reset-assert event is used, if present, to override the default
reset logic for ARM and MIPS cores. Do the same for RISC-V so that
devices with buggy ndmreset functionality (like GD32VF103) or
nonstandard reset sequences can specify the appropriate logic in Tcl.

Change-Id: I5e12077d67509853edb8ef3ad3f037f293a5fbb6
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>

* tcl/target: support GD32VF103 RISC-V MCU

The GD32VF103 is a low-cost 32-bit RISC-V microcontroller with
peripherals that are more-or-less compatible with the STM32F103 ARM
microcontroller. It is available on several low-cost dev boards, such as
the Sipeed Longan Nano, which is what I am testing on.

Add initial support for this chip, including a workaround for a buggy
ndmreset line (i.e. one that doesn't actually trigger a reset) in its
integrated debug module. Use the existing GD32VF103 flash driver that
was ported from the vendor's code in commit 48e40f3513 ("Add support
for GD32VF103 flash").

Change-Id: Iadac47ceb5437b8e18f3d35901388f10fef9f876
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>

* tcl/target/gd32vf103: add main flash alias

The GD32VF103 creates an alias to either main flash or the bootloader at
0x0, depending on how it was booted. As such, we want to indicate to
debuggers that the memory at 0x0 is flash and so cannot support software
breakpoints. To do this, add an alias to the main flash in the config.
This isn't strictly accurate in the case where we're running the
bootloader, but it still suits our purpose of fixing breakpoint
behavior.

Change-Id: I9eb8462d354f096eee231c0e5e2bffa538a5903e
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2020-10-01 11:06:11 -07:00
Samuel Obuch 6db3ed2c86
Improve riscv expose_[csrs|custom] commands (#536)
* Improve riscv expose_[csrs|custom] commands

* Add option to specify custom name for registers.
* Allow to call commands multiple times without loss of previous data.
* Make sure the commands can only be used in the config phase (before "init").
* Validity checks and warnings.
* Change commands to be per target.
* Fix memory leaks.
* Also fix unrelated memory leaks to keep valgrind happy.

Signed-off-by: Samuel Obuch <sobuch@codasip.com>

* fixes after review

* improve error message
2020-10-01 11:05:41 -07:00
Tom Hebb 2c909f8faa
riscv: remove unused riscv_error_t type (#539)
This seems to be completely unused in these two files. It was probably
accidentally copied from riscv-011.c, where it is used.

Change-Id: I3f7ad8b2d26b005d3ea4438e2b3ec46a6c801792
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2020-09-28 09:46:47 -07:00
Tom Hebb db2e8ad10a
riscv: remove outdated documentation in riscv.c (#540)
These comments appear to have been copied from riscv-011.c, for which
they are accurate. However, it makes no sense to also have them in
riscv.c, because 1) none of the things described are actually in
riscv.c; and 2) riscv-013.c has an entirely different code structure,
meaning everything in the comment is an implementation detail of
riscv-011.c. Remove the copy in riscv.c and just leave the one in
riscv-011.c.

Change-Id: I2873af1522482681325525040b3caad2ddddce9d
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2020-09-28 09:45:18 -07:00
Tim Newsome 13b2ed5ec5
Minor cleanups. (#537)
Requested in http://openocd.zylin.com/#/c/5821/9

Change-Id: I775d9dd3cc8642361d4d129a05053ee3d27b99bb
Signed-off-by: Tim Newsome <tim@sifive.com>
2020-09-28 09:41:08 -07:00
Adrian Negreanu 051e80812b drivers/jlink: fix calculate_swo_prescaler formula
a) TPIU_ACPR is defined as:
	SWO_baudrate = TRACECLKIN/(TPIU_ACPR +1)

b) TPIU_ACPR is set by armv7m_trace_tpiu_config()
	target_write_u32(target, TPIU_ACPR, Prescaler-1), so
	TPIU_ACPR = Prescaler-1

Replacing TPIU_ACPR in a), we get:
	SWO_baudrate = TRACECLKIN/Prescaler, so

c)	Prescaler = TRACECLKIN/SWO_baudrate

The Prescaler calculated by calculate_swo_prescaler() is greater by 1:
	Prescaler = TRACECLKIN/SWO_baudrate + 1

The second problem is that even in situations when
an exact baudrate match is possible,
the resulting TRACECLKIN/Prescaler already has a 3% deviation.

For example, TRACECLKIN=88000000, SWO_baudrate=500000,
calculate_swo_prescaler will return Prescaler=171.
The correct value should be Prescaler=176 (TPIU_ACPR=175).

Might be related to https://sourceforge.net/p/openocd/tickets/263/

Change-Id: Ib4d6df6e34685a9be4c2995cb500b2411c76e39b
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Reviewed-on: http://openocd.zylin.com/5807
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-27 17:40:12 +01:00
Tarek BOCHKATI 35e580373a Add support of STM32H72x/73x 1M (0x483)
STM32H72x/73x flash is similar to STM32H74x/75x,
except STM32H72x/73x devices have only one single flash bank.

Change-Id: I3d3422dc60234f8273172924f426200210f388cc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5792
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-27 17:39:59 +01:00
Marc Schink 67008e1bea Use capstone for ARM disassembler
Change-Id: I1c9bf3f8178d4a06babe23a918e4411833ebc418
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/4812
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-27 17:39:44 +01:00
Tim Newsome 675259382b
Minimally describe the BSCAN tunnel interface. (#533)
Change-Id: Ifffa815e6a4a73c551eddf28927583befa743641
Signed-off-by: Tim Newsome <tim@sifive.com>
2020-09-21 14:10:27 -07:00
Tarek BOCHKATI 762ddcb749 cortex_m: add detection of Cortex M35P and M55
Change-Id: I52599b2b09c2dc50c95d64059213c832d380ea31
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5799
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:48 +01:00
Tarek BOCHKATI f2c83fade3 cortex_m: read and display core security state
Change-Id: I0fce3c66af7e98df2dc2258daf0d6af661e29ae7
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5798
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:44 +01:00
Tarek BOCHKATI 6e33947899 armv8-m: add SecureFault exception
Change-Id: I4e1963631e834b6334bc917e956c2db4464b7b08
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5797
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:04 +01:00
Tarek BOCHKATI c20f65b632 GitHub: add workflow to provide an openocd snapshot binaries for win32
This change could be used within OpenOCD GitHub forks.

Once workflow actions are enabled in the GitHub project, this workflow
will be run automatically on each push into OpenOCD.

This workflow will provide a neutral build of openocd for win32, then
the package will be available for download in Actions section.
Note: the artifact will be deleted after 90 day (actual GitHub rules)

If the push is a tag, the generated package will be uploaded to release
pane under the corresponding release, and it will resides forever.

The built openocd enables libusb1, hidapi and libftdi adapters,
and could be extended to cover more adapters and Oses

PS: ./contrib/cross-build.sh updated to build libftdi from source like
libusb1 and hidapi.

Change-Id: I290c8aa14a12548e2dcb6a0eee456430ea44ab9f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5594
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:34:48 +01:00
Jan Matyas 11c4f89b32
Allocate RISC-V arch_info during target creation (#531)
* Allocate RISC-V arch_info during target creation

* Ensured that target->arch_info is allocated as soon as the
  target is created. Needed so that per-target config commands
  (e.g. "riscv set_mem_access") can be executed also in the
  OpenOCD's config phase (before calling "init").

* Added several assert()'s for safety.

Signed-off-by: Jan Matyas <matyas@codasip.com>

* Removed a TODO comment
2020-09-17 13:20:12 -07:00
Tim Newsome 1712dc2c54
{read_from,write_to}_buf -> buf_[sg]et_u{32,64} (#529)
Requested in http://openocd.zylin.com/#/c/5821/7/src/target/riscv/riscv-013.c

Change-Id: I764d77192e902466eed8a6ccf1042b42016afb7e
Signed-off-by: Tim Newsome <tim@sifive.com>
2020-09-15 11:40:37 -07:00
Tim Newsome d4bcd8846a
Make a couple variables static. (#528) 2020-09-15 11:39:32 -07:00
Samuel Obuch 22d771d20c
Allow to put breakpoints in memories without 16 bit access (#525)
* Allow to put breakpoints in memories without 16 bit access

Signed-off-by: Samuel Obuch <sobuch@codasip.com>

* tmp

* tmp

* tmp

* read/write by any size for breakpoints

* fix style for checkpatch
2020-09-14 08:00:59 -07:00
Simon Cook 3a4717193a
Update Signed-off-by Makefile changes to work for out of tree builds (#532)
Change-Id: I617ca9f0eb6a473528646dfb80d75b6bafaa0635
Signed-off-by: Simon Cook <simon.cook@embecosm.com>
2020-09-14 07:58:14 -07:00
Samuel Obuch 2ea18ef7f6
Selection of memory access methods, aampostincrement detection (#508)
* Add flexible selection of memory access methods, detection of aampostincrement.

New configuration command introduced: "riscv set_mem_access".
It allows to specify which RISC-V memory access methods (progbuf,
sysbus and/or abstract access) should be tried and in which order
of priority.

Command "riscv set_prefer_sba" is left and works in backward
compatible way, but is marked as deprecated.

First time abstract memory access is executed, it is tried with
set aampostincrement bit. If the abstract command fails or the
address is not incremented correctly, aampostincrement will not
be used for any subsequent accesses.

Signed-off-by: Samuel Obuch <sobuch@codasip.com>

* remove unnecessary variable

* fix doc
2020-09-10 13:57:51 -07:00
Tim Newsome c3c2f1197b
Attempt to enforce signed-off-by lines in commits. (#523)
* Attempt to enforce signed-off-by lines in commits.

Requested by upstream OpenOCD maintainers.

Change-Id: Iae09058dd690777d4f787cf4c6096233ca7f98ec
Signed-off-by: Tim Newsome <tim@sifive.com>

* Remove unnecessary comment.

Change-Id: If36c6855d46bfc3a1e2e6844d9beac543d212e3a
Signed-off-by: Tim Newsome <tim@sifive.com>
2020-09-10 13:55:45 -07:00
Tim Newsome 2bde4a918a
Add empty usage strings back in. (#526)
Comment on #521 pointed out that they're required.
2020-09-10 13:53:27 -07:00
ZL2WRW 48e40f3513
Add support for GD32VF103 flash (#518)
* Backport of GD32VF103 flash driver from https://github.com/riscv-mcu/riscv-openocd (GPL2 licensed)
Tested with a "Longan Nano" GD32VF103 dev board and seems to be working (flash can be read, erased and written).

* Modify src/flash/nor/gd32vf103.c to comply with Travis CI code style requirements.

* Modified README to include GD32VF103 in list of supported flash devices.
2020-09-07 12:27:08 -07:00
Antonio Borneo 3934483429 target: avoid checking for non NULL pointer to free it
The function free() can be called with a NULL pointer as argument,
no need to check the argument before. If the pointer is NULL, no
operation is performed by free().

Remove the occurrences of pattern:
	if (ptr)
		free(ptr);

In target/openrisc/jsp_server.c, an error is logged if the ptr was
already NULL. This cannot happen since the pointer was already
referenced few lines before and openocd would have been already
SIGSEGV in that case, so remove the log.

Change-Id: I290a32e6d4deab167676af4ddc83523c830ae49e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5809
Tested-by: jenkins
2020-09-05 20:47:11 +01:00
Antonio Borneo 0dad8cbfe9 drivers/buspirate: remove empty lines at end of file
Change split from http://openocd.zylin.com/5172/ to avoid
conflicts with other pending changes in gerrit.

Change-Id: Id3e21c92b3da7ddce7b00664280da2143c06f172
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5604
Tested-by: jenkins
2020-09-05 18:44:19 +01:00
Antonio Borneo 24db985f60 jtag: avoid checking for non NULL pointer to free it
The function free() can be called with a NULL pointer as argument,
no need to check the argument before. If the pointer is NULL, no
operation is performed by free().

Remove the occurrences of pattern:
	if (ptr)
		free(ptr);

Change-Id: I2938e333bd1eac5218bd67aefb9d8f373da017a8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5810
Tested-by: jenkins
2020-09-05 18:42:20 +01:00
Stafford Horne a098a14eb5 openrisc: Fix segv jsp due to free of unallocated data
The prompt pointer in the jtag serial port is never zero'd or allocated.
Completely remove it since there is not much use for it as the target
software will provide the actual prompt.

Change-Id: Id95d8ccb9f725e53b9d03386b11d91eba1cd6ef4
Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-on: http://openocd.zylin.com/4093
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-05 18:11:54 +01:00
Antonio Borneo f788949651 openocd: fix command's usage string
The usage string should contain only the command parameters.
OpenOCD will automatically prepend the command name to the usage
string while dumping the usage or help message.

Remove the repeated command name from the usage string.

Change-Id: If10a0f1c254aee302b9ca08958390b7f21cdb21b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5824
Tested-by: jenkins
2020-09-05 17:13:10 +01:00
Antonio Borneo 25b8b37638 jtag/aice: fix command's usage string
The usage string should contain only the command parameters.
OpenOCD will automatically prepend the command name to the usage
string while dumping the usage or help message.

Remove the repeated command name from the usage string.

Change-Id: Idbc301b34fab19e221131d232577c1629568e6ea
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5823
Tested-by: jenkins
2020-09-05 17:13:05 +01:00
Antonio Borneo 42faa8a4bc target/arc: fix command's usage string
The usage string should contain only the command parameters.
OpenOCD will automatically prepend the command name to the usage
string while dumping the usage or help message.

Remove the repeated command name from the usage string.

Change-Id: I691094a6395acb0e4ea3bea2347ff38379002464
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5822
Tested-by: jenkins
2020-09-05 17:13:00 +01:00
Antonio Borneo d3249fd45a openocd: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.

Change-Id: I4de49bf02c9e37b72240224c23fc83abe8a4fa83
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5819
Tested-by: jenkins
2020-09-05 17:12:44 +01:00
Antonio Borneo 99add6227f target: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.

While there, fix prototype mismatch between header and C file of
the function armv7a_l1_d_cache_inval_virt().

Change-Id: I434bd241fa5c38e0c15d22cda2295097050067f5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5818
Tested-by: jenkins
2020-09-05 17:12:39 +01:00