Do not throw error if RISC-V tselect unimplemented (#542)
* Do not throw error if RISC-V tselect unimplemented A RISC-V hart without Trigger Module may not implement any of the associated CSRs such as tselect according to the specification. riscv_enumerate_triggers previously threw an error in this case, but only on the first invocation due to r->triggers_enumerated being set regardless of this. Due to the propagation of this error condition to disable_triggers and riscv_openocd_step, such a hart would remain halted after the first 'step' (or 'continue') of a debug session. This problem can be reproduced with the Ibex RISC-V CPU when the DbgTriggerEn parameter is set to zero. This commit changes the behavior of riscv_enumerate_triggers to return ERROR_OK when tselect was not readable. This fixes the described malfunction. Change-Id: Ie813cb119b03702fe708801b5f3581f9bf337243 Signed-off-by: Tobias Kaiser <kaiser@tu-berlin.de> * Add debug message if RISC-V tselect not readable Change-Id: Ic3ad5bff9de5c50142cad983f351ce0099cec5c8 Signed-off-by: Tobias Kaiser <kaiser@tu-berlin.de> * RISC-V triggers: continue if tselect is unreadable In riscv_enumerate_triggers, even if for one hart tselect cannot be accessed, other harts might provide trigger support. For this reason, "continue;" is the appropriate action on a read failure of tselect, which indicates that triggers are not implemented, instead of "return ERROR_OK;". Change-Id: Ied56f3e237b76195a15bfde159532eda9d347d21 Signed-off-by: Tobias Kaiser <kaiser@tu-berlin.de>
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@ -3850,8 +3850,14 @@ int riscv_enumerate_triggers(struct target *target)
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riscv_reg_t tselect;
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int result = riscv_get_register_on_hart(target, &tselect, hartid,
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GDB_REGNO_TSELECT);
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if (result != ERROR_OK)
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return result;
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/* If tselect is not readable, the trigger module is likely not
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* implemented. There are no triggers to enumerate then and no error
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* should be thrown. */
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if (result != ERROR_OK) {
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LOG_DEBUG("Cannot access tselect register on hart %d. "
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"Assuming that triggers are not implemented.", hartid);
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continue;
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}
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for (unsigned t = 0; t < RISCV_MAX_TRIGGERS; ++t) {
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r->trigger_count[hartid] = t;
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