The number of command arguments will always be 0 or more, so use
the right type in handlers. This has a cascading effect up through
the layers, but the new COMMAND_HANDLER macros prevented total chaos.
By using CALL_COMMAND_HANDLER, parameters can be reordered, added, or
even removed in inherited signatures, without requiring revisiting
all of the various call sites.
The "remove (forward) declarations" patch goofed indentation on the
"cortexa8_target" struct; fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
ARM11 and newer cores include updated ETM modules. Recognize
their version codes and some key config differences. Sanity
checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1).
This still handles only scan chain 6, with at most 128 registers.
Newer cores (mostly, Cortex) will need to use the DAP instead.
Note that the newer ETM modules don't quite fit the quirky config
model of the older ones ... having more port widths is easy, but
the modes aren't the same. That still needs to change.
Fix a curious bug ... how did the register cache NOT get saved??
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.
Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.
The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP. Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ETM itself use the new toplevel ETM handle, instead
of the to-be-removed lower level one. As of this patch,
nothing should be using the old ARM7/ARM9-specific handle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make both useful ETM port drivers (etb, etm_dummy) use the new
toplevel ETM handle, instead of the to-be-removed lower level one.
Do the same for the "oocd-trace" prototype too; and fix its
error reporting paths: return failure codes, don't exit(), etc
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ARM7 and ARM9 cores use the new toplevel ETM handle to
trigger ETM setup, not the to-be-removed lower level one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename "struct armv4_5_common_s" as "struct arm". It needs
a bit more work to be properly generic, and to move out of
this header, but it's the best start we have on that today.
Add and initialize an optional ETM pointer, since that will
be the first thing that gets generalized.
The intent being: all ARMs should eventually derive from
this "struct arm", so they can reuse the current ETM logic.
(And later, more.) Currently the ARM cores that *don't* so
derive are only ARMv7-M (and thus Cortex-M3) and ARM11.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add 'const' keyword to 'char *' parameters to allow command handlers to
pass constant string arguments. These changes allow the 'args' command
handler to be changed to 'const' in a subsequent patch.
Subsequent patches expect all command handlers to use a uniform
parameter naming scheme. In the entire tree, these two files used
standard 'argv' instead of our non-standard 'args'. This patch opts
to reduces the noise required to unify the command handlers, using
dominant 'args' form.
A future patch may be used to convert us back to the standard argv, but
that requires coordination with all developers to minimize disruptions.
Separates various groups of files to be built in logical succession.
In each layer, the core module (target.c, nand.c, etc.) is built _after_
their helper modules (e.g. image.c, nand_ecc.c) but _before_ any of
their drivers (e.g. arm966e.c, mx3_nand.c).
This allows problems introduced at the bottom of the stack to result
in build failures as soon as possible, as the helpers and core should
wrap portions of them.
Various cleanups of ETM related code.
- Saner error return paths
- Simplify arm7_9 init ... no need for extra zeroing!
- Shrink some lines
- Tweak some diagnostics
- Use shorter name for ETM struct type.
- Don't exit()
and similar. The diagnostics look forward to having
this ETM code work with more than just ARM7/ARM9.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "ARM720 uses the new inheritance/nesting scheme" patch
wrongly scrubbed a calloc() from arm720t_target_create().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Start switching MMU handling over to a more sensible scheme.
Having an mmu() method enables MMU-aware behaviors. Not having
one kicks in simpler ones, with no distinction between virtual
and physical addresses.
Currently only a handful of targets have methods to read/write
physical memory: just arm720, arm920, and arm926. They should
all initialize OK now, but the arm*20 parts don't do the "extra"
stuff arm926 does (which should arguably be target-generic).
Also simplify how target_init() loops over all targets by making
it be a normal "for" loop, instead of scattering its three parts
to the four winds.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
First cut of these commands. Øyvind tinkered a bit with
the number parsing to bring it up to speed + rebased it.
Ready for testing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- improve some names -- a "default" prefix is not descriptive
- add doxygen @todo entries for some issues
- avr8 isn't ever going to need those MMU hooks
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch introduced a bug preventing flash writes from working
on Cortex-M3 targets like the STM32. Moreover, it's the wrong
approach for handling no-MMU targets.
The right way to handle no-MMU targets is to provide accessors
for physical addresses, and use them everywhere; and any code
which tries to work with virtual-to-physical mappings should use
a identity mapping (which can be defaulted).
And ... we can tell if a target has an MMU by seeing if it's
got an mmu() method. No such methood means no MMU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's been about a year since these were deprecated and, in most
cases, removed. There's no point in carrying that documentation,
or backwards compatibility for "jtag_device" and "jtag_speed",
around forever. (Or a few remnants of obsolete code...)
Removed a few obsolete uses of "jtag_speed":
- The Calao stuff hasn't worked since July 2008. (Those Atmel
targets need to work with a 32KHz core clock after reset until
board-specific init-reset code sets up the PLL and enables a
faster JTAg clock.)
- Parport speed controls don't actually work (tops out at about
1 MHz on typical HW).
- In general, speed controls need to live in board.cfg files (or
sometimes target.cfg files), not interface.cfg ...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add comments (Doxygen and normal), remove unused code,
shrink some overlong lines. Get rid of a forward decl.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch changes the duration_* API in several ways. First, it
updates the API to use better names. Second, string formatting has
been removed from the API (with its associated malloc). Finally, a
new function added to convert the time into seconds, which can be
used (or formatted) by the caller. This eliminates hidden calls to
malloc that require associated calls to free().
This patch also removes the useless extern keyword from prototypes,
and it eliminates the duration_t typedef (use 'struct duration').
These API also allows proper error checking, as it is possible for
gettimeofday to fail in certain circumstances.
The consumers have all been chased to use this new API as well, as
there were relatively few cases doing this type of measurement.
In most cases, the code performs additional checks for errors, but
the calling code looks much cleaner in every case.
Reduces confusion about location of associated routines and
reduces clutter in the arm11 header.
Removes extra whitespace around the lines touched by these changes.
Make several functions be static. Shrink some of the overlong
lines. Use pure tab indents in some places that mixed in spaces.
This gives a minor object code shrink (about 2% on amd64).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Resolve serious bug inserted by the "target: require working
area for physical/virtual addresses to be specified" patch.
It forced use of (invalid) virtual addresses when the MMU
was disabled, and vice versa.
Observed to break at least Cortex-M3, ARM926, ARM7TDMI whenever
work areas are used, such as during bulk writes to flash, DDR2,
SRAM, and so on.
Also, fix overlong lines and whitespace goofs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move various embedded target structs to the beginnings of
their containers ... pretty much the way C++ or Obj-C
would for single inheritance.
This shrinks code that accesses those embedded structs by
letting common offsets use smaller instructions. Sample
before/after sizes (on amd64):
17181 312 0 17493 4455 arm920t.o
16810 312 0 17122 42e2 arm920t.o
Where the "after" is the smaller number, with this patch
over the ones leveraging that embedding knowledge.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove most remaining uses of target->arch_info from ARM
infrastructure, where it hasn't already been updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_armv7a() etc, replacing needless pointer traversals.
Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm7_9(), replacing needless pointer traversals.
Also: remove now-useless contents of arm7tdmi struct; it's
almost ready to be removed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm720(), replacing needless pointer traversals
and simplifying a bunch of nasty code. Stop setting arch_info
for arm720 type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_xscale(), replacing needless pointer traversals
and simplifying a bunch of code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Replace needless pointer traversals and simplify. Also remove most
remaining contents from arm9tdmi struct; it's almost removable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm926(), replacing needless pointer traversals
and simplifying a bunch of code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm920(), replacing needless pointer traversals
and simplifying. Stop setting arm9tdmi->arch_info for arm920
type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use new target_to_cm3() and target_to_armv7m() inlines,
instead of a series of x->arch_info conversions. Remove
arch_info, since nothing uses it.
Also fix an omission: the Cortex-M3 commands didn't verify
that they were operating on that kind of target. Add comment
about the ARMv7M version of that omission.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Provide a cleaner way to handle single inheritance of targets
in C, using the same model Linux does: structs containing other
structs, un-nested via calls to a "container_of()" macro that
are packaged in typesafe inline functions.
Targets already use this containment idiom, but make it much
more complicated because they un-nest using embedded "void *"
pointers ... in chains of up to five per target, which is all
pure needless complication. (Example: arm92x core, arm9tdmi,
arm7_9, armv4_5 ... on top of the base "target" class.)
Applying this scheme consistently simplifies things, and gets
rid of many error-prone untyped pointers. It won't change any
part of the type model though -- it just simplifies things.
(And facilitates more cleanup later on.)
Rule of thumb: where there's an X->arch_info void* pointer,
access to that pointer can and should be removed. It may be
convenient to set up pointers to some of the embedded structs;
and shrink their current "*_common" names (annoyingly long).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions; get rid of arm7tdmi_register_commands(), it's
not needed (just delegated); minor whitespace declutter.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make all functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Remove unneeded indirection for the write_memory() method. Make
a table static, remove a can't-happen case with nasty exit().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also remove needless arm966e_init_target(), in favor of the
arm9tdmi routine to which it delegates its work.
This saved over 100 bytes of code on x86_32.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
An init_target() wrapper isn't needed, and target_create()
can shrink a bit. Add a header comment and some doxygen.
Remove arm926ejs_catch_broken_irscan() which has been a NOP
for quite a few months now, and in any case duplicates logic
in the JTAG core to validate IR capture data. But force the
capture mask to 0x0f, so those tests are most effective.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
This saved almost 900 bytes of code on x86_32; it seems the
compiler can leverage its knowledge that these functions are
not called from the outside world...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The arm920t has a concept of read modify write cycles
that may have to be represented in the mrcmcr interface
eventually.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Fail watchpoint_add() if it's the same address but the
parameters are different ... don't just assume having
the same address means the same watchpoint! (Note that
overlapping watchpoints aren't detected...)
Handle unrecognized return codes more sanely; don't exit()!
And describe command params right.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Expose most DWT registers via Tcl; there are a few more, but
those are mostly for profiling along with the ITM. Having
this set available enables operations which aren't possible
with just the standard watchpoint operations.
The cycle counter may be interesting. Turn it on after reset
by setting the LSB of the dwt_ctrl register, and it counts
CPU clocks. You can program the comparator 0 watchpoint to
trigger on a given cycle count, rather than a data address.
Likewise, comparator 1 may be able to match data values given
address matches from one or two other comparators. (Not all
hardware supports this capability though; try it. That is
something the standard watchpoint methods should eventually
handle, for the single address case.)
Minor cleanup: remove needless functional indirection for
exposing the v7m architctural registers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There's no reason to read which interrupts are enabled from
the NVIC; that state isn't used. Plus, it's highly dynamic
since firmware can change it at any time; remove the support
for those state records.
Remove duplicate definition of DWT_CTRL address; shrink a line.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix the watchpoint error checks, and do them in add(), not later
in set() when it's mostly too late. Support the full range of
watchpoint sizes (1 to 32K bytes each), and check alignments.
Minor cleanup of DWT access: shrink lines, use "+" for address
calculations, comment a few issues. Add debug message reporting
DWT capabilities, matching the message for FBP, and some minor
code and spec review comments.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add Doxygen for the exported ARMv7-M interfaces.
Make the non-exported stuff static. Remove functions and
data which are now observably unused.
Add comment about a small speedup that the run_algorithm()
logic could use. Shrink a few too-long lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
improve default target->read/write_phys_memory, produce
more sensible error messages if the mmu interface
functions have not been implemented yet vs. will
not be implemented(e.g. cortex m3).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
To support breakpoints, flush data cache line and invalidate
instruction cache when 4 and 2 byte words are written.
The previous code was trying to write directly to the physical
memory, which was buggy and had a number of other situations
that were not handled.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Fixed bug: if virtual address for working memory was not specified
and MMU was enabled, then address 0 would be used.
Require working address to be specified for both MMU enabled
and disabled case.
For some completely inexplicable reason this fixes the regression
in svn 2646 for flash write in arm926ejs target. The logs showed
that MMU was disabled in the case below:
https://lists.berlios.de/pipermail/openocd-development/2009-November/011882.html
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Just use the array of names we're given, ignoring indices.
The "reserved means don't use" patch missed that change.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I'm suspecting this code can never have worked, since the
original commit (svn #335) in early 2008.
Fix is just copy/paste from another (working) function.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static, and fix some line-too-long issues.
Delete some now-obviously-unused code.
The forward decls are just code clutter; move their references
later, after the normal declarations. (Or vice versa.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Only the Feroceon code builds on this, so only routines it
reuses should be public.. Make most remaining functions
static, and fix some of the line-too-long issues.
The forward decls are just code clutter; move their references
later, after the normal declarations. Turns out we don't need
even one forward declaration in this file.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The Hex parser uses a fixed number of sections. When the
number of sections in the file is greater than that, the
stack get corrupted and a CHECKSUM ERROR is detected
which is very confusing.
This checks the number of sections read, and increases
IMAGE_MAX_SECTIONS so it works on my file.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Only type 1 branch instruction has a condition code, not type 2.
Currently they're both tagged with ARM_B which doesn't allow for the
distinction.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
A Thumb BLX instruction is branching to ARM code, and therefore the
first 2 bits of the target address must be cleared.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Currently, OpenOCD is always caching the PC value without the T bit.
This means that assignment to the PC register must clear that bit and set
the processor state to Thumb when it is set. And when the PC register
value is transferred to another register or stored into memory then
the T bit must be restored.
Discussion: It is arguable if OpenOCd should have preserved the original
PC value which would have greatly simplified this code. The processor
state could then be obtained simply by getting at bit 0 of the PC. This
however would require special handling elsewhere instead since the T bit
is not always relevant (like when PC is used with ALU insns or as an index
with some addressing modes). It is unclear which way would be simpler in
the end.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Whenever an unconditional branch with the H bits set to 0b10 is met, the
offset must be combined with the offset from the following opcode and not
ignored like it is now.
A comment in evaluate_b_bl_blx_thumb() suggests that the Thumb2 decoder
would be a simpler solution. That might be true when single-stepping of
Thumb2 code is implemented. But for now this appears to be the simplest
solution to fix Thumb1 support.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Calling it first with every opcodes and then testing if the opcode
was indeed a branch instruction is wasteful and rather strange.
If ever thumb_pass_branch_condition() has side effects (say, like
printing a debugging traces) then the result would be garbage for most
Thumb instructions which have no condition code.
While at it, let's make the nearby code more readable by reducing some of
the redundant brace noise and reworking the error handling construct.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make the "dap info" output more comprehensible:
- Don't show CIDs unless they're incorrect (only four bits matter)
- For CoreSight parts, interpret the part type
- Interpret the part number
- Show all five PID bytes together
- Other minor cleanups
Also some whitespace fixes, and shrink a few overlong source lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove needless debug handler state.
- "handler_installed" became wrong as soon as the second TRST+SRST
reset was issued ... so the handler was never reloaded after the
reset removed it from the mini-icache.
This fixes the bug where subsequent resets fail on PXA255 (if the
first one even worked, which is uncommon). Other XScale chips
would have problems too; PXA270 seems to have, IXP425 maybe not.
- "handler_running" was never tested; it's pointless.
Plus a related bugfix: invalidate OpenOCD's ARM register cache on reset.
It was no more valid than the XScale's mini-icache. (Though ... such
invalidations might be better done in "SRST asserted" callbacks.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Bit 5 shouldn't be used. Remove all support for modifying it.
Matches the exception vector table, of course ... more than one
bootloader uses that non-vector to help distinguish valid boot
images from random garbage in flash.
The wrong variable (pc instead of r0) was used. Furthermore, someone
did cover this error by stupidly silencing the compiler warning that
occurred before a dummy void reference to r0 was added to the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When dumping over 100 registers (as on most ARM9 + ETM cores),
aid readability by splitting them into logical groups.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The register names are perversely not documented as zero-indexed,
so rename them to match that convention. Also switch to lowercase
suffixes and infix numbering, matching ETB and EmbeddedICE usage.
Update docs to be a bit more accurate, especially regarding what
the "trigger" event can cause; and to split the issues into a few
more paragraphs, for clarity.
Make "configure" helptext point out that "oocd_trace" is prototype
hardware, not anything "real".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Passing "--std=gun99" is unfortunately not sufficient to make current
MinGW compilers conform with respect to checking printf format strings.
(The C runtime seems not to have problems.)
Fix by using a "gnu_printf" format specifier not "printf".
Generate a C struct with the data, and use that, instead of an
assembly language file. The assembly language causes issues on
Darwin and MS-Windows, which don't necessarily use GNU AS; or
if they do, don't necessarily use its ELF syntax.
It's also better in two other ways: fewer global symbols; and
the init-time size check gets optimized away at compile time.
(Unless it fails, in which case bigger chunks of the file vanish.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Based on some patches from <redirect.slash.nil@gmail.com>
for preliminary Win64 compilation. More such updates are
needed, but they need work. Compile tested on 64 and 32 bit
Linuxes, and Cygwin.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The LE check is obviously buggy (as easily triggered during some
testing), but I didn't audit the rest of the cases.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Resolve a "FIX" comment; yes that was superfluous given that the
JTAG core does that check by default. It was also buggy since it
wrote to a stack frame that went away before the write happened!!
Other fixes: remove pointless malloc(); zero-init scan_field_t
values wherever they appear; whitespace scrub; spelling fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Load the XScale debug handler from the read-only data section
instead of from a separate file that can get lost or garbaged.
This eliminates installation and versioning issues, and also
speeds up reset handling a bit.
Plus some minor bits of cleanup related to loading that handler:
comments about just what this handler does, and check fault codes
while writing it into the mini-icache.
The only behavioral changes should be cleaner failure modes after
errors during handler loading, and being a bit faster.
NOTE: presumes GNU assembly syntax, with ".incbin"; and ELF,
because of the syntax of the ".size" directive.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Streamline/shrink some needless JTAG stuff:
- Use #defines for the JTAG instructions; they can't ever change
- Remove an unused (!) shadow of tap->ir_length
- Stop using a copy of target->tap
- Don't bother saving the variant after sanity checking ir_length
Also, make target_create() work as on other targets: build the
register cache later, making init_target() no longer be a NOP.
Handle malloc failure; remove a comment that was obsoleted by the
not-so-new target syntax.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove unused and deprecated (in the arch spec) mode for loading
code into the *main* icache (vs the "mini" icache). Disable some
extremely noisy (and rarely useful) low-level debug messages
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Declare almost everything as static.
Move stuff to remove most forward references.
Remove most forward declarations.
Warn if the unimplemented register functions get called.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Just fill out the rest of the cache line with NOPs; don't change
the record of how much data we consumed. Otherwise the count of
how much data is left can roll over from positive to negative
("VERY positive") and skip the loop termination of zero.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a header comment referencing useful XScale specs.
Make most data static, and the tables readonly.
Scrub extra blank lines.
Return fault codes from one routine.
Remove a needless NOP methood.
(BUGFIX) When we update R0, mark R0 as dirty/valid ... not R15/PC!
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Observed:
openocd: core.c:318: jtag_checks: Assertion `jtag_trst == 0' failed.
The issue was that nothing disabled background polling during calls
from the TCL shell to "jtag_reset 1 1". Fix by moving the existing
poll-disable mechanism to the JTAG layer where it belongs, and then
augmenting it to always pay attention to TRST and SRST.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Zachary T Welch
David Brownell
Michael Bruck
Øyvind Harboe
Franck HÉRÉSON
Nicolas Pitre
Redirect 'Slash' NIL
David Brownell
Lennert Buytenhek
Yauheni Kaliuta