xscale: always reload handler after reset
Remove needless debug handler state. - "handler_installed" became wrong as soon as the second TRST+SRST reset was issued ... so the handler was never reloaded after the reset removed it from the mini-icache. This fixes the bug where subsequent resets fail on PXA255 (if the first one even worked, which is uncommon). Other XScale chips would have problems too; PXA270 seems to have, IXP425 maybe not. - "handler_running" was never tested; it's pointless. Plus a related bugfix: invalidate OpenOCD's ARM register cache on reset. It was no more valid than the XScale's mini-icache. (Though ... such invalidations might be better done in "SRST asserted" callbacks.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@ -890,8 +890,6 @@ static int xscale_arch_state(struct target_s *target)
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static int xscale_poll(target_t *target)
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{
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int retval = ERROR_OK;
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armv4_5_common_t *armv4_5 = target->arch_info;
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xscale_common_t *xscale = armv4_5->arch_info;
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if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING))
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{
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@ -900,8 +898,6 @@ static int xscale_poll(target_t *target)
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{
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/* there's data to read from the tx register, we entered debug state */
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xscale->handler_running = 1;
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target->state = TARGET_HALTED;
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/* process debug entry, fetching current mode regs */
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@ -1365,8 +1361,6 @@ static int xscale_resume(struct target_s *target, int current,
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LOG_DEBUG("target resumed");
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xscale->handler_running = 1;
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return ERROR_OK;
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}
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@ -1574,7 +1568,17 @@ static int xscale_deassert_reset(target_t *target)
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breakpoint = breakpoint->next;
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}
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if (!xscale->handler_installed)
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armv4_5_invalidate_core_regs(target);
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/* FIXME mark hardware watchpoints got unset too. Also,
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* at least some of the XScale registers are invalid...
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*/
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/*
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* REVISIT: *assumes* we had a SRST+TRST reset so the mini-icache
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* contents got invalidated. Safer to force that, so writing new
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* contents can't ever fail..
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*/
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{
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uint32_t address;
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unsigned buf_cnt;
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@ -1599,10 +1603,6 @@ static int xscale_deassert_reset(target_t *target)
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* it's using halt mode (not monitor mode), it runs in
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* "Special Debug State" for access to registers, memory,
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* coprocessors, trace data, etc.
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*
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* REVISIT: *assumes* we've had a SRST+TRST reset so the
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* mini-icache contents have been invalidated. Safest to
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* force that, so writing new contents is reliable...
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*/
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address = xscale->handler_address;
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for (unsigned binary_size = sizeof xscale_debug_handler - 1;
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@ -1673,10 +1673,6 @@ static int xscale_deassert_reset(target_t *target)
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xscale_resume(target, 1, 0x0, 1, 0);
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}
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}
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else
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{
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jtag_add_reset(0, 0);
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}
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return ERROR_OK;
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}
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@ -2967,8 +2963,6 @@ static int xscale_init_arch_info(target_t *target,
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}
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/* the debug handler isn't installed (and thus not running) at this time */
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xscale->handler_installed = 0;
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xscale->handler_running = 0;
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xscale->handler_address = 0xfe000800;
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/* clear the vectors we keep locally for reference */
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@ -86,8 +86,6 @@ typedef struct xscale_common_s
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reg_cache_t *reg_cache;
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/* current state of the debug handler */
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int handler_installed;
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int handler_running;
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uint32_t handler_address;
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/* target-endian buffers with exception vectors */
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