Commit Graph

6222 Commits

Author SHA1 Message Date
Tim Newsome 51f73a6769 Fix triggers for multi-gdb mode. 2017-09-26 15:40:49 -07:00
Tim Newsome 744894e965 Better debug messages. 2017-09-26 15:40:41 -07:00
Tim Newsome f0195868d3 Fall back on ndmreset if hartreset is unsupported. 2017-09-21 14:53:12 -07:00
Tim Newsome fe36097ff8 Fix reset for multicore. 2017-09-21 12:42:40 -07:00
Tim Newsome 848fe0ffcf Cleaning up single-hart reset. 2017-09-19 17:41:52 -07:00
Tim Newsome 4e701669b7 Merge pull request #113 from riscv/macos_build
Add clang build
2017-09-19 14:11:10 -07:00
Tim Newsome 60354cbea2 clang fix, don't allow unaligned uint64_t pointers 2017-09-18 14:56:46 -07:00
Tim Newsome ed9a04bde9 Remove unnecessary abs(). 2017-09-18 14:35:47 -07:00
Tim Newsome 0abd94b50c Make constants unsigned for clang. 2017-09-18 14:23:59 -07:00
Tim Newsome 604dfa0dcc Try to fix some clang warnings. 2017-09-18 14:03:33 -07:00
Tim Newsome 157a67a98a Be more clear in multi-core systems without -rtos
Don't print out there's a hart with XLEN of 0.
2017-09-18 11:29:14 -07:00
Tim Newsome ce20be3d78 Add support for F extension. 2017-09-14 16:23:47 -07:00
Tim Newsome f9b2549e20 Tell user how to increase timeout. 2017-09-11 12:11:24 -07:00
Tim Newsome a6ec1a0e68 Add timeout to another infinite loop. 2017-09-11 11:35:47 -07:00
Tim Newsome ce740d02d6 Properly show XLEN for each thread. 2017-09-01 11:29:15 -07:00
Tim Newsome 12aca4ab7e Merge branch 'riscv' into keepalive 2017-08-30 12:09:51 -07:00
Tim Newsome 3c25b9a0c4 Merge pull request #105 from riscv/memread
memory read is now completely stable even on intermittently slow targets
2017-08-29 17:33:51 -07:00
Tim Newsome 6721988ce3 Ensure read_memory() only reads each address once.
Previously it might read an address multiple times if an abstract
command took longer to execute than expected.

The new implementations reads from the target how far it has gotten
along reading memory, and resumes from there if cmderr=busy.

This ended up being a bigger change than I envisioned, but in the end it
deleted more lines than it added, so I'm happy. :-)
2017-08-29 17:25:04 -07:00
Tim Newsome 2efc415db4 Finally nailed memory read on slow targets
The downloaded program now post-increments, and there's no longer an
attempt to read the current address from the target. This made it easier
to fix the problem where at the start of the loop the current address
was already read (in regular entry) or has not yet been read (when the
first round through the loop encountered busy more than once, or busy
was encountered at least once later on).
2017-08-28 11:17:55 -07:00
Tim Newsome 5f53655e65 Fix off-by-one error. 2017-08-26 18:25:10 -07:00
Tim Newsome eef9442aa7 Remove redundant code. 2017-08-26 17:50:05 -07:00
Tim Newsome 5bdee8bc66 Fix off-by-3 error on 64-bit targets.
This caused everything to fall apart when debugging slow 64-bit targets.
2017-08-26 17:49:13 -07:00
Tim Newsome 8bcec87cc1 Remove unnecessary \n 2017-08-26 16:53:00 -07:00
Tim Newsome 92ef328161 Don't reset DMI when an abstract command is busy. 2017-08-25 18:14:08 -07:00
Tim Newsome a9bcc48064 Remove unnecessary newlines. 2017-08-25 18:14:08 -07:00
Palmer Dabbelt 322669ca98 Merge pull request #95 from riscv/memread
Fix block memory reads on slow targets.
2017-08-25 16:57:07 -07:00
Tim Newsome 4d0e88d887 Merge pull request #100 from riscv/riscv_timeout_commands
riscv: Add commands for setting timeouts
2017-08-25 09:49:15 -07:00
Liviu Ionescu b42bc76e2e server.c: fix clang warning
/Users/ilg/Work/openocd/openocd.git/src/server/server.c:305:22: error:
incompatible pointer types passing 'struct sockaddr_in *' to
parameter of type 'struct sockaddr *'
[-Werror,-Wincompatible-pointer-types]
getsockname(c->fd, &addr_in, &addr_in_size);
^~~~~~~~
/usr/include/sys/socket.h:687:50: note: passing argument to parameter
here
int     getsockname(int, struct sockaddr * __restrict, socklen_t *
__restrict)
2017-08-25 14:53:45 +03:00
Megan Wachs 94de39c221 riscv: Put commandd_handlers before they are needed. Tabs vs spaces. 2017-08-15 17:04:59 -07:00
Megan Wachs 879c274cb9 riscv: Add commands for setting timeouts 2017-08-15 15:59:40 -07:00
Tim Newsome 0ff4103a26 Reset address if target was busy during bust write
Improve Issue #98.

DebugCompareSections is still failing for me (with an instrumented
sometimes-slow spike), but MemTestBlock now passes reliably.
2017-08-15 15:47:35 -07:00
Tim Newsome 5c39079a62 Remove some unnecessary casts. 2017-08-15 14:29:24 -07:00
Tim Newsome 5092f96105 Add some keep_alive()s for use with slow targets. 2017-08-15 13:31:06 -07:00
Tim Newsome 0d74c8689d Fix block memory reads on slow targets.
The interesting new code concerns ignore_prev_addr and
this_is_last_read.

Additionally, I tweaked some debug output, and optimized
riscv_batch_run() when the batch is empty.
2017-08-14 15:02:19 -07:00
Tim Newsome 2706df0ec3 Fix a corner case in block memory read. 2017-08-13 14:14:23 -07:00
Gleb Gagarin 3109da7dfd Force actual read from prog buffer for the last transaction in read_memory() 2017-08-12 14:51:12 -07:00
Gleb Gagarin e676d3dae6 Fixed off-by-one error in previous commit 2017-08-11 17:46:35 -07:00
Gleb Gagarin 39b01259fa fixed memory leak introduced by previous commit 2017-08-10 16:37:50 -07:00
Gleb Gagarin b5692585de Fix reads beyond requested memory range 2017-08-10 14:27:11 -07:00
Tim Newsome efcfcf555f Fix assertion failure when reading from address 0. 2017-08-09 12:42:17 -07:00
Tim Newsome b897807224 When gdb_port is 0, don't increment it.
Usually incrementing to get the next port is a good idea, but when set
to 0 the idea is to find an arbitrary unallocated port. 1 is almost
certainly not helpful.
2017-08-07 13:55:37 -07:00
Tim Newsome 46b5f913c7 Display register numbers in a more usable format. 2017-07-27 13:45:26 -07:00
Tim Newsome 753d15e22c Print out which port OpenOCD is listening on.
This is essential when a test environment asks OpenOCD to listen on port
0, so that the environment can easily discover which port is actually
being used.
2017-07-25 14:08:10 -07:00
Tim Newsome b032eb1bcc Use a wall clock timeout to complete reset. 2017-07-16 11:48:12 -07:00
Tim Newsome f0f1df1061 Fix infinite loop in reset. 2017-07-14 12:50:11 -07:00
Tim Newsome d60dbd60e8 Share trigger code between 0.11 and 0.13 code.
The actual implementation of triggers didn't change between those two
versions, so there's no need to duplicate the code.

In the process, I also fixed a minor multicore bug where tselect didn't
always get written on all harts.
2017-07-12 19:54:40 -07:00
Tim Newsome 2deb02695e Forgot to commit this follow up to PR #79 2017-07-12 17:51:38 -07:00
Tim Newsome 09bf86e31a Keep around cmderr for callers to inspect.
Use this to only change abstract register access behavior when cmderr
explicitly says the requested operation is unsupported.
2017-07-12 14:36:09 -07:00
Tim Newsome 856f70fe44 Try abstract register writes as well. 2017-07-12 14:13:31 -07:00
Tim Newsome f37e93bbc0 Try using abstract commands to read registers
This is the only way the spec guarantees that GPRs are accessible, and
depending on the implementation this might be the only way that CSRs are
accessible.

Also changed the debug code that parses out DMI fields to be simpler to
maintain (albeit a little slower).

riscv013_execute_debug_buffer() now automatically clears cmderr if the
command fails. That feels like the right behavior. (It does return the
error to its caller.)
2017-07-12 14:13:31 -07:00