Try using abstract commands to read registers
This is the only way the spec guarantees that GPRs are accessible, and depending on the implementation this might be the only way that CSRs are accessible. Also changed the debug code that parses out DMI fields to be simpler to maintain (albeit a little slower). riscv013_execute_debug_buffer() now automatically clears cmderr if the command fails. That feels like the right behavior. (It does return the error to its caller.)
This commit is contained in:
Tim Newsome
parent
da74f511b9
commit
f37e93bbc0
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@ -187,55 +187,60 @@ typedef struct {
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// Some memoized values
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int progbuf_size, progbuf_addr, data_addr, data_size;
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bool abstract_read_csr_supported;
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bool abstract_write_csr_supported;
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bool abstract_read_fpr_supported;
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bool abstract_write_fpr_supported;
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} riscv013_info_t;
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static void decode_dmi(char *text, unsigned address, unsigned data)
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{
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static const struct {
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unsigned address;
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uint64_t mask;
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const char *name;
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} description[] = {
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{ DMI_DMSTATUS, DMI_DMSTATUS_ALLRESUMEACK, "allresumeack" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ANYRESUMEACK, "anyresumeack" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ALLNONEXISTENT, "allnonexistent" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ANYNONEXISTENT, "anynonexistent" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ALLUNAVAIL, "allunavail" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ANYUNAVAIL, "anyunavail" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ALLRUNNING, "allrunning" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ANYRUNNING, "anyrunning" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ALLHALTED, "allhalted" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ANYHALTED, "anyhalted" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_AUTHENTICATED, "authenticated" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_AUTHBUSY, "authbusy" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_CFGSTRVALID, "cfgstrvalid" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_VERSION, "version" },
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{ DMI_ABSTRACTCS, DMI_ABSTRACTCS_PROGSIZE, "progsize" },
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{ DMI_ABSTRACTCS, DMI_ABSTRACTCS_BUSY, "busy" },
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{ DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR, "cmderr" },
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{ DMI_ABSTRACTCS, DMI_ABSTRACTCS_DATACOUNT, "datacount" },
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{ DMI_COMMAND, DMI_COMMAND_CMDTYPE, "cmdtype" },
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};
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text[0] = 0;
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switch (address) {
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case DMI_DMSTATUS:
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if (get_field(data, DMI_DMSTATUS_ALLRESUMEACK)) {
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strcat(text, " allresumeack");
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for (unsigned i = 0; i < DIM(description); i++) {
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if (description[i].address == address) {
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uint64_t mask = description[i].mask;
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unsigned value = get_field(data, mask);
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if (value) {
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if (i > 0)
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*(text++) = ' ';
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if (mask & (mask >> 1)) {
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// If the field is more than 1 bit wide.
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sprintf(text, "%s=%d", description[i].name, value);
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} else {
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strcpy(text, description[i].name);
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}
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text += strlen(text);
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}
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if (get_field(data, DMI_DMSTATUS_ANYRESUMEACK)) {
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strcat(text, " anyresumeack");
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}
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if (get_field(data, DMI_DMSTATUS_ALLNONEXISTENT)) {
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strcat(text, " allnonexistent");
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}
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if (get_field(data, DMI_DMSTATUS_ANYNONEXISTENT)) {
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strcat(text, " anynonexistent");
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}
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if (get_field(data, DMI_DMSTATUS_ALLUNAVAIL)) {
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strcat(text, " allunavail");
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}
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if (get_field(data, DMI_DMSTATUS_ANYUNAVAIL)) {
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strcat(text, " anyunavail");
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}
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if (get_field(data, DMI_DMSTATUS_ALLRUNNING)) {
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strcat(text, " allrunning");
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}
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if (get_field(data, DMI_DMSTATUS_ANYRUNNING)) {
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strcat(text, " anyrunning");
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}
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if (get_field(data, DMI_DMSTATUS_ALLHALTED)) {
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strcat(text, " allhalted");
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}
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if (get_field(data, DMI_DMSTATUS_ANYHALTED)) {
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strcat(text, " anyhalted");
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}
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if (get_field(data, DMI_DMSTATUS_AUTHENTICATED)) {
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strcat(text, " authenticated");
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}
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if (get_field(data, DMI_DMSTATUS_AUTHBUSY)) {
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strcat(text, " authbusy");
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}
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if (get_field(data, DMI_DMSTATUS_CFGSTRVALID)) {
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strcat(text, " cfgstrvalid");
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}
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sprintf(text + strlen(text), " version=%d", get_field(data,
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DMI_DMSTATUS_VERSION));
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break;
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}
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}
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}
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@ -612,9 +617,109 @@ static int register_write_direct(struct target *target, unsigned number,
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return ERROR_OK;
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}
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static int execute_abstract_command(struct target *target, uint32_t command)
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{
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LOG_DEBUG("command=0x%x", command);
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dmi_write(target, DMI_COMMAND, command);
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{
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uint32_t dmstatus = 0;
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wait_for_idle(target, &dmstatus);
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}
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uint32_t cs = dmi_read(target, DMI_ABSTRACTCS);
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unsigned cmderr = get_field(cs, DMI_ABSTRACTCS_CMDERR);
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if (cmderr != 0) {
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LOG_DEBUG("command 0x%x failed; abstractcs=0x%x", command, cs);
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// Clear the error.
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dmi_write(target, DMI_ABSTRACTCS, set_field(0, DMI_ABSTRACTCS_CMDERR,
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cmderr));
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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static uint64_t read_abstract_arg(struct target *target, unsigned index)
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{
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uint64_t value = 0;
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unsigned xlen = riscv_xlen(target);
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unsigned offset = index * xlen / 32;
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switch (xlen) {
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default:
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LOG_ERROR("Unsupported xlen: %d", xlen);
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return ~0;
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case 64:
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value |= ((uint64_t) dmi_read(target, DMI_DATA0 + offset + 1)) << 32;
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case 32:
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value |= dmi_read(target, DMI_DATA0 + offset);
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}
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return value;
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}
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static int register_read_abstract(struct target *target, uint64_t *value,
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uint32_t number, unsigned size)
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{
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RISCV013_INFO(r);
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uint32_t command = set_field(0, DMI_COMMAND_CMDTYPE, 0);
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switch (size) {
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case 32:
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command = set_field(command, AC_ACCESS_REGISTER_SIZE, 2);
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break;
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case 64:
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command = set_field(command, AC_ACCESS_REGISTER_SIZE, 3);
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break;
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default:
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LOG_ERROR("Unsupported abstract register read size: %d", size);
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return ERROR_FAIL;
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}
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command = set_field(command, AC_ACCESS_REGISTER_POSTEXEC, 0);
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command = set_field(command, AC_ACCESS_REGISTER_TRANSFER, 1);
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command = set_field(command, AC_ACCESS_REGISTER_WRITE, 0);
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if (number <= GDB_REGNO_XPR31) {
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command = set_field(command, AC_ACCESS_REGISTER_REGNO,
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0x1000 + number - GDB_REGNO_XPR0);
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} else if (number >= GDB_REGNO_FPR0 && number <= GDB_REGNO_FPR31) {
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if (!r->abstract_read_fpr_supported)
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return ERROR_FAIL;
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command = set_field(command, AC_ACCESS_REGISTER_REGNO,
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0x1020 + number - GDB_REGNO_FPR0);
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} else if (number >= GDB_REGNO_CSR0 && number <= GDB_REGNO_CSR4095) {
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if (!r->abstract_read_csr_supported)
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return ERROR_FAIL;
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command = set_field(command, AC_ACCESS_REGISTER_REGNO,
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number - GDB_REGNO_CSR0);
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} else {
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return ERROR_FAIL;
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}
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int result = execute_abstract_command(target, command);
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if (result != ERROR_OK) {
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if (number >= GDB_REGNO_FPR0 && number <= GDB_REGNO_FPR31) {
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r->abstract_read_fpr_supported = false;
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LOG_INFO("Disabling abstract command reads from FPRs.");
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} else if (number >= GDB_REGNO_CSR0 && number <= GDB_REGNO_CSR4095) {
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r->abstract_read_csr_supported = false;
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LOG_INFO("Disabling abstract command reads from CSRs.");
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}
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return result;
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}
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*value = read_abstract_arg(target, 0);
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return ERROR_OK;
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}
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/** Actually read registers from the target right now. */
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static int register_read_direct(struct target *target, uint64_t *value, uint32_t number)
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{
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int result = register_read_abstract(target, value, number,
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riscv_xlen(target));
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if (result == ERROR_OK)
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return ERROR_OK;
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struct riscv_program program;
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riscv_program_init(&program, target);
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riscv_addr_t output = riscv_program_alloc_d(&program);
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@ -742,6 +847,13 @@ static int init_target(struct command_context *cmd_ctx,
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info->dmi_busy_delay = 0;
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info->ac_busy_delay = 0;
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// Assume all these abstract commands are supported until we learn
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// otherwise.
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info->abstract_read_csr_supported = true;
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info->abstract_write_csr_supported = true;
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info->abstract_read_fpr_supported = true;
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info->abstract_write_fpr_supported = true;
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target->reg_cache = calloc(1, sizeof(*target->reg_cache));
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target->reg_cache->name = "RISC-V Registers";
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target->reg_cache->num_regs = GDB_REGNO_COUNT;
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@ -1207,9 +1319,9 @@ static int examine(struct target *target)
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riscv_program_insert(&program64, sd(GDB_REGNO_S0, GDB_REGNO_S0, offset));
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riscv_program_csrrw(&program64, GDB_REGNO_S0, GDB_REGNO_S0, GDB_REGNO_DSCRATCH);
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riscv_program_fence(&program64);
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riscv_program_exec(&program64, target);
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int result = riscv_program_exec(&program64, target);
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if (get_field(dmi_read(target, DMI_ABSTRACTCS), DMI_ABSTRACTCS_CMDERR) == 0) {
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if (result == ERROR_OK) {
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r->debug_buffer_addr[i] =
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(dmi_read(target, DMI_PROGBUF0 + (8 + offset) / 4) << 32)
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+ dmi_read(target, DMI_PROGBUF0 + (4 + offset) / 4)
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@ -1742,7 +1854,7 @@ struct target_type riscv013_target =
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.arch_state = arch_state,
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};
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/*** 0.13-specific implementations of various RISC-V hepler functions. ***/
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/*** 0.13-specific implementations of various RISC-V helper functions. ***/
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static riscv_reg_t riscv013_get_register(struct target *target, int hid, int rid)
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{
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LOG_DEBUG("reading register 0x%08x on hart %d", rid, hid);
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@ -1914,28 +2026,13 @@ riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned index)
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int riscv013_execute_debug_buffer(struct target *target)
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{
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riscv013_clear_abstract_error(target);
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uint32_t run_program = 0;
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run_program = set_field(run_program, AC_ACCESS_REGISTER_SIZE, 2);
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run_program = set_field(run_program, AC_ACCESS_REGISTER_POSTEXEC, 1);
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run_program = set_field(run_program, AC_ACCESS_REGISTER_TRANSFER, 0);
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run_program = set_field(run_program, AC_ACCESS_REGISTER_REGNO, 0x1000);
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dmi_write(target, DMI_COMMAND, run_program);
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{
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uint32_t dmstatus = 0;
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wait_for_idle(target, &dmstatus);
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}
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uint32_t cs = dmi_read(target, DMI_ABSTRACTCS);
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if (get_field(cs, DMI_ABSTRACTCS_CMDERR) != 0) {
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LOG_ERROR("unable to execute program: (abstractcs=0x%08x)", cs);
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dmi_read(target, DMI_DMSTATUS);
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return ERROR_FAIL;
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}
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return ERROR_OK;
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return execute_abstract_command(target, run_program);
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}
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void riscv013_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t d)
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