Don't reset DMI when an abstract command is busy.
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a9bcc48064
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92ef328161
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@ -364,17 +364,6 @@ static void increase_dmi_busy_delay(struct target *target)
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dtmcontrol_scan(target, DTM_DTMCS_DMIRESET);
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}
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static void increase_ac_busy_delay(struct target *target)
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{
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riscv013_info_t *info = get_info(target);
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info->ac_busy_delay += info->ac_busy_delay / 10 + 1;
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LOG_INFO("dtmcontrol_idle=%d, dmi_busy_delay=%d, ac_busy_delay=%d",
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info->dtmcontrol_idle, info->dmi_busy_delay,
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info->ac_busy_delay);
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dtmcontrol_scan(target, DTM_DTMCS_DMIRESET);
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}
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/**
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* exec: If this is set, assume the scan results in an execution, so more
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* run-test/idle cycles may be required.
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@ -531,6 +520,23 @@ static void dmi_write(struct target *target, uint16_t address, uint64_t value)
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}
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}
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static void increase_ac_busy_delay(struct target *target)
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{
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riscv013_info_t *info = get_info(target);
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info->ac_busy_delay += info->ac_busy_delay / 10 + 1;
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LOG_INFO("dtmcontrol_idle=%d, dmi_busy_delay=%d, ac_busy_delay=%d",
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info->dtmcontrol_idle, info->dmi_busy_delay,
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info->ac_busy_delay);
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// Wait for busy to go away.
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uint32_t abstractcs = dmi_read(target, DMI_ABSTRACTCS);
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while (get_field(abstractcs, DMI_ABSTRACTCS_BUSY)) {
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abstractcs = dmi_read(target, DMI_ABSTRACTCS);
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}
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// Clear the error status.
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dmi_write(target, DMI_ABSTRACTCS, abstractcs & DMI_ABSTRACTCS_CMDERR);
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}
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uint32_t abstract_register_size(unsigned width)
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{
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switch (width) {
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@ -1412,8 +1418,8 @@ static int read_memory(struct target *target, target_addr_t address,
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case CMDERR_BUSY:
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LOG_DEBUG("memory read resulted in busy response; "
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"this_is_last_read=%d", this_is_last_read);
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riscv013_clear_abstract_error(target);
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increase_ac_busy_delay(target);
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riscv013_clear_abstract_error(target);
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retry_batch_transaction = true;
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riscv_batch_free(batch);
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break;
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