Clifford Wolf
d68c993ed2
Changed more code to the new RTLIL::Wire constructors
2014-07-26 21:30:38 +02:00
Clifford Wolf
946ddff9ce
Changed a lot of code to the new RTLIL::Wire constructors
2014-07-26 20:12:50 +02:00
Clifford Wolf
97a59851a6
Added RTLIL::Cell::has(portname)
2014-07-26 16:11:28 +02:00
Clifford Wolf
f8fdc47d33
Manual fixes for new cell connections API
2014-07-26 15:58:23 +02:00
Clifford Wolf
b7dda72302
Changed users of cell->connections_ to the new API (sed command)
...
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
2014-07-26 15:58:23 +02:00
Clifford Wolf
cc4f10883b
Renamed RTLIL::{Module,Cell}::connections to connections_
2014-07-26 11:58:03 +02:00
Clifford Wolf
2bec47a404
Use only module->addCell() and module->remove() to create and delete cells
2014-07-25 17:56:19 +02:00
Clifford Wolf
5826670009
Various RTLIL::SigSpec related code cleanups
2014-07-25 14:25:42 +02:00
Clifford Wolf
c4e4f79a2a
Disabled cover() for non-linux builds
2014-07-25 12:27:36 +02:00
Clifford Wolf
91bf0c90c8
Improvements in "cover" command
2014-07-25 12:04:40 +02:00
Clifford Wolf
6aa792c864
Replaced more old SigChunk programming patterns
2014-07-24 23:10:58 +02:00
Clifford Wolf
2f54345cff
Added "cover" command
2014-07-24 16:14:19 +02:00
Clifford Wolf
c094c53de8
Removed RTLIL::SigSpec::optimize()
2014-07-23 20:32:28 +02:00
Clifford Wolf
4e802eb7f6
Fixed all users of SigSpec::chunks_rw() and removed it
2014-07-23 15:36:09 +02:00
Clifford Wolf
28b3fd05fa
SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()
2014-07-22 20:58:44 +02:00
Clifford Wolf
4b4048bc5f
SigSpec refactoring: using the accessor functions everywhere
2014-07-22 20:39:37 +02:00
Clifford Wolf
a233762a81
SigSpec refactoring: renamed chunks and width to __chunks and __width
2014-07-22 20:39:37 +02:00
Clifford Wolf
1d88f1cf9f
Removed deprecated module->new_wire()
2014-07-21 12:35:06 +02:00
Clifford Wolf
1ce5e83555
Added "select -assert-count"
2014-07-20 20:15:49 +02:00
Clifford Wolf
44f13aff92
Improved seeding of color rng in show command
2014-07-18 16:44:45 +02:00
Clifford Wolf
22a998903b
Added %D and %c select commands
2014-06-14 16:19:32 +02:00
Clifford Wolf
7020f7fc13
added tee cmd
2014-06-03 09:23:31 +02:00
Clifford Wolf
f69b5800c9
fixed syntax error in dot file created by "show" command
2014-05-10 16:22:56 +02:00
Siesh1oo
8127d5e8c3
- kernel/register.h, kernel/driver.cc: refactor rewrite_yosys_exe()/get_share_file_name() to portable proc_self_dirname()/proc_share_dirname().
...
This refactoring improves robustness and allows OSX support with only 7 new lines of code, and easy extension for other systems.
- passes/abc/abc.cc, passes/cmds/show.cc, passes/techmap/techmap.cc: use new, refactored semantics.
2014-03-12 23:17:14 +01:00
Clifford Wolf
91704a7853
Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys
...
(see https://github.com/cliffordwolf/yosys/pull/28 )
2014-03-11 14:24:24 +01:00
Clifford Wolf
483c99fe46
Added "design -push" and "design -pop"
2014-02-20 23:28:59 +01:00
Clifford Wolf
0dadfed46d
Added connwrappers command
2014-02-20 20:44:11 +01:00
Clifford Wolf
42ce3db983
Fixed use of selection in splitnets command
2014-02-16 17:39:50 +01:00
Clifford Wolf
9a816b65a8
Added != support for relational select pattern
2014-02-16 00:16:54 +01:00
Clifford Wolf
b6f33576d5
Added delete {-input|-output|-port}
2014-02-09 10:03:26 +01:00
Clifford Wolf
b3b5fac191
Bugfix in delete command
2014-02-09 09:34:58 +01:00
Clifford Wolf
db86aaa07d
Build fixes for log cmd
2014-02-08 21:21:51 +01:00
Johann Glaser
af14bb5f65
added "log" command
2014-02-08 19:19:32 +01:00
Clifford Wolf
926fa61119
Added various new options to splice command
2014-02-08 16:37:18 +01:00
Clifford Wolf
0c11d04144
Added %a select operator
2014-02-08 16:31:38 +01:00
Clifford Wolf
6644f80d97
Moved some passes to other source directories
2014-02-08 14:39:15 +01:00
Clifford Wolf
2c51619c2b
Now also move net labes to the right position in splice cmd
2014-02-08 00:06:00 +01:00
Clifford Wolf
244e8ce1f4
Added splice command
2014-02-07 20:30:56 +01:00
Clifford Wolf
08aa1062b4
Added log_header() to splitnets
2014-02-07 19:51:15 +01:00
Clifford Wolf
366dcd3abf
Fixed use of "cmd_error" in passes/cmds/design.cc
2014-02-07 14:16:42 +01:00
Clifford Wolf
91eab69912
Added copy command
2014-02-06 22:09:21 +01:00
Clifford Wolf
cf593222f2
Added design -stash/-copy-from/-copy-to
2014-02-06 21:52:07 +01:00
Clifford Wolf
37fdb2ca7a
Added support for s: select expressions (wire width)
2014-02-06 19:45:03 +01:00
Clifford Wolf
9428050dd6
Added i:, o:, and x: selection pattern
2014-02-06 19:35:33 +01:00
Clifford Wolf
d7d1c7baf8
Added support for %m selection op
2014-02-06 19:30:08 +01:00
Clifford Wolf
f2fdcef13d
Merge branch 'master' of github.com:cliffordwolf/yosys
2014-02-06 19:22:50 +01:00
Clifford Wolf
fa295a4528
Added generic RTLIL::SigSpec::parse_sel() with support for selection variables
2014-02-06 19:22:46 +01:00
Johann Glaser
34eb77d2bf
new %s: add sub-modules to selection
2014-02-06 17:36:39 +01:00
Clifford Wolf
dbfcc2f4e2
Simplified select "Assertation failed" message generation
2014-02-05 18:52:55 +01:00
Clifford Wolf
94b802c65d
Merge branch 'master' of github.com:cliffordwolf/yosys
2014-02-05 18:46:47 +01:00