Clifford Wolf
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b1d520949b
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Added ezSAT::keep_cnf() and ezSAT::non_incremental()
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2014-07-21 02:01:32 +02:00 |
Clifford Wolf
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ade659e617
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Fixed ezSAT stand-alone build
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2014-07-21 01:03:01 +02:00 |
Clifford Wolf
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92c9403249
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Updated minisat
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2014-07-21 01:01:26 +02:00 |
Clifford Wolf
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c6b3f4e089
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Using relative path names in minisat headers
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2014-07-21 01:00:39 +02:00 |
Clifford Wolf
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8836943693
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Added yet another resource sharing test case
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2014-07-20 21:15:01 +02:00 |
Clifford Wolf
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04fcb07213
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Added support for resource sharing in mux control logic
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2014-07-20 20:44:14 +02:00 |
Clifford Wolf
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1ce5e83555
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Added "select -assert-count"
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2014-07-20 20:15:49 +02:00 |
Clifford Wolf
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e9506bb2da
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Supercell creation for $div/$mod worked all along, fixed test benches
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2014-07-20 18:54:06 +02:00 |
Clifford Wolf
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7a6d578b81
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Improved tests/share/generate.py
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2014-07-20 17:06:57 +02:00 |
Clifford Wolf
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ff28029fdb
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Fixed creation of shift supercells in "share" pass
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2014-07-20 17:06:36 +02:00 |
Clifford Wolf
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4af8d84f01
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Small fix in tests/vloghtb/run-test.sh
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2014-07-20 17:05:20 +02:00 |
Clifford Wolf
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dd23e9a9db
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Activated tests/share in "make test"
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2014-07-20 15:33:07 +02:00 |
Clifford Wolf
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4c38ec1cc8
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Added "miter -equiv -flatten"
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2014-07-20 15:33:07 +02:00 |
Clifford Wolf
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8d04ca7d22
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Added call_on_selection() and call_on_module() API
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2014-07-20 15:33:06 +02:00 |
Clifford Wolf
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2e358bd667
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Added tests/vloghtb/test_share.sh
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2014-07-20 15:33:05 +02:00 |
Clifford Wolf
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6f450d0224
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Added tests/share for testing "share" supercell creation
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2014-07-20 15:32:59 +02:00 |
Clifford Wolf
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5b3ee7a072
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Added "share" supercell creation
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2014-07-20 15:01:17 +02:00 |
Clifford Wolf
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7b98e46ac3
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Added removing of always inactive cells to "share" pass
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2014-07-20 13:24:36 +02:00 |
Clifford Wolf
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8819493db4
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Progress in "share" pass
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2014-07-20 11:04:52 +02:00 |
Clifford Wolf
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e57db5e9b2
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Added std::set<RTLIL::SigBit> to RTLIL::SigSpec conversion
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2014-07-20 11:01:04 +02:00 |
Clifford Wolf
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efa7884026
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Added SIZE() macro
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2014-07-20 10:36:14 +02:00 |
Clifford Wolf
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a6174aaf5e
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Added log_cell()
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2014-07-20 10:35:47 +02:00 |
Clifford Wolf
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15fd615da5
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Progress in "share" pass
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2014-07-20 03:03:04 +02:00 |
Clifford Wolf
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3f9f0c047d
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Added tests/vloghtb
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2014-07-20 02:19:44 +02:00 |
Clifford Wolf
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a30e2857c7
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Use functions instead of always blocks for $mux/$pmux/$safe_pmux in verilog backend
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2014-07-20 02:16:30 +02:00 |
Clifford Wolf
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0c67393313
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Added support for $bu0 to verilog backend
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2014-07-20 01:56:16 +02:00 |
Clifford Wolf
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2278995bd8
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Started to implement real resource sharing
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2014-07-19 20:54:32 +02:00 |
Clifford Wolf
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02f0acb3bc
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Fixed log_id() memory corruption
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2014-07-19 20:53:29 +02:00 |
Clifford Wolf
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efd9604dfb
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Improved memory_share log messages
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2014-07-19 15:46:11 +02:00 |
Clifford Wolf
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e0a819dbe5
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More verbose memory_share help message
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2014-07-19 15:34:14 +02:00 |
Clifford Wolf
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297a0962ea
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Added SAT-based write-port sharing to memory_share
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2014-07-19 15:33:55 +02:00 |
Clifford Wolf
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35edac0b31
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Added ModWalker helper class
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2014-07-19 15:33:00 +02:00 |
Clifford Wolf
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1c288adcc0
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Some "const" cleanups in SigMap
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2014-07-19 15:32:39 +02:00 |
Clifford Wolf
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26f982ac0b
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Fixed bug in memory_share feedback-to-en code
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2014-07-19 15:32:14 +02:00 |
Clifford Wolf
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e441f07d89
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Added translation from read-feedback to en-signals in memory_share
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2014-07-18 16:46:40 +02:00 |
Clifford Wolf
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44f13aff92
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Improved seeding of color rng in show command
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2014-07-18 16:44:45 +02:00 |
Clifford Wolf
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a341931972
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Only create collision detect logic in memory_share if necessary
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2014-07-18 14:32:40 +02:00 |
Clifford Wolf
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ddb01df42e
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Bugfix in tests/memories/run-test.sh
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2014-07-18 13:45:25 +02:00 |
Clifford Wolf
|
5d9127418b
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added tests/memories
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2014-07-18 13:25:19 +02:00 |
Clifford Wolf
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ab4b26679f
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Added memory_share
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2014-07-18 13:16:56 +02:00 |
Clifford Wolf
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a721f7d768
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Added automatic conversion from RTLIL::SigSpec to std::vector<RTLIL::SigBit>
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2014-07-18 11:36:34 +02:00 |
Clifford Wolf
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309ae98246
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Apply opt_reduce WR_EN opts to the whole mux tree driving the WR_EN port
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2014-07-18 10:28:45 +02:00 |
Clifford Wolf
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2d69c309f9
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Added function-like cell creation helpers
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2014-07-18 10:27:06 +02:00 |
Clifford Wolf
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a8cedb2257
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Added log_id() helper function
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2014-07-18 10:26:01 +02:00 |
Clifford Wolf
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ec3a798194
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Also simulate unmapped memories in "make test"
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2014-07-17 16:53:52 +02:00 |
Clifford Wolf
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9b183539af
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Implemented dynamic bit-/part-select for memory writes
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2014-07-17 16:49:23 +02:00 |
Clifford Wolf
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f1ca93a0a3
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Fixed simlib.v model for $mem
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2014-07-17 16:48:36 +02:00 |
Clifford Wolf
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5867f6bcdc
|
Added support for bit/part select to mem2reg rewriter
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2014-07-17 13:49:32 +02:00 |
Clifford Wolf
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6d69d4aaa8
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Added support for constant bit- or part-select for memory writes
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2014-07-17 13:13:21 +02:00 |
Clifford Wolf
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1b00861d0a
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Improved opt_reduce handling of mem wr_en mux bits
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2014-07-17 12:12:04 +02:00 |