Eddie Hung
b780c0a7de
Allow POs to be PIs in XAIG
2019-04-22 11:22:29 -07:00
Eddie Hung
2c6358ea25
Remove kernel/cost.cc since master has refactored it
2019-04-22 11:21:17 -07:00
Eddie Hung
4883391b63
Merge remote-tracking branch 'origin/master' into xaig
2019-04-22 11:19:52 -07:00
Clifford Wolf
bc98a463a4
Merge pull request #952 from YosysHQ/clifford/fix370
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Determine correct signedness and expression width in for-loop unrolling
2019-04-22 20:10:46 +02:00
Clifford Wolf
8ed4a53d99
Merge pull request #951 from YosysHQ/clifford/logdebug
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Add log_debug() framework
2019-04-22 20:09:51 +02:00
Clifford Wolf
1d538ff1ec
Merge pull request #949 from YosysHQ/clifford/pmux2shimprove
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Add full_pmux feature to pmux2shiftx
2019-04-22 20:01:43 +02:00
Clifford Wolf
3be5aac52c
Merge pull request #953 from YosysHQ/clifford/fix948
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Add support for zero-width signals to Verilog back-end
2019-04-22 20:01:09 +02:00
Clifford Wolf
0e0c80fac8
Add support for zero-width signals to Verilog back-end, fixes #948
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 19:44:42 +02:00
Clifford Wolf
4ad0ea5c3c
Determine correct signedness and expression width in for loop unrolling, fixes #370
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 18:19:02 +02:00
Clifford Wolf
e158ea2097
Add log_debug() framework
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 17:25:52 +02:00
Clifford Wolf
9050b5e191
Merge pull request #950 from whitequark/attrmap_remove_wildcard
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attrmap: extend -remove to allow removing attributes with any value
2019-04-22 16:54:38 +02:00
whitequark
aeeefc32d8
attrmap: extend -remove to allow removing attributes with any value.
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Currently, `-remove foo` would only remove an attribute `foo = ""`,
which doesn't work on an attribute like `src` that may have any
value. Extend `-remove` to handle both cases. `-remove foo=""` has
the old behavior, and `-remove foo` will remove the attribute with
whatever value it may have, which is still compatible with the old
behavior.
2019-04-22 14:18:15 +00:00
Clifford Wolf
a80e74dc20
Updaye pmux2shiftx test
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 16:17:43 +02:00
Clifford Wolf
0f0ada13f4
Add full_pmux feature to pmux2shiftx
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 15:26:20 +02:00
Clifford Wolf
c0f9a74b12
Set ENABLE_LIBYOSYS=0 by default
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 14:59:30 +02:00
Clifford Wolf
93f32b5dec
Set ENABLE_PYOSYS=0 by default
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 14:49:17 +02:00
Clifford Wolf
99d5435650
Merge pull request #905 from christian-krieg/feature/python_bindings
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Feature/python bindings
2019-04-22 14:47:52 +02:00
Clifford Wolf
0e7901e45c
Merge pull request #941 from Wren6991/sim_lib_io_clke
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ice40 cells_sim.v: update clock enable behaviour based on hardware experiments
2019-04-22 09:11:13 +02:00
Clifford Wolf
c1dfc7ca96
Merge branch 'dh73-master'
2019-04-22 09:10:07 +02:00
Clifford Wolf
913659d644
Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master
2019-04-22 09:09:27 +02:00
Clifford Wolf
cf1ba46fa0
Re-added clean after techmap in synth_xilinx
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 09:03:11 +02:00
Clifford Wolf
cbd9b8a3f3
Merge pull request #916 from YosysHQ/map_cells_before_map_luts
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synth_xilinx to map_cells before map_luts
2019-04-22 09:01:00 +02:00
Clifford Wolf
19fd411e77
Merge pull request #911 from mmicko/gowin-nobram
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Make nobram false by default for gowin
2019-04-22 08:58:09 +02:00
Clifford Wolf
b40af877f3
Merge pull request #909 from zachjs/master
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support repeat loops with constant repeat counts outside of constant functions
2019-04-22 08:51:34 +02:00
Clifford Wolf
a98b171814
Merge pull request #944 from YosysHQ/clifford/pmux2shiftx
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Add pmux2shiftx command
2019-04-22 08:39:37 +02:00
Clifford Wolf
632a666448
Merge pull request #945 from YosysHQ/clifford/libwb
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New behavior for read_verilog handling of whiteboxes
2019-04-22 08:38:52 +02:00
Eddie Hung
d06d4f35c3
Merge remote-tracking branch 'origin/clifford/libwb' into xaig
2019-04-21 18:10:46 -07:00
Clifford Wolf
7b35d57592
Disable blackbox detection in techmap files
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 02:07:36 +02:00
Eddie Hung
d7f0700bae
Convert to use #945
2019-04-21 15:19:02 -07:00
Eddie Hung
42a6e0b0b9
Merge remote-tracking branch 'origin/clifford/libwb' into xaig
2019-04-21 14:49:18 -07:00
Eddie Hung
a3371e118b
Merge branch 'master' into map_cells_before_map_luts
2019-04-21 14:24:50 -07:00
Luke Wren
71da836300
ice40 cells_sim.v: SB_IO: update clock enable behaviour based on hardware experiments
2019-04-21 21:40:11 +01:00
Clifford Wolf
d38f0c1a96
Fix tests
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-21 11:40:20 +02:00
Clifford Wolf
5b7fea5245
Add "noblackbox" attribute
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-21 11:40:09 +02:00
Clifford Wolf
fb7f02be55
New behavior for front-end handling of whiteboxes
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 22:24:50 +02:00
Eddie Hung
caec7f9d2c
Merge remote-tracking branch 'origin/master' into xaig
2019-04-20 12:23:49 -07:00
Clifford Wolf
f84a84e3f1
Merge pull request #943 from YosysHQ/clifford/whitebox
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[WIP] Add "whitebox" attribute, add "read_verilog -wb"
2019-04-20 20:51:54 +02:00
Clifford Wolf
fc23af1707
Auto-initialize OnehotDatabase on-demand in pmux2shiftx.cc
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 18:13:37 +02:00
Clifford Wolf
97e9caa4fa
Add "onehot" pass, improve "pmux2shiftx" onehot handling
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 17:52:16 +02:00
Clifford Wolf
f3ad8d680a
Add "techmap -wb", use in formal flows
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 11:23:24 +02:00
Clifford Wolf
b7445ef387
Check blackbox attribute in techmap/simplemap
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 11:10:05 +02:00
Clifford Wolf
5b915f0153
Add "wbflip" command
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 11:04:46 +02:00
Clifford Wolf
e3687f6f4e
Merge pull request #942 from YosysHQ/clifford/fix931
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Improve proc full_case detection and handling
2019-04-20 10:05:35 +02:00
Eddie Hung
af4652522f
ABC_FLOPS -> ABC_MODEL -- only whitebox if ABC_MODEL set
2019-04-19 21:09:55 -07:00
Clifford Wolf
b3a3e08e38
Improve "pmux2shiftx"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 02:03:44 +02:00
Clifford Wolf
e06d158e8a
Fix some typos
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 01:18:07 +02:00
Clifford Wolf
37728520a6
Improvements in "pmux2shiftx"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 01:15:48 +02:00
Eddie Hung
59c993e437
Select to find union of both sets on stack
2019-04-19 15:47:53 -07:00
Eddie Hung
76bba49182
Fixes for simple_abc9 tests
2019-04-19 15:47:36 -07:00
Clifford Wolf
0070184ea9
Improvements in pmux2shiftx
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-20 00:38:25 +02:00