riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
11,640 Commits 75 Branches 48 Tags 61 MiB
Commit Graph

16 Commits

Author SHA1 Message Date
Patrick Urban 5d08688054
gatemate: Fix minor issues with `memory_libmap` (#3343) 2022-05-27 23:35:26 +02:00
Marcelina Kościelnicka 2a2dc12eb6 gatemate: Use `memory_libmap` pass. 2022-05-18 17:32:56 +02:00
Patrick Urban cb41209095 synth_gatemate Revert cascade A/B port mixup 2021-11-13 21:53:25 +01:00
Patrick Urban decdc743db synth_gatemate: Remove iob_map invokation 2021-11-13 21:53:25 +01:00
Patrick Urban 0d871b6c49 synth_gatemate: Add block RAM cascade support 
* add simulation model for block RAM cascade in 40K mode
* limit 20K_SDP and 40K_SDP to 40 and 80 bits (the only useful configurations)
 2021-11-13 21:53:25 +01:00
Patrick Urban 285ec0547b synth_gatemate: Remove obsolete iob_map 2021-11-13 21:53:25 +01:00
Patrick Urban 81964d6d6f synth_gatemate: Update pass 
* remove `write_edif` and `write_blif` options
* remove redundant `abc` call before muxcover
* update style
 2021-11-13 21:53:25 +01:00
Patrick Urban 74aee88e81 synth_gatemate: Remove specify blocks 2021-11-13 21:53:25 +01:00
Patrick Urban 05f24adca9 synth_gatemate: Remove gatemate_bramopt pass 2021-11-13 21:53:25 +01:00
Patrick Urban 4bee908ae8 synth_gatemate: Revise block RAM read modes and initialization 
* enable mixed read-width / write-width ports in SDP mode
* fix NO_CHANGE and WRITE_THROUGH behavior during read access
* remove redundant zero-initialization
* set A/B_WE bit during map (gatemate_bramopt pass could be removed later)
* differentiate "upper" and "lower" initialization for cascade mode
 2021-11-13 21:53:25 +01:00
Patrick Urban 3f4ccdf2f5 synth_gatemate: Remove unsupported FF initialization 2021-11-13 21:53:25 +01:00
Patrick Urban d592bd93b8 synth_gatemate: Rename multiplier factor parameters 2021-11-13 21:53:25 +01:00
Patrick Urban 6825de6343 synth_gatemate: Registers are uninitialized 2021-11-13 21:53:25 +01:00
Patrick Urban 0a72952d5f synth_gatemate: Apply review remarks 
* remove unused techmap models in `map_regs.v`
* replace RAM initilization loops with 320-bit-writes
* add script to test targets in top-level Makefile
* remove `MAXWIDTH` parameter and treat both vector widths individually in `mult_map.v`
* iterate over all modules in `gatemate_bramopt` pass
 2021-11-13 21:53:25 +01:00
Patrick Urban cfcc38582a synth_gatemate: Apply review remarks 2021-11-13 21:53:25 +01:00
Patrick Urban 240d289fff synth_gatemate: Initial implementation 
Signed-off-by: Patrick Urban <patrick.urban@web.de>
 2021-11-13 21:53:25 +01:00