mirror of https://github.com/YosysHQ/yosys.git
synth_gatemate: Rename multiplier factor parameters
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@ -17,9 +17,6 @@
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*
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*/
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`define MAX(a,b) ((a) > (b) ? (a) : (b))
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`define MIN(a,b) ((a) < (b) ? (a) : (b))
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(* techmap_celltype = "$mul $__mul" *)
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module \$__MULMXN (A, B, Y);
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@ -36,27 +33,27 @@ module \$__MULMXN (A, B, Y);
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(* force_downto *)
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output [Y_WIDTH-1:0] Y;
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localparam A_MAXWIDTH = A_WIDTH + (A_SIGNED ? 0 : 1);
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localparam B_MAXWIDTH = B_WIDTH + (B_SIGNED ? 0 : 1);
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localparam A_ADJWIDTH = A_WIDTH + (A_SIGNED ? 0 : 1);
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localparam B_ADJWIDTH = B_WIDTH + (B_SIGNED ? 0 : 1);
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generate
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if (A_SIGNED) begin: blkA
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wire signed [A_MAXWIDTH-1:0] Aext = $signed(A);
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wire signed [A_ADJWIDTH-1:0] Aext = $signed(A);
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end
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else begin: blkA
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wire [A_MAXWIDTH-1:0] Aext = A;
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wire [A_ADJWIDTH-1:0] Aext = A;
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end
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if (B_SIGNED) begin: blkB
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wire signed [B_MAXWIDTH-1:0] Bext = $signed(B);
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wire signed [B_ADJWIDTH-1:0] Bext = $signed(B);
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end
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else begin: blkB
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wire [B_MAXWIDTH-1:0] Bext = B;
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wire [B_ADJWIDTH-1:0] Bext = B;
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end
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if (A_WIDTH >= B_WIDTH) begin
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CC_MULT #(
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.A_WIDTH(A_MAXWIDTH),
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.B_WIDTH(B_MAXWIDTH),
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.A_WIDTH(A_ADJWIDTH),
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.B_WIDTH(B_ADJWIDTH),
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.P_WIDTH(Y_WIDTH),
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) _TECHMAP_REPLACE_ (
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.A(blkA.Aext),
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@ -66,8 +63,8 @@ module \$__MULMXN (A, B, Y);
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end
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else begin // swap A,B
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CC_MULT #(
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.A_WIDTH(A_MAXWIDTH),
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.B_WIDTH(B_MAXWIDTH),
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.A_WIDTH(B_ADJWIDTH),
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.B_WIDTH(A_ADJWIDTH),
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.P_WIDTH(Y_WIDTH),
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) _TECHMAP_REPLACE_ (
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.A(blkB.Bext),
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