Clifford Wolf
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dbfd8460a9
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Allow $size and $bits in verilog mode, actually check test case
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2017-09-29 11:56:43 +02:00 |
Udi Finkelstein
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e951ac0dfb
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$size() now works correctly for all cases!
It seems the issues was that AST_MULTIRANGE is converted into a multirange_dimensions[] array on the AST_MEMORY node directly.
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2017-09-26 20:34:24 +03:00 |
Udi Finkelstein
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6ddc6a7af4
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$size() seems to work now with or without the optional parameter.
Multidimensional arrays still don't work. I suspect the problem is that the array is flattened into a 1D array before $size() is evaluated.
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2017-09-26 19:18:25 +03:00 |
Udi Finkelstein
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7e391ba904
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enable $bits() and $size() functions only when the SystemVerilog flag is enabled for read_verilog
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2017-09-26 09:19:56 +03:00 |
Udi Finkelstein
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2dea42e903
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Added $bits() for memories as well.
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2017-09-26 09:11:25 +03:00 |
Udi Finkelstein
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17f8b41605
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$size() now works with memories as well!
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2017-09-26 08:36:45 +03:00 |
Udi Finkelstein
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64eb8f29ad
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Add $size() function. At the moment it works only on expressions, not on memories.
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2017-09-26 06:25:42 +03:00 |
Clifford Wolf
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5f1d0b1024
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Add $live and $fair cell types, add support for s_eventually keyword
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2017-02-25 10:36:39 +01:00 |
Clifford Wolf
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4fb8007171
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Fix incorrect "incompatible re-declaration of wire" error in tasks/functions
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2017-02-14 15:10:59 +01:00 |
Clifford Wolf
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3928482a3c
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Add $cover cell type and SVA cover() support
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2017-02-04 14:14:26 +01:00 |
Clifford Wolf
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78f65f89ff
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Fix bug in AstNode::mem2reg_as_needed_pass2()
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2017-01-15 13:52:50 +01:00 |
Clifford Wolf
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2d32c6c4f6
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Fixed handling of local memories in functions
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2017-01-05 13:19:03 +01:00 |
Clifford Wolf
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81a9ee2360
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Added handling of local memories and error for local decls in unnamed blocks
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2017-01-04 16:03:04 +01:00 |
Clifford Wolf
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dfb461fe52
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Added Verilog $rtoi and $itor support
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2017-01-03 17:40:58 +01:00 |
Clifford Wolf
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70d7a02cae
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Added support for hierarchical defparams
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2016-11-15 13:35:19 +01:00 |
Clifford Wolf
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2874914bcb
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Fixed anonymous genblock object names
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2016-11-04 07:46:30 +01:00 |
Clifford Wolf
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56e2bb88ae
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Some fixes in handling of signed arrays
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2016-11-01 23:17:43 +01:00 |
Clifford Wolf
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bdc316db50
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Added $anyseq cell type
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2016-10-14 15:24:03 +02:00 |
Clifford Wolf
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aaa99c35bd
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Added $past, $stable, $rose, $fell SVA functions
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2016-09-19 01:30:07 +02:00 |
Clifford Wolf
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97583ab729
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Avoid creation of bogus initial blocks for assert/assume in always @*
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2016-09-06 17:34:42 +02:00 |
Clifford Wolf
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6f41e5277d
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Removed $aconst cell type
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2016-08-30 19:09:56 +02:00 |
Clifford Wolf
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eae390ae17
|
Removed $predict again
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2016-08-28 21:35:33 +02:00 |
Clifford Wolf
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450f6f59b4
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Fixed bug with memories that do not have a down-to-zero data width
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2016-08-22 14:27:46 +02:00 |
Clifford Wolf
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82a4a0230f
|
Another bugfix in mem2reg code
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2016-08-21 13:23:58 +02:00 |
Clifford Wolf
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fe9315b7a1
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Fixed finish_addr handling in $readmemh/$readmemb
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2016-08-20 13:47:46 +02:00 |
Clifford Wolf
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f6629b9c29
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Optimize memory address port width in wreduce and memory_collect, not verilog front-end
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2016-08-19 18:38:25 +02:00 |
Clifford Wolf
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4056312987
|
Added $anyconst and $aconst
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2016-07-27 15:41:22 +02:00 |
Clifford Wolf
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7fef5ff104
|
Using $initstate in "initial assume" and "initial assert"
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2016-07-21 14:37:28 +02:00 |
Clifford Wolf
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5c166e76e5
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Added $initstate cell type and vlog function
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2016-07-21 14:23:22 +02:00 |
Clifford Wolf
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d7763634b6
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After reading the SV spec, using non-standard predict() instead of expect()
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2016-07-21 13:34:33 +02:00 |
Clifford Wolf
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721f1f5ecf
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Added basic support for $expect cells
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2016-07-13 16:56:17 +02:00 |
Clifford Wolf
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9a101dc1f7
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Fixed mem assignment in left-hand-side concatenation
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2016-07-08 14:31:06 +02:00 |
Clifford Wolf
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ee071586c5
|
Fixed access-after-delete bug in mem2reg code
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2016-05-27 17:25:33 +02:00 |
Clifford Wolf
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5a09fa4553
|
Fixed handling of parameters and const functions in casex/casez pattern
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2016-04-21 15:31:54 +02:00 |
Clifford Wolf
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5328a85149
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Do not set "nosync" on task outputs, fixes #134
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2016-03-24 12:16:47 +01:00 |
Clifford Wolf
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4f0d4899ce
|
Added support for $stop system task
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2016-03-21 16:19:51 +01:00 |
Clifford Wolf
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e5d42ebb4d
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Added $display %m support, fixed mem leak in $display, fixes #128
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2016-03-19 11:51:13 +01:00 |
Clifford Wolf
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ef4207d5ad
|
Fixed localparam signdness, fixes #127
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2016-03-18 12:15:00 +01:00 |
Clifford Wolf
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b6d08f39ba
|
Set "nosync" attribute on internal task/function wires
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2016-03-18 10:53:29 +01:00 |
Clifford Wolf
|
bcc873b805
|
Fixed some visual studio warnings
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2016-02-13 17:31:24 +01:00 |
Clifford Wolf
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c86fbae3d1
|
Fixed handling of re-declarations of wires in tasks and functions
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2015-11-23 17:09:57 +01:00 |
Clifford Wolf
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7ae3d1b5a9
|
More bugfixes in handling of parameters in tasks and functions
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2015-11-12 13:02:36 +01:00 |
Clifford Wolf
|
34f2b84fb6
|
Fixed handling of parameters and localparams in functions
|
2015-11-11 10:54:35 +01:00 |
Clifford Wolf
|
207736b4ee
|
Import more std:: stuff into Yosys namespace
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2015-10-25 19:30:49 +01:00 |
Clifford Wolf
|
e51dcc83d0
|
Fixed complexity of assigning to vectors in constant functions
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2015-10-01 12:15:35 +02:00 |
Clifford Wolf
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9caeadf797
|
Fixed detection of unconditional $readmem[hb]
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2015-09-30 15:46:51 +02:00 |
Clifford Wolf
|
f9d7df0869
|
Bugfixes in $readmem[hb]
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2015-09-25 13:49:48 +02:00 |
Clifford Wolf
|
089c1e176f
|
Bugfix in handling of multi-dimensional memories
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2015-09-23 07:56:17 +02:00 |
Clifford Wolf
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559929e341
|
Warning for $display/$write outside initial block
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2015-09-23 07:16:03 +02:00 |
Clifford Wolf
|
6176f4d081
|
Fixed multi-level prefix resolving
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2015-09-22 20:52:02 +02:00 |