whitequark
ab0fb19cff
Merge pull request #1488 from whitequark/flowmap-fixes
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flowmap: fix a few crashes
2019-11-13 11:57:17 +00:00
Clifford Wolf
4be5a0fd7c
Update fsm_detect bugfix
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-11-12 17:31:30 +01:00
Clifford Wolf
16df8f5a32
Bugfix in fsm_detect
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-11-12 14:26:02 +01:00
whitequark
c68722818a
flowmap: when doing mincut, ensure source is always in X, not X̅.
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Fixes #1475 .
2019-11-12 00:15:43 +00:00
whitequark
eef32195bd
flowmap: don't break if that creates a k+2 (and larger) LUT either.
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Fixes #1405 .
2019-11-11 23:13:00 +00:00
Sean Cross
82f60ba938
Makefile: don't assume python is called `python3`
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On some architectures, notably on Windows, the official name for the
Python binary from python.org is `python`. The build system assumes
that python is called `python3`, which breaks under this architecture.
There is already infrastructure in place to determine the name of the
Python binary when building PYOSYS. Since Python is now always required
to build Yosys, enable this check universally which sets the
`PYTHON_EXECUTABLE` variable.
Then, reuse this variable in other Makefiles as necessary, rather than
hardcoding `python3` everywhere.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-10-19 14:04:52 +08:00
Clifford Wolf
b8774ae849
Fix dffmux peepopt init handling
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-10-16 11:40:32 +02:00
Clifford Wolf
bb0851bfc5
Move GENERATE_PATTERN macro to separate utility header
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-10-16 11:40:01 +02:00
Clifford Wolf
af61d92441
Disable left-over log_debug in peepopt_dffmux.pmg
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-10-16 10:43:47 +02:00
Eddie Hung
ea54b5ea61
Revert "Be mindful that sigmap(wire) could have dupes when checking \init"
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This reverts commit f46ac1df9f
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2019-10-08 12:41:24 -07:00
Eddie Hung
cfc181cba9
Merge pull request #1432 from YosysHQ/eddie/fix1427
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Refactor peepopt_dffmux and be sensitive to \init when trimming
2019-10-08 12:38:29 -07:00
Eddie Hung
4c89a4e642
Merge pull request #1433 from YosysHQ/eddie/equiv_opt_async2sync
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async2sync to be called by equiv_opt only when -async2sync given
2019-10-08 10:53:44 -07:00
Eddie Hung
9fd2ddb14c
Merge pull request #1437 from YosysHQ/eddie/abc_to_abc9
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Rename abc_* names/attributes to more precisely be abc9_*
2019-10-08 10:53:38 -07:00
Eddie Hung
472b5d33a6
Merge pull request #1438 from YosysHQ/eddie/xilinx_dsp_comments
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Add notes and comments for xilinx_dsp
2019-10-08 10:53:30 -07:00
Clifford Wolf
4072a96663
Merge pull request #1439 from YosysHQ/eddie/fix_ice40_wrapcarry
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Missing 'accept' at end of ice40_wrapcarry, spotted by @cliffordwolf
2019-10-06 12:11:20 +02:00
Eddie Hung
5c68da4150
Missing 'accept' at end of ice40_wrapcarry, spotted by @cliffordwolf
2019-10-05 09:27:12 -07:00
Clifford Wolf
10d0bad67e
Update README.md
2019-10-05 18:13:04 +02:00
Eddie Hung
f90a4b1e24
Missed this
2019-10-05 08:57:37 -07:00
Eddie Hung
991c2ca95b
Add comment on why we have to match for clock-enable/reset muxes
2019-10-05 08:56:37 -07:00
Eddie Hung
ebb059896a
Add note on pattern detector
2019-10-05 08:53:01 -07:00
Miodrag Milanović
7c074ef844
Merge pull request #1436 from YosysHQ/mmicko/msvc_fix
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Fixes for MSVC build
2019-10-05 07:48:30 +02:00
Eddie Hung
792cd31052
Add comments for xilinx_dsp_cascade
2019-10-04 22:31:04 -07:00
Eddie Hung
12fd2ec4f0
Improve comments for xilinx_dsp_CREG
2019-10-04 22:31:04 -07:00
Eddie Hung
14e4aeece6
Fix comment
2019-10-04 22:31:04 -07:00
Eddie Hung
8027ebf05b
Restore optimisation for sigM.empty()
2019-10-04 22:31:04 -07:00
Eddie Hung
77d7a5c14a
Retry on fixing TODOs
2019-10-04 22:31:04 -07:00
Eddie Hung
52583ecff8
Revert "Fix TODOs"
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This reverts commit 8674a6c68d563908014d16671567459499c6dc99.
2019-10-04 22:31:04 -07:00
Eddie Hung
6d68972619
More comments, cleanup
2019-10-04 22:31:04 -07:00
Eddie Hung
7de9c33931
Fix TODOs
2019-10-04 22:31:04 -07:00
Eddie Hung
983068103e
Consistency
2019-10-04 22:31:04 -07:00
Eddie Hung
cf82b38478
Add comments for xilinx_dsp
2019-10-04 22:31:04 -07:00
Eddie Hung
a5ac33f230
Merge branch 'master' into eddie/abc_to_abc9
2019-10-04 17:53:20 -07:00
Eddie Hung
0acc51c3d8
Add temporary `abc9 -nomfs` and use for `synth_xilinx -abc9`
2019-10-04 17:35:43 -07:00
Eddie Hung
74ef8feeaf
Fix xilinx_dsp for unsigned extensions
2019-10-04 16:46:15 -07:00
Eddie Hung
aae2b9fd9c
Rename abc_* names/attributes to more precisely be abc9_*
2019-10-04 11:04:10 -07:00
Eddie Hung
84f978bdc2
Add -async2sync to help text as per @daveshah1
2019-10-04 10:17:46 -07:00
Miodrag Milanovic
c0b14cfea7
Fixes for MSVC build
2019-10-04 16:29:46 +02:00
Eddie Hung
a9efd2e81c
Restore part of doc
2019-10-03 10:51:53 -07:00
Eddie Hung
7a6dec1cef
Add new -async2sync option
2019-10-03 10:30:51 -07:00
Eddie Hung
8765ec3c27
Revert "equiv_opt to call async2sync when not -multiclock like SymbiYosys"
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This reverts commit a39505e329
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2019-10-03 10:07:15 -07:00
Eddie Hung
c6d15c9aad
Revert "Update doc for equiv_opt"
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This reverts commit a274b7cc86
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2019-10-03 10:07:03 -07:00
Clifford Wolf
0e05424885
Merge pull request #1422 from YosysHQ/eddie/aigmap_select
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Add -select option to aigmap
2019-10-03 11:54:04 +02:00
Clifford Wolf
afdc990595
Merge pull request #1429 from YosysHQ/clifford/checkmapped
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Add "check -mapped"
2019-10-03 11:50:53 +02:00
Clifford Wolf
3e27b2846b
Add "check -allow-tbuf"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-10-03 11:49:56 +02:00
Eddie Hung
e9645c7fa7
Fix broken CI, check reset even for constants, trim rstmux
2019-10-02 21:26:26 -07:00
Eddie Hung
c6a55d948a
Merge branch 'eddie/fix_sat_init' into eddie/fix1427
2019-10-02 18:07:38 -07:00
Eddie Hung
d99810ad8a
Refactor peepopt_dffmux and be sensitive to \init when trimming
2019-10-02 18:01:45 -07:00
Eddie Hung
f46ac1df9f
Be mindful that sigmap(wire) could have dupes when checking \init
2019-10-02 16:08:46 -07:00
Eddie Hung
265a655ef9
Also rename cells with _TECHMAP_REPLACE_. prefix, as per @cliffordwolf
2019-10-02 12:43:35 -07:00
Clifford Wolf
45e4c040d7
Add "check -mapped"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-10-02 13:35:03 +02:00