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Fix comment
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@ -614,7 +614,7 @@ struct XilinxDspPass : public Pass {
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xilinx_simd_pack(module, module->selected_cells());
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// Match for all features ([ABDMP][12]?REG, pre-adder,
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// (post-adder, pattern detector, etc.) except for CREG
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// post-adder, pattern detector, etc.) except for CREG
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{
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xilinx_dsp_pm pm(module, module->selected_cells());
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pm.run_xilinx_dsp_pack(xilinx_dsp_pack);
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