Clifford Wolf
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3f4e3ca8ad
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More RTLIL::Cell API usage cleanups
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2014-07-26 16:14:02 +02:00 |
Clifford Wolf
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97a59851a6
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Added RTLIL::Cell::has(portname)
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2014-07-26 16:11:28 +02:00 |
Clifford Wolf
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a84cb04935
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Merge automatic and manual code changes for new cell connections API
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2014-07-26 16:00:30 +02:00 |
Clifford Wolf
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f8fdc47d33
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Manual fixes for new cell connections API
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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b7dda72302
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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cd6574ecf6
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Added some missing "const" in rtlil.h
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2014-07-26 15:58:22 +02:00 |
Clifford Wolf
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7ac9dc7f6e
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Added RTLIL::Module::connections()
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2014-07-26 15:58:21 +02:00 |
Clifford Wolf
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b03aec6e32
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Added RTLIL::Module::connect(const RTLIL::SigSig&)
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2014-07-26 14:31:47 +02:00 |
Clifford Wolf
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027819c7e8
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Use "wget -N" in tests/vloghtb/run-test.sh
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2014-07-26 14:08:43 +02:00 |
Clifford Wolf
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b90f443338
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Added "passed" message to make test targets
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2014-07-26 14:08:20 +02:00 |
Clifford Wolf
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3719281ed4
|
Automatically pack SigSpec on copy/assign
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2014-07-26 13:59:30 +02:00 |
Clifford Wolf
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e75e495c2b
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Added new RTLIL::Cell port access methods
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2014-07-26 12:22:58 +02:00 |
Clifford Wolf
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cc4f10883b
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Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
Clifford Wolf
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665759fcee
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Cosmetic fixes for "make abc"
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2014-07-26 11:55:58 +02:00 |
Clifford Wolf
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f8a68b8f55
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Added "Checklist for adding internal cell types"
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2014-07-26 11:23:43 +02:00 |
Clifford Wolf
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4755e14e7b
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Added copy-constructor-like module->addCell(name, other) method
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2014-07-26 00:38:44 +02:00 |
Clifford Wolf
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2bec47a404
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Use only module->addCell() and module->remove() to create and delete cells
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2014-07-25 17:56:19 +02:00 |
Clifford Wolf
|
5826670009
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Various RTLIL::SigSpec related code cleanups
|
2014-07-25 14:25:42 +02:00 |
Clifford Wolf
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c762050e7f
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Added RTLIL::SigSpec is_chunk()/as_chunk() API
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2014-07-25 14:23:10 +02:00 |
Clifford Wolf
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1834af5e53
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Added "make vgtest"
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2014-07-25 13:24:26 +02:00 |
Clifford Wolf
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309d64d46a
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Fixed two memory leaks in ast simplify
|
2014-07-25 13:24:10 +02:00 |
Clifford Wolf
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50f22ff30c
|
Renamed some of the test cases in tests/simple to avoid name collisions
|
2014-07-25 13:01:45 +02:00 |
Clifford Wolf
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0520bfea89
|
Fixed memory corruption in "opt_reduce" pass
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2014-07-25 12:49:51 +02:00 |
Clifford Wolf
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c4e4f79a2a
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Disabled cover() for non-linux builds
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2014-07-25 12:27:36 +02:00 |
Clifford Wolf
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a8706b73a2
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Added more stuff to checklist
|
2014-07-25 12:16:23 +02:00 |
Clifford Wolf
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1488bc0c4f
|
Updated verific build/test instructions
|
2014-07-25 12:16:03 +02:00 |
Clifford Wolf
|
91bf0c90c8
|
Improvements in "cover" command
|
2014-07-25 12:04:40 +02:00 |
Clifford Wolf
|
6789e3002a
|
Removed Minisat dependency on zlib
|
2014-07-25 03:41:54 +02:00 |
Clifford Wolf
|
e4a0ab9bed
|
Added more stuff to the checklist
|
2014-07-25 03:41:53 +02:00 |
Clifford Wolf
|
7f1789ad1b
|
Fixed typo in cover id
|
2014-07-25 03:41:53 +02:00 |
Clifford Wolf
|
cd69925437
|
Added "make clean-abc"
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2014-07-25 03:41:53 +02:00 |
Clifford Wolf
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01dbf12ac9
|
Further improved "make" prettiness
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2014-07-25 03:41:53 +02:00 |
Clifford Wolf
|
6aa792c864
|
Replaced more old SigChunk programming patterns
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2014-07-24 23:10:58 +02:00 |
Clifford Wolf
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7a608437c6
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Updated ABC to hg id "b1e63d18768d"
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2014-07-24 20:57:21 +02:00 |
Clifford Wolf
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9962384d3e
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Added cover() calls to opt_const
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2014-07-24 20:47:18 +02:00 |
Clifford Wolf
|
10d2402e2f
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Added cover_list() API
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2014-07-24 20:47:18 +02:00 |
Clifford Wolf
|
45b4154b37
|
Added "make SMALL=1"
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2014-07-24 19:03:57 +02:00 |
Clifford Wolf
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34ea9e3f09
|
Now "make PRETTY=1" is the default setting
|
2014-07-24 17:55:55 +02:00 |
Clifford Wolf
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38afbe62ef
|
Added percentage display to "make PRETTY=1"
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2014-07-24 17:53:11 +02:00 |
Clifford Wolf
|
b17d6531c8
|
Added "make PRETTY=1"
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2014-07-24 17:15:01 +02:00 |
Clifford Wolf
|
2f54345cff
|
Added "cover" command
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2014-07-24 16:14:19 +02:00 |
Clifford Wolf
|
e589289df7
|
Some improvements in SigSpec packing/unpacking and checking
|
2014-07-24 15:05:41 +02:00 |
Clifford Wolf
|
7679000673
|
Now using a dedicated ELF section for all coverage counters
|
2014-07-24 15:05:05 +02:00 |
Clifford Wolf
|
22ede43b3f
|
Small changes regarding cover() and check() in SigSpec
|
2014-07-24 04:46:36 +02:00 |
Clifford Wolf
|
3a2c535777
|
Renamed RELEASE_CHECKLIST -> CHECKLIST
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2014-07-24 04:24:47 +02:00 |
Clifford Wolf
|
798f713629
|
Added support for YOSYS_COVER_FILE env variable
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2014-07-24 04:16:32 +02:00 |
Clifford Wolf
|
1b0d5fc22d
|
Added cover() calls to RTLIL::SigSpec methods
|
2014-07-24 03:50:28 +02:00 |
Clifford Wolf
|
9cf12570ba
|
Added support for YOSYS_COVER_DIR env variable
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2014-07-24 03:49:32 +02:00 |
Clifford Wolf
|
6b1018314c
|
Added cover() API
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2014-07-24 03:48:38 +02:00 |
Clifford Wolf
|
b31762d158
|
Added RELEASE_CHECKLIST
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2014-07-24 02:13:37 +02:00 |